[PATCH v3 0/2] MCA support for Centaur CPUs

[PATCH v3 0/2] MCA support for Centaur CPUs

[David Wang]

This patch set is to provide MCA support for new Centaur CPU.

The first patch is used to tell the kernel that newer Centaur
CPU support MCE broadcasting.

The second patch is used to tell the kernel that newer Centaur
CPU support CMCI.

Changes from v2 to v3:
* move mca_cfg.monarch_timeout init from __mcheck_cpu_apply_quirks to
mce_centaur_feature_init according to request from Boris.

Changes from v1 to v2:
* Capatilize 'Centaur' in the comments

David Wang (2):
  x86/mce: new Centaur CPU support MCE broadcasting
  x86/mce: add CMCI support for Centaur CPUs

 arch/x86/kernel/cpu/mcheck/mce.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

-- 
1.9.1

[PATCH v3 1/2] x86/mce: new Centaur CPU support MCE broadcasting

[David Wang]

Newer Centaur multi-core CPU also support MCE broadcasting to all cores. But
no Centaur special code tell this truth to kernel.  

Signed-off-by: David Wang <davidwang@zhaoxin.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 42cf288..38ccab8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1727,6 +1727,22 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
 	}
 }
 
+void mce_centaur_feature_init(struct cpuinfo_x86 *c)
+{
+	struct mca_config *cfg = &mca_cfg;
+
+	 /*
+	  * All newer Centaur CPUs support MCE broadcasting. Enable
+	  * synchronization with a one second timeout.
+	  */
+	if (cfg->monarch_timeout < 0) {
+		if ((c->x86 == 6 && c->x86_model == 0xf &&
+			c->x86_stepping >= 0xe) || c->x86 > 6)
+			cfg->monarch_timeout = USEC_PER_SEC;
+	}
+}
+
+
 static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
@@ -1739,6 +1755,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		mce_amd_feature_init(c);
 		break;
 		}
+	case X86_VENDOR_CENTAUR:
+		mce_centaur_feature_init(c);
+		break;
 
 	default:
 		break;
-- 
1.9.1

[v3,1/2] x86/mce: new Centaur CPU support MCE broadcasting

[davidwang]

Newer Centaur multi-core CPU also support MCE broadcasting to all cores. But
no Centaur special code tell this truth to kernel.  

Signed-off-by: David Wang <davidwang@zhaoxin.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 42cf288..38ccab8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1727,6 +1727,22 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
 	}
 }
 
+void mce_centaur_feature_init(struct cpuinfo_x86 *c)
+{
+	struct mca_config *cfg = &mca_cfg;
+
+	 /*
+	  * All newer Centaur CPUs support MCE broadcasting. Enable
+	  * synchronization with a one second timeout.
+	  */
+	if (cfg->monarch_timeout < 0) {
+		if ((c->x86 == 6 && c->x86_model == 0xf &&
+			c->x86_stepping >= 0xe) || c->x86 > 6)
+			cfg->monarch_timeout = USEC_PER_SEC;
+	}
+}
+
+
 static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
@@ -1739,6 +1755,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		mce_amd_feature_init(c);
 		break;
 		}
+	case X86_VENDOR_CENTAUR:
+		mce_centaur_feature_init(c);
+		break;
 
 	default:
 		break;

[PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs

[David Wang]

Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.

Signed-off-by: David Wang <davidwang@zhaoxin.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 38ccab8..f9a7295 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		}
 	case X86_VENDOR_CENTAUR:
 		mce_centaur_feature_init(c);
+		mce_intel_feature_init(c);
+		mce_adjust_timer = cmci_intel_adjust_timer;
 		break;
 
 	default:
-- 
1.9.1

[v3,2/2] x86/mce: add CMCI support for Centaur CPUs

[davidwang]

Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.

Signed-off-by: David Wang <davidwang@zhaoxin.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 38ccab8..f9a7295 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		}
 	case X86_VENDOR_CENTAUR:
 		mce_centaur_feature_init(c);
+		mce_intel_feature_init(c);
+		mce_adjust_timer = cmci_intel_adjust_timer;
 		break;
 
 	default:

Re: [PATCH v3 1/2] x86/mce: new Centaur CPU support MCE broadcasting

[Borislav Petkov]

On Wed, Apr 25, 2018 at 06:33:39PM +0800, David Wang wrote:
> Newer Centaur multi-core CPU also support MCE broadcasting to all cores. But
> no Centaur special code tell this truth to kernel.  
> 
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
>  arch/x86/kernel/cpu/mcheck/mce.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)

I applied this with some minor improvements:

---
From: David Wang <davidwang@zhaoxin.com>
Date: Wed, 25 Apr 2018 18:33:39 +0800
Subject: [PATCH] x86/MCA: Enable MCE broadcasting on new Centaur CPUs

Newer Centaur multi-core CPUs also support MCE broadcasting to all
cores. Add a Centaur-specific init function setting that up.

 [ bp:
   - make mce_centaur_feature_init() static
   - flip check to do the f/m/s first for better readability
   - touch up text
  ]

Signed-off-by: David Wang <davidwang@zhaoxin.com>
Cc: Greg KH <greg@kroah.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: benjaminpan@viatech.com
Cc: brucechang@via-alliance.com
Cc: cooperyan@zhaoxin.com
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: timguo@zhaoxin.com
Cc: x86-ml <x86@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1524652420-17330-2-git-send-email-davidwang@zhaoxin.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 42cf2880d0ed..cd76380af79f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1727,6 +1727,21 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
 	}
 }
 
+static void mce_centaur_feature_init(struct cpuinfo_x86 *c)
+{
+	struct mca_config *cfg = &mca_cfg;
+
+	 /*
+	  * All newer Centaur CPUs support MCE broadcasting. Enable
+	  * synchronization with a one second timeout.
+	  */
+	if ((c->x86 == 6 && c->x86_model == 0xf && c->x86_stepping >= 0xe) ||
+	     c->x86 > 6) {
+		if (cfg->monarch_timeout < 0)
+			cfg->monarch_timeout = USEC_PER_SEC;
+	}
+}
+
 static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
@@ -1739,6 +1754,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		mce_amd_feature_init(c);
 		break;
 		}
+	case X86_VENDOR_CENTAUR:
+		mce_centaur_feature_init(c);
+		break;
 
 	default:
 		break;
-- 
2.13.0

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

[v3,1/2] x86/mce: new Centaur CPU support MCE broadcasting

[Borislav Petkov]

On Wed, Apr 25, 2018 at 06:33:39PM +0800, David Wang wrote:
> Newer Centaur multi-core CPU also support MCE broadcasting to all cores. But
> no Centaur special code tell this truth to kernel.  
> 
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
>  arch/x86/kernel/cpu/mcheck/mce.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)

I applied this with some minor improvements:
---
From: David Wang <davidwang@zhaoxin.com>
Date: Wed, 25 Apr 2018 18:33:39 +0800
Subject: [PATCH] x86/MCA: Enable MCE broadcasting on new Centaur CPUs

Newer Centaur multi-core CPUs also support MCE broadcasting to all
cores. Add a Centaur-specific init function setting that up.

 [ bp:
   - make mce_centaur_feature_init() static
   - flip check to do the f/m/s first for better readability
   - touch up text
  ]

Signed-off-by: David Wang <davidwang@zhaoxin.com>
Cc: Greg KH <greg@kroah.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: benjaminpan@viatech.com
Cc: brucechang@via-alliance.com
Cc: cooperyan@zhaoxin.com
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: timguo@zhaoxin.com
Cc: x86-ml <x86@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1524652420-17330-2-git-send-email-davidwang@zhaoxin.com
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 42cf2880d0ed..cd76380af79f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1727,6 +1727,21 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
 	}
 }
 
+static void mce_centaur_feature_init(struct cpuinfo_x86 *c)
+{
+	struct mca_config *cfg = &mca_cfg;
+
+	 /*
+	  * All newer Centaur CPUs support MCE broadcasting. Enable
+	  * synchronization with a one second timeout.
+	  */
+	if ((c->x86 == 6 && c->x86_model == 0xf && c->x86_stepping >= 0xe) ||
+	     c->x86 > 6) {
+		if (cfg->monarch_timeout < 0)
+			cfg->monarch_timeout = USEC_PER_SEC;
+	}
+}
+
 static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
@@ -1739,6 +1754,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		mce_amd_feature_init(c);
 		break;
 		}
+	case X86_VENDOR_CENTAUR:
+		mce_centaur_feature_init(c);
+		break;
 
 	default:
 		break;

Re: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs

[Borislav Petkov]

On Wed, Apr 25, 2018 at 06:33:40PM +0800, David Wang wrote:
> Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.
> 
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
>  arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index 38ccab8..f9a7295 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
>  		}
>  	case X86_VENDOR_CENTAUR:
>  		mce_centaur_feature_init(c);
> +		mce_intel_feature_init(c);
> +		mce_adjust_timer = cmci_intel_adjust_timer;

This won't work in configs with CONFIG_X86_MCE_INTEL disabled.

You need to define CONFIG_X86_MCE_CENTAUR or so which depends on
CONFIG_CPU_SUP_CENTAUR and CONFIG_X86_MCE_INTEL and which then makes
sure the intel CMCI et al stuff is enabled.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

[v3,2/2] x86/mce: add CMCI support for Centaur CPUs

[Borislav Petkov]

On Wed, Apr 25, 2018 at 06:33:40PM +0800, David Wang wrote:
> Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.
> 
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
>  arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index 38ccab8..f9a7295 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
>  		}
>  	case X86_VENDOR_CENTAUR:
>  		mce_centaur_feature_init(c);
> +		mce_intel_feature_init(c);
> +		mce_adjust_timer = cmci_intel_adjust_timer;

This won't work in configs with CONFIG_X86_MCE_INTEL disabled.

You need to define CONFIG_X86_MCE_CENTAUR or so which depends on
CONFIG_CPU_SUP_CENTAUR and CONFIG_X86_MCE_INTEL and which then makes
sure the intel CMCI et al stuff is enabled.

[tip:ras/core] x86/MCE: Enable MCE broadcasting on new Centaur CPUs

[tip-bot for David Wang]

Commit-ID:  13e8582245267b872dc6eb4ab695fffc797d99f5
Gitweb:     https://git.kernel.org/tip/13e8582245267b872dc6eb4ab695fffc797d99f5
Author:     David Wang <davidwang@zhaoxin.com>
AuthorDate: Wed, 25 Apr 2018 18:33:39 +0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 6 May 2018 12:46:25 +0200

x86/MCE: Enable MCE broadcasting on new Centaur CPUs

Newer Centaur multi-core CPUs also support MCE broadcasting to all
cores. Add a Centaur-specific init function setting that up.

 [ bp:
   - make mce_centaur_feature_init() static
   - flip check to do the f/m/s first for better readability
   - touch up text
  ]

Signed-off-by: David Wang <davidwang@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: Greg KH <greg@kroah.com>
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: Tony Luck <tony.luck@intel.com>
Cc: benjaminpan@viatech.com
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1524652420-17330-2-git-send-email-davidwang@zhaoxin.com

---
 arch/x86/kernel/cpu/mcheck/mce.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 42cf2880d0ed..cd76380af79f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1727,6 +1727,21 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
 	}
 }
 
+static void mce_centaur_feature_init(struct cpuinfo_x86 *c)
+{
+	struct mca_config *cfg = &mca_cfg;
+
+	 /*
+	  * All newer Centaur CPUs support MCE broadcasting. Enable
+	  * synchronization with a one second timeout.
+	  */
+	if ((c->x86 == 6 && c->x86_model == 0xf && c->x86_stepping >= 0xe) ||
+	     c->x86 > 6) {
+		if (cfg->monarch_timeout < 0)
+			cfg->monarch_timeout = USEC_PER_SEC;
+	}
+}
+
 static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
@@ -1739,6 +1754,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		mce_amd_feature_init(c);
 		break;
 		}
+	case X86_VENDOR_CENTAUR:
+		mce_centaur_feature_init(c);
+		break;
 
 	default:
 		break;

[tip:ras/core] x86/MCE: Enable MCE broadcasting on new Centaur CPUs

[tip-bot for Borislav Petkov]

Commit-ID:  13e8582245267b872dc6eb4ab695fffc797d99f5
Gitweb:     https://git.kernel.org/tip/13e8582245267b872dc6eb4ab695fffc797d99f5
Author:     David Wang <davidwang@zhaoxin.com>
AuthorDate: Wed, 25 Apr 2018 18:33:39 +0800
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 6 May 2018 12:46:25 +0200

x86/MCE: Enable MCE broadcasting on new Centaur CPUs

Newer Centaur multi-core CPUs also support MCE broadcasting to all
cores. Add a Centaur-specific init function setting that up.

 [ bp:
   - make mce_centaur_feature_init() static
   - flip check to do the f/m/s first for better readability
   - touch up text
  ]

Signed-off-by: David Wang <davidwang@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: Greg KH <greg@kroah.com>
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: Tony Luck <tony.luck@intel.com>
Cc: benjaminpan@viatech.com
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1524652420-17330-2-git-send-email-davidwang@zhaoxin.com
---
 arch/x86/kernel/cpu/mcheck/mce.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

--
To unsubscribe from this list: send the line "unsubscribe linux-edac" in
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diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 42cf2880d0ed..cd76380af79f 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1727,6 +1727,21 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
 	}
 }
 
+static void mce_centaur_feature_init(struct cpuinfo_x86 *c)
+{
+	struct mca_config *cfg = &mca_cfg;
+
+	 /*
+	  * All newer Centaur CPUs support MCE broadcasting. Enable
+	  * synchronization with a one second timeout.
+	  */
+	if ((c->x86 == 6 && c->x86_model == 0xf && c->x86_stepping >= 0xe) ||
+	     c->x86 > 6) {
+		if (cfg->monarch_timeout < 0)
+			cfg->monarch_timeout = USEC_PER_SEC;
+	}
+}
+
 static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 {
 	switch (c->x86_vendor) {
@@ -1739,6 +1754,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		mce_amd_feature_init(c);
 		break;
 		}
+	case X86_VENDOR_CENTAUR:
+		mce_centaur_feature_init(c);
+		break;
 
 	default:
 		break;