From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756924AbeDZQVH (ORCPT ); Thu, 26 Apr 2018 12:21:07 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:64707 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1756792AbeDZQTR (ORCPT ); Thu, 26 Apr 2018 12:19:17 -0400 From: Ludovic Barre To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring CC: Maxime Coquelin , Alexandre Torgue , Gerald BAEZA , Loic PALLARDY , , , , "Ludovic Barre" Subject: [PATCH 10/11] ARM: dts: stm32: add exti support for stm32mp157c Date: Thu, 26 Apr 2018 18:18:33 +0200 Message-ID: <1524759514-12392-11-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> References: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-26_06:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ludovic Barre This patch adds external interrupt (exti) support on stm32mp157c SoC. Signed-off-by: Ludovic Barre --- arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index bfcf84b..e6fcf8f 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -167,6 +167,13 @@ #reset-cells = <1>; }; + exti: interrupt-controller@5000d000 { + compatible = "st,stm32mp1-exti", "syscon"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000d000 0x400>; + }; + usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ludovic Barre Subject: [PATCH 10/11] ARM: dts: stm32: add exti support for stm32mp157c Date: Thu, 26 Apr 2018 18:18:33 +0200 Message-ID: <1524759514-12392-11-git-send-email-ludovic.Barre@st.com> References: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> Sender: linux-kernel-owner@vger.kernel.org To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring Cc: Maxime Coquelin , Alexandre Torgue , Gerald BAEZA , Loic PALLARDY , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Ludovic Barre List-Id: devicetree@vger.kernel.org From: Ludovic Barre This patch adds external interrupt (exti) support on stm32mp157c SoC. Signed-off-by: Ludovic Barre --- arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index bfcf84b..e6fcf8f 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -167,6 +167,13 @@ #reset-cells = <1>; }; + exti: interrupt-controller@5000d000 { + compatible = "st,stm32mp1-exti", "syscon"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000d000 0x400>; + }; + usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: ludovic.Barre@st.com (Ludovic Barre) Date: Thu, 26 Apr 2018 18:18:33 +0200 Subject: [PATCH 10/11] ARM: dts: stm32: add exti support for stm32mp157c In-Reply-To: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> References: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> Message-ID: <1524759514-12392-11-git-send-email-ludovic.Barre@st.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Ludovic Barre This patch adds external interrupt (exti) support on stm32mp157c SoC. Signed-off-by: Ludovic Barre --- arch/arm/boot/dts/stm32mp157c.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index bfcf84b..e6fcf8f 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -167,6 +167,13 @@ #reset-cells = <1>; }; + exti: interrupt-controller at 5000d000 { + compatible = "st,stm32mp1-exti", "syscon"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000d000 0x400>; + }; + usart1: serial at 5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; -- 2.7.4