From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [v5 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings Date: Tue, 01 May 2018 14:10:27 -0700 Message-ID: <152520902751.138124.3904360654314728163@swboyd.mtv.corp.google.com> References: <1525164093-16645-1-git-send-email-tdas@codeaurora.org> <1525164093-16645-2-git-send-email-tdas@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: <1525164093-16645-2-git-send-email-tdas@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org To: Michael Turquette , Stephen Boyd Cc: Andy Gross , David Brown , Rajendra Nayak , Odelu Kukatla , Amit Nischal , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Taniya Das List-Id: linux-arm-msm@vger.kernel.org Quoting Taniya Das (2018-05-01 01:41:32) > diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt b/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt > new file mode 100644 > index 0000000..ecc1dbe > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt > @@ -0,0 +1,32 @@ > +Qualcomm Technologies, Inc. RPMh Clocks > +------------------------------------------------------- > + > +Resource Power Manager Hardened (RPMh) manages shared resources on > +some Qualcomm Technologies Inc. SoCs. It accepts clock requests from > +other hardware subsystems via RSC to control clocks. > + > +Required properties : > +- compatible : shall contain "qcom,sdm845-rpmh-clk" > + > +- #clock-cells : must contain 1 > + > +Optional properties : > +- assigned-clk-divs : property should contain a list of divs for each clock in > + the clk-output-names property. In case divs are not > + provided the clock rate would be same as parent rate. > +- clk-output-names : a list of strings of clock output signal for the divs to > + be applied. > + > +Example : > + > +#include > + > + &apps_rsc { > + rpmhcc: clock-controller { > + compatible = "qcom,sdm845-rpmh-clk"; > + #clock-cells = <1>; > + assigned-clk-divs = <2 2 2>; This property shouldn't need to exist. Instead, add a fixed div-2 clock to the DTS file (I guess in the SoC file) to divide the crystal frequency into the rate you want (19.2 MHz in this case). > + clk-output-names = "bi_tcxo", "lnbb_clk2", > + "lnbb_clk3"; We don't need this either. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751445AbeEAVKb convert rfc822-to-8bit (ORCPT ); Tue, 1 May 2018 17:10:31 -0400 Received: from mail.kernel.org ([198.145.29.99]:58444 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751004AbeEAVK3 (ORCPT ); Tue, 1 May 2018 17:10:29 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3FC5D2368F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=sboyd@kernel.org Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: Michael Turquette , Stephen Boyd , Taniya Das From: Stephen Boyd In-Reply-To: <1525164093-16645-2-git-send-email-tdas@codeaurora.org> Cc: Andy Gross , David Brown , Rajendra Nayak , Odelu Kukatla , Amit Nischal , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Taniya Das References: <1525164093-16645-1-git-send-email-tdas@codeaurora.org> <1525164093-16645-2-git-send-email-tdas@codeaurora.org> Message-ID: <152520902751.138124.3904360654314728163@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [v5 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings Date: Tue, 01 May 2018 14:10:27 -0700 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Taniya Das (2018-05-01 01:41:32) > diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt b/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt > new file mode 100644 > index 0000000..ecc1dbe > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt > @@ -0,0 +1,32 @@ > +Qualcomm Technologies, Inc. RPMh Clocks > +------------------------------------------------------- > + > +Resource Power Manager Hardened (RPMh) manages shared resources on > +some Qualcomm Technologies Inc. SoCs. It accepts clock requests from > +other hardware subsystems via RSC to control clocks. > + > +Required properties : > +- compatible : shall contain "qcom,sdm845-rpmh-clk" > + > +- #clock-cells : must contain 1 > + > +Optional properties : > +- assigned-clk-divs : property should contain a list of divs for each clock in > + the clk-output-names property. In case divs are not > + provided the clock rate would be same as parent rate. > +- clk-output-names : a list of strings of clock output signal for the divs to > + be applied. > + > +Example : > + > +#include > + > + &apps_rsc { > + rpmhcc: clock-controller { > + compatible = "qcom,sdm845-rpmh-clk"; > + #clock-cells = <1>; > + assigned-clk-divs = <2 2 2>; This property shouldn't need to exist. Instead, add a fixed div-2 clock to the DTS file (I guess in the SoC file) to divide the crystal frequency into the rate you want (19.2 MHz in this case). > + clk-output-names = "bi_tcxo", "lnbb_clk2", > + "lnbb_clk3"; We don't need this either. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 To: Michael Turquette , Stephen Boyd , Taniya Das From: Stephen Boyd In-Reply-To: <1525164093-16645-2-git-send-email-tdas@codeaurora.org> Cc: Andy Gross , David Brown , Rajendra Nayak , Odelu Kukatla , Amit Nischal , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Taniya Das References: <1525164093-16645-1-git-send-email-tdas@codeaurora.org> <1525164093-16645-2-git-send-email-tdas@codeaurora.org> Message-ID: <152520902751.138124.3904360654314728163@swboyd.mtv.corp.google.com> Subject: Re: [v5 1/2] dt-bindings: clock: Introduce QCOM RPMh clock bindings Date: Tue, 01 May 2018 14:10:27 -0700 List-ID: Quoting Taniya Das (2018-05-01 01:41:32) > diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt b/= Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt > new file mode 100644 > index 0000000..ecc1dbe > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt > @@ -0,0 +1,32 @@ > +Qualcomm Technologies, Inc. RPMh Clocks > +------------------------------------------------------- > + > +Resource Power Manager Hardened (RPMh) manages shared resources on > +some Qualcomm Technologies Inc. SoCs. It accepts clock requests from > +other hardware subsystems via RSC to control clocks. > + > +Required properties : > +- compatible : shall contain "qcom,sdm845-rpmh-clk" > + > +- #clock-cells : must contain 1 > + > +Optional properties : > +- assigned-clk-divs : property should contain a list of divs for each cl= ock in > + the clk-output-names property. In case divs are n= ot > + provided the clock rate would be same as parent r= ate. > +- clk-output-names : a list of strings of clock output signal for the d= ivs to > + be applied. > + > +Example : > + > +#include > + > + &apps_rsc { > + rpmhcc: clock-controller { > + compatible =3D "qcom,sdm845-rpmh-clk"; > + #clock-cells =3D <1>; > + assigned-clk-divs =3D <2 2 2>; This property shouldn't need to exist. Instead, add a fixed div-2 clock to the DTS file (I guess in the SoC file) to divide the crystal frequency into the rate you want (19.2 MHz in this case). > + clk-output-names =3D "bi_tcxo", "lnbb_clk2", > + "lnbb_clk3"; We don't need this either.