From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751412AbeEDPD6 convert rfc822-to-8bit (ORCPT ); Fri, 4 May 2018 11:03:58 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:40962 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751196AbeEDPD5 (ORCPT ); Fri, 4 May 2018 11:03:57 -0400 Date: Fri, 04 May 2018 20:33:48 +0530 From: "Naveen N. Rao" Subject: Re: [PATCH 1/6] powerpc/syscalls: Switch trivial cases to SYSCALL_DEFINE To: linuxppc-dev@ozlabs.org, Michael Ellerman Cc: linux-kernel@vger.kernel.org, viro@zeniv.linux.org.uk References: <20180502132051.28861-1-mpe@ellerman.id.au> In-Reply-To: <20180502132051.28861-1-mpe@ellerman.id.au> User-Agent: astroid/0.11.1 (https://github.com/astroidmail/astroid) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8BIT X-TM-AS-GCONF: 00 x-cbid: 18050415-0008-0000-0000-000004F308D2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18050415-0009-0000-0000-00001E87368A Message-Id: <1525446080.ih4a1c8i42.naveen@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-05-04_05:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1805040139 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Michael Ellerman wrote: > From: Al Viro > > Signed-off-by: Al Viro > --- > arch/powerpc/kernel/pci_32.c | 6 +++--- > arch/powerpc/kernel/pci_64.c | 4 ++-- > arch/powerpc/mm/subpage-prot.c | 4 +++- > arch/powerpc/platforms/cell/spu_syscalls.c | 3 ++- > 4 files changed, 10 insertions(+), 7 deletions(-) > I suppose we can also do this for switch_endian? diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c index 466216506eb2..290265f2700c 100644 --- a/arch/powerpc/kernel/syscalls.c +++ b/arch/powerpc/kernel/syscalls.c @@ -123,7 +123,7 @@ long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low, (u64)len_high << 32 | len_low, advice); } -long sys_switch_endian(void) +SYSCALL_DEFINE0(switch_endian) { struct thread_info *ti; - Naveen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40cwJd2945zDqhm for ; Sat, 5 May 2018 01:04:01 +1000 (AEST) Received: from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2]) by bilbo.ozlabs.org (Postfix) with ESMTP id 40cwJd1Prtz8tCx for ; Sat, 5 May 2018 01:04:01 +1000 (AEST) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40cwJc1nxQz9s3G for ; Sat, 5 May 2018 01:04:00 +1000 (AEST) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w44ExsDW194431 for ; Fri, 4 May 2018 11:03:56 -0400 Received: from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108]) by mx0b-001b2d01.pphosted.com with ESMTP id 2hrq81ysp8-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 04 May 2018 11:03:55 -0400 Received: from localhost by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 4 May 2018 16:03:53 +0100 Date: Fri, 04 May 2018 20:33:48 +0530 From: "Naveen N. Rao" Subject: Re: [PATCH 1/6] powerpc/syscalls: Switch trivial cases to SYSCALL_DEFINE To: linuxppc-dev@ozlabs.org, Michael Ellerman Cc: linux-kernel@vger.kernel.org, viro@zeniv.linux.org.uk References: <20180502132051.28861-1-mpe@ellerman.id.au> In-Reply-To: <20180502132051.28861-1-mpe@ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Message-Id: <1525446080.ih4a1c8i42.naveen@linux.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Michael Ellerman wrote: > From: Al Viro >=20 > Signed-off-by: Al Viro > --- > arch/powerpc/kernel/pci_32.c | 6 +++--- > arch/powerpc/kernel/pci_64.c | 4 ++-- > arch/powerpc/mm/subpage-prot.c | 4 +++- > arch/powerpc/platforms/cell/spu_syscalls.c | 3 ++- > 4 files changed, 10 insertions(+), 7 deletions(-) >=20 I suppose we can also do this for switch_endian? diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.= c index 466216506eb2..290265f2700c 100644 --- a/arch/powerpc/kernel/syscalls.c +++ b/arch/powerpc/kernel/syscalls.c @@ -123,7 +123,7 @@ long ppc_fadvise64_64(int fd, int advice, u32 offset_hi= gh, u32 offset_low, (u64)len_high << 32 | len_low, advice); } =20 -long sys_switch_endian(void) +SYSCALL_DEFINE0(switch_endian) { struct thread_info *ti; - Naveen =