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From: changbin.du@intel.com
To: intel-gvt-dev@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [PATCH v5 14/14] drm/i915: Enable platform support for vGPU huge gtt pages
Date: Mon,  7 May 2018 15:21:53 +0800	[thread overview]
Message-ID: <1525677713-8395-15-git-send-email-changbin.du@intel.com> (raw)
In-Reply-To: <1525677713-8395-1-git-send-email-changbin.du@intel.com>

From: Changbin Du <changbin.du@intel.com>

Now GVTg supports shadowing both 2M/64K huge gtt pages. So this is to
remove the restriction on guest side.

To be compatible with old host kernel, we defined a new cap info bit
VGT_CAPS_HUGE_GTT.

Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Changbin Du <changbin.du@intel.com>
---
 drivers/gpu/drm/i915/gvt/vgpu.c    | 1 +
 drivers/gpu/drm/i915/i915_gem.c    | 8 ++------
 drivers/gpu/drm/i915/i915_pvinfo.h | 1 +
 drivers/gpu/drm/i915/i915_vgpu.h   | 6 ++++++
 4 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index 2e0a02a..861b398 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -46,6 +46,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu)
 
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT;
 	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
+	vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
 
 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
 		vgpu_aperture_gmadr_base(vgpu);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 484354f..e0ddfa1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5355,12 +5355,8 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 {
 	int ret;
 
-	/*
-	 * We need to fallback to 4K pages since gvt gtt handling doesn't
-	 * support huge page entries - we will need to check either hypervisor
-	 * mm can support huge guest page or just do emulation in gvt.
-	 */
-	if (intel_vgpu_active(dev_priv))
+	/* We need to fallback to 4K pages if host doesn't support huge gtt. */
+	if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv))
 		mkwrite_device_info(dev_priv)->page_sizes =
 			I915_GTT_PAGE_SIZE_4K;
 
diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
index 195203f..55bde4a 100644
--- a/drivers/gpu/drm/i915/i915_pvinfo.h
+++ b/drivers/gpu/drm/i915/i915_pvinfo.h
@@ -54,6 +54,7 @@ enum vgt_g2v_type {
  */
 #define VGT_CAPS_FULL_48BIT_PPGTT	BIT(2)
 #define VGT_CAPS_HWSP_EMULATION		BIT(3)
+#define VGT_CAPS_HUGE_GTT		BIT(4)
 
 struct vgt_if {
 	u64 magic;		/* VGT_MAGIC */
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index bb83384..551acc3 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -36,6 +36,12 @@ intel_vgpu_has_hwsp_emulation(struct drm_i915_private *dev_priv)
 	return dev_priv->vgpu.caps & VGT_CAPS_HWSP_EMULATION;
 }
 
+static inline bool
+intel_vgpu_has_huge_gtt(struct drm_i915_private *dev_priv)
+{
+	return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
+}
+
 int intel_vgt_balloon(struct drm_i915_private *dev_priv);
 void intel_vgt_deballoon(struct drm_i915_private *dev_priv);
 
-- 
2.7.4

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  parent reply	other threads:[~2018-05-07  7:21 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-07  7:21 [PATCH v5 00/14] drm/i915/gvt: Add huge gtt shadowing changbin.du
2018-05-07  7:21 ` [PATCH v5 01/14] drm/i915/gvt: Add new 64K entry type changbin.du
2018-05-07  7:21 ` [PATCH v5 02/14] drm/i915/gvt: Add PTE IPS bit operations changbin.du
2018-05-07  7:21 ` [PATCH v5 03/14] drm/i915/gvt: Handle MMIO GEN8_GAMW_ECO_DEV_RW_IA for 64K GTT changbin.du
2018-05-07  7:21 ` [PATCH v5 04/14] drm/i915/gvt: Detect 64K gtt entry by IPS bit of PDE changbin.du
2018-05-07  7:21 ` [PATCH v5 05/14] drm/i915/gvt: Add software PTE flag to mark special 64K splited entry changbin.du
2018-05-07  7:21 ` [PATCH v5 06/14] drm/i915/gvt: Add GTT clear_pse operation changbin.du
2018-05-07  7:21 ` [PATCH v5 07/14] drm/i915/gvt: Split ppgtt_alloc_spt into two parts changbin.du
2018-05-07  7:21 ` [PATCH v5 08/14] drm/i915/gvt: Make PTE iterator 64K entry aware changbin.du
2018-05-07  7:21 ` [PATCH v5 09/14] drm/i915/gvt: Add 64K huge gtt support changbin.du
2018-05-07  7:21 ` [PATCH v5 10/14] drm/i915/kvmgt: Support setting dma map for huge pages changbin.du
2018-05-07  7:21 ` [PATCH v5 11/14] drm/i915/gvt: Add 2M huge gtt support changbin.du
2018-05-07  7:21 ` [PATCH v5 12/14] drm/i915/gvt: Handle special sequence on PDE IPS bit changbin.du
2018-05-07  7:21 ` [PATCH v5 13/14] drm/i915/gvt: Fix error handling in ppgtt_populate_spt_by_guest_entry changbin.du
2018-05-07  7:21 ` changbin.du [this message]
2018-05-07  7:54 ` ✗ Fi.CI.BAT: failure for drm/i915/gvt: Add huge gtt shadowing Patchwork

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