From: Chris Wilson <chris@chris-wilson.co.uk>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: Re: [PATCH 2/5] drm/i915/gtt: Combine marking engines dirty with wmb
Date: Mon, 07 May 2018 20:36:12 +0100 [thread overview]
Message-ID: <152572177233.9723.4600637136812719543@mail.alporthouse.com> (raw)
In-Reply-To: <20180507165222.17009-2-mika.kuoppala@linux.intel.com>
Quoting Mika Kuoppala (2018-05-07 17:52:19)
> It is a common pattern to mark the tlbs dirty along with flushing
> the writes. Introduce gen6_ppgtt_invalidate for this.
It wasn't that common at all. We were careful not to do more wmb() than
required before; not so now.
-Chris
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next prev parent reply other threads:[~2018-05-07 19:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-07 16:52 [PATCH 1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate Mika Kuoppala
2018-05-07 16:52 ` [PATCH 2/5] drm/i915/gtt: Combine marking engines dirty with wmb Mika Kuoppala
2018-05-07 19:36 ` Chris Wilson [this message]
2018-05-07 16:52 ` [PATCH 3/5] drm/i915/gtt: Don't track dirty in gen6_alloc_va_range Mika Kuoppala
2018-05-07 19:37 ` Chris Wilson
2018-05-07 16:52 ` [PATCH 4/5] drm/i915/gtt: Flush write combining buffer on insert entries Mika Kuoppala
2018-05-07 19:38 ` Chris Wilson
2018-05-07 16:52 ` [PATCH 5/5] drm/i915/gtt: Trust the uncached store to flush wcb Mika Kuoppala
2018-05-07 17:01 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate Patchwork
2018-05-07 17:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-05-07 17:19 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-07 18:59 ` ✓ Fi.CI.IGT: " Patchwork
2018-05-07 21:59 ` [PATCH 1/5] " Chris Wilson
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