[PATCH 1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[PATCH 1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[Mika Kuoppala]

We use a pattern of wmb() along with ggtt_invalidate.
Move the wmb out from call sites into the ggtt_invalidate
as it is part of invalidation.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c879bfd9294f..2963d3d71729 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -110,6 +110,9 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma);
 
 static void gen6_ggtt_invalidate(struct drm_i915_private *dev_priv)
 {
+	/* Flush write combining buffer */
+	wmb();
+
 	/* Note that as an uncached mmio write, this should flush the
 	 * WCB of the writes into the GGTT before it triggers the invalidate.
 	 */
@@ -2418,8 +2421,6 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
 	for_each_sgt_dma(addr, sgt_iter, vma->pages)
 		gen8_set_pte(gtt_entries++, pte_encode | addr);
 
-	wmb();
-
 	/* This next bit makes the above posting read even more important. We
 	 * want to flush the TLBs only after we're certain all the PTE updates
 	 * have finished.
@@ -2460,7 +2461,6 @@ static void gen6_ggtt_insert_entries(struct i915_address_space *vm,
 	dma_addr_t addr;
 	for_each_sgt_dma(addr, iter, vma->pages)
 		iowrite32(vm->pte_encode(addr, level, flags), &entries[i++]);
-	wmb();
 
 	/* This next bit makes the above posting read even more important. We
 	 * want to flush the TLBs only after we're certain all the PTE updates
-- 
2.14.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 2/5] drm/i915/gtt: Combine marking engines dirty with wmb

[Mika Kuoppala]

It is a common pattern to mark the tlbs dirty along with flushing
the writes. Introduce gen6_ppgtt_invalidate for this.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 35 +++++++++++++++++++----------------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2963d3d71729..b162617afe18 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -108,6 +108,21 @@
 static int
 i915_get_ggtt_vma_pages(struct i915_vma *vma);
 
+static void gen6_ppgtt_invalidate(struct i915_address_space * const vm)
+{
+	struct i915_hw_ppgtt * const ppgtt = i915_vm_to_ppgtt(vm);
+
+	/* PDE TLBs are a pain to invalidate on GEN8+. When we modify
+	 * the page table structures, we mark them dirty so that
+	 * context switching/execlist queuing code takes extra steps
+	 * to ensure that tlbs are flushed.
+	 */
+	ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.i915)->ring_mask;
+
+	/* Flush write combining buffer */
+	wmb();
+}
+
 static void gen6_ggtt_invalidate(struct drm_i915_private *dev_priv)
 {
 	/* Flush write combining buffer */
@@ -814,15 +829,6 @@ static int gen8_mm_switch_4lvl(struct i915_hw_ppgtt *ppgtt,
 	return gen8_write_pdp(rq, 0, px_dma(&ppgtt->pml4));
 }
 
-/* PDE TLBs are a pain to invalidate on GEN8+. When we modify
- * the page table structures, we mark them dirty so that
- * context switching/execlist queuing code takes extra steps
- * to ensure that tlbs are flushed.
- */
-static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt)
-{
-	ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.i915)->ring_mask;
-}
 
 /* Removes entries from a single page table, releasing it if it's empty.
  * Caller can use the return value to update higher-level entries.
@@ -1398,7 +1404,7 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm,
 			gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe);
 			GEM_BUG_ON(pdp->used_pdpes > i915_pdpes_per_pdp(vm));
 
-			mark_tlbs_dirty(i915_vm_to_ppgtt(vm));
+			gen6_ppgtt_invalidate(vm);
 		}
 
 		ret = gen8_ppgtt_alloc_pd(vm, pd, start, length);
@@ -1724,8 +1730,7 @@ static void gen6_write_page_range(struct i915_hw_ppgtt *ppgtt,
 	gen6_for_each_pde(pt, &ppgtt->pd, start, length, pde)
 		gen6_write_pde(ppgtt, pde, pt);
 
-	mark_tlbs_dirty(ppgtt);
-	wmb();
+	gen6_ppgtt_invalidate(&ppgtt->base);
 }
 
 static inline u32 get_pd_offset(struct i915_hw_ppgtt *ppgtt)
@@ -1939,10 +1944,8 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 		}
 	}
 
-	if (flush) {
-		mark_tlbs_dirty(ppgtt);
-		wmb();
-	}
+	if (flush)
+		gen6_ppgtt_invalidate(vm);
 
 	return 0;
 
-- 
2.14.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 3/5] drm/i915/gtt: Don't track dirty in gen6_alloc_va_range

[Mika Kuoppala]

gen6_alloc_va_range is only used to init the aliasing ppgtt, so
we can be certain that it will be dirty every time. No need
to track it.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b162617afe18..6434ebe8c033 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1929,7 +1929,6 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 	struct i915_page_table *pt;
 	u64 from = start;
 	unsigned int pde;
-	bool flush = false;
 
 	gen6_for_each_pde(pt, &ppgtt->pd, start, length, pde) {
 		if (pt == vm->scratch_pt) {
@@ -1940,12 +1939,10 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 			gen6_initialize_pt(vm, pt);
 			ppgtt->pd.page_table[pde] = pt;
 			gen6_write_pde(ppgtt, pde, pt);
-			flush = true;
 		}
 	}
 
-	if (flush)
-		gen6_ppgtt_invalidate(vm);
+	gen6_ppgtt_invalidate(vm);
 
 	return 0;
 
-- 
2.14.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 4/5] drm/i915/gtt: Flush write combining buffer on insert entries

[Mika Kuoppala]

We could be using write combining map through which we insert
our ptes. Make sure to flush the write combining buffer
after the writes.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6434ebe8c033..dcac8bd604ab 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1077,6 +1077,9 @@ static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
 				      cache_level);
 
 	vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
+
+	/* Flush write combining buffer */
+	wmb();
 }
 
 static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
@@ -1196,6 +1199,9 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
 
 		vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
 	}
+
+	/* Flush write combining buffer */
+	wmb();
 }
 
 static void gen8_free_page_tables(struct i915_address_space *vm,
-- 
2.14.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 5/5] drm/i915/gtt: Trust the uncached store to flush wcb

[Mika Kuoppala]

Not all architectures guarantee that uncached read will
flush the write combining buffer. So marking it explicitly
is recommended [1].

However we know the architecture we are operating on
and can avoid wmb as the UC store will flush the wcb [2].

Omit the wmb() on gen6_ppgtt_invalidate as redundant.

References: http://yarchive.net/comp/linux/write_combining.html [1]
References: http://download.intel.com/design/PentiumII/applnots/24442201.pdf [2]
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index dcac8bd604ab..ef2727f4b6a6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -125,10 +125,7 @@ static void gen6_ppgtt_invalidate(struct i915_address_space * const vm)
 
 static void gen6_ggtt_invalidate(struct drm_i915_private *dev_priv)
 {
-	/* Flush write combining buffer */
-	wmb();
-
-	/* Note that as an uncached mmio write, this should flush the
+	/* Note that as an uncached mmio write, this will flush the
 	 * WCB of the writes into the GGTT before it triggers the invalidate.
 	 */
 	I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
-- 
2.14.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL   : https://patchwork.freedesktop.org/series/42821/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
09ef7cafacef drm/i915/gtt: Move wmb inside ggtt_invalidate
778f0e880a15 drm/i915/gtt: Combine marking engines dirty with wmb
e85884eafe3a drm/i915/gtt: Don't track dirty in gen6_alloc_va_range
04cd57af405c drm/i915/gtt: Flush write combining buffer on insert entries
145537193134 drm/i915/gtt: Trust the uncached store to flush wcb
-:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#16: 
References: http://download.intel.com/design/PentiumII/applnots/24442201.pdf [2]

total: 0 errors, 1 warnings, 0 checks, 11 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL   : https://patchwork.freedesktop.org/series/42821/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Move wmb inside ggtt_invalidate
Okay!

Commit: drm/i915/gtt: Combine marking engines dirty with wmb
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1724:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1724:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1730:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1730:9: warning: expression using sizeof(void)

Commit: drm/i915/gtt: Don't track dirty in gen6_alloc_va_range
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1934:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1934:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1933:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1933:9: warning: expression using sizeof(void)

Commit: drm/i915/gtt: Flush write combining buffer on insert entries
Okay!

Commit: drm/i915/gtt: Trust the uncached store to flush wcb
Okay!

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL   : https://patchwork.freedesktop.org/series/42821/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4151 -> Patchwork_8928 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42821/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8928 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    igt@drv_module_reload@basic-reload:
      fi-bsw-n3050:       PASS -> DMESG-FAIL (fdo#106373)

    igt@kms_chamelium@dp-edid-read:
      fi-kbl-7500u:       PASS -> FAIL (fdo#103841)

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-cfl-s3:          PASS -> FAIL (fdo#100368, fdo#103928)

    
    ==== Possible fixes ====

    igt@drv_module_reload@basic-no-display:
      fi-bsw-n3050:       DMESG-FAIL (fdo#106373) -> PASS

    igt@gem_exec_suspend@basic-s4-devices:
      fi-kbl-7500u:       DMESG-WARN (fdo#105128) -> PASS

    igt@kms_chamelium@hdmi-hpd-fast:
      fi-kbl-7500u:       FAIL (fdo#102672, fdo#103841) -> SKIP

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-elk-e7500:       INCOMPLETE (fdo#103989) -> PASS

    igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
      fi-cnl-psr:         FAIL (fdo#103481) -> PASS

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         FAIL (fdo#104008) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102672 https://bugs.freedesktop.org/show_bug.cgi?id=102672
  fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
  fdo#106373 https://bugs.freedesktop.org/show_bug.cgi?id=106373


== Participating hosts (41 -> 37) ==

  Missing    (4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4151 -> Patchwork_8928

  CI_DRM_4151: 176975baca37c5cdb1632b9aa2ba0170c9ab53df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4464: 1bb318b32db003a377da14715c7b80675a712b6b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8928: 1455371931347174e0a6087e9de8de0ff071b631 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4464: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit


== Linux commits ==

145537193134 drm/i915/gtt: Trust the uncached store to flush wcb
04cd57af405c drm/i915/gtt: Flush write combining buffer on insert entries
e85884eafe3a drm/i915/gtt: Don't track dirty in gen6_alloc_va_range
778f0e880a15 drm/i915/gtt: Combine marking engines dirty with wmb
09ef7cafacef drm/i915/gtt: Move wmb inside ggtt_invalidate

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8928/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate
URL   : https://patchwork.freedesktop.org/series/42821/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4151_full -> Patchwork_8928_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_8928_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8928_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42821/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8928_full:

  === IGT changes ===

    ==== Warnings ====

    igt@pm_rc6_residency@rc6-accuracy:
      shard-kbl:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_8928_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103928)

    igt@kms_flip@2x-plain-flip-ts-check-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@modeset-vs-vblank-race:
      shard-glk:          PASS -> FAIL (fdo#103060)

    igt@kms_rotation_crc@primary-rotation-270:
      shard-apl:          PASS -> FAIL (fdo#104724, fdo#103925)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_gtt:
      shard-apl:          INCOMPLETE (fdo#103927) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#102887) -> PASS

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-glk:          FAIL (fdo#103060) -> PASS

    igt@kms_flip@plain-flip-ts-check:
      shard-hsw:          FAIL (fdo#100368) -> PASS +1

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-hsw:          FAIL (fdo#103928) -> PASS

    igt@kms_pwrite_crc:
      shard-kbl:          DMESG-WARN (fdo#103558, fdo#103313, fdo#105602) -> PASS +6

    igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
      shard-apl:          FAIL (fdo#104724, fdo#103925) -> PASS +1

    igt@pm_rpm@debugfs-read:
      shard-kbl:          DMESG-WARN (fdo#103558, fdo#103313) -> PASS

    igt@pm_rpm@i2c:
      shard-kbl:          DMESG-FAIL (fdo#103558, fdo#103313) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602


== Participating hosts (6 -> 6) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4151 -> Patchwork_8928

  CI_DRM_4151: 176975baca37c5cdb1632b9aa2ba0170c9ab53df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4464: 1bb318b32db003a377da14715c7b80675a712b6b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8928: 1455371931347174e0a6087e9de8de0ff071b631 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4464: 33e58d5583eb7ed3966a1b905f875a1dfa959f6b @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8928/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 2/5] drm/i915/gtt: Combine marking engines dirty with wmb

[Chris Wilson]

Quoting Mika Kuoppala (2018-05-07 17:52:19)
> It is a common pattern to mark the tlbs dirty along with flushing
> the writes. Introduce gen6_ppgtt_invalidate for this.

It wasn't that common at all. We were careful not to do more wmb() than
required before; not so now.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 3/5] drm/i915/gtt: Don't track dirty in gen6_alloc_va_range

[Chris Wilson]

Quoting Mika Kuoppala (2018-05-07 17:52:20)
> gen6_alloc_va_range is only used to init the aliasing ppgtt, so
> we can be certain that it will be dirty every time. No need
> to track it.

Nah, we want it for full-ppgtt...
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 4/5] drm/i915/gtt: Flush write combining buffer on insert entries

[Chris Wilson]

Quoting Mika Kuoppala (2018-05-07 17:52:21)
> We could be using write combining map through which we insert
> our ptes. Make sure to flush the write combining buffer
> after the writes.

"Could?" We do flush the ppgtt before execution, and the ppgtt is only
used by execution.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 1/5] drm/i915/gtt: Move wmb inside ggtt_invalidate

[Chris Wilson]

Quoting Mika Kuoppala (2018-05-07 17:52:18)
> We use a pattern of wmb() along with ggtt_invalidate.
> Move the wmb out from call sites into the ggtt_invalidate
> as it is part of invalidation.
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

If we take this and the last which look at ggtt together, then
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

I've a persistent dread when it comes to write through the GTT itself,
as different wc buffers seem to mess up aliasing, but this should be
simple wc vs uc mmio, so playing by concrete rules.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx