From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ley Foon Tan Date: Tue, 8 May 2018 11:19:26 +0800 Subject: [U-Boot] [PATCH v3 3/3] net: designware: Add reset ctrl to driver In-Reply-To: <1525749566-50769-1-git-send-email-ley.foon.tan@intel.com> References: <1525749566-50769-1-git-send-email-ley.foon.tan@intel.com> Message-ID: <1525749566-50769-4-git-send-email-ley.foon.tan@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add code to reset all reset signals as in Ethernet DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Ley Foon Tan --- drivers/net/designware.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index cf12521..6797691 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -664,6 +665,7 @@ int designware_eth_probe(struct udevice *dev) u32 iobase = pdata->iobase; ulong ioaddr; int ret; + struct reset_ctl_bulk reset_bulk; #ifdef CONFIG_CLK int i, err, clock_nb; @@ -710,6 +712,12 @@ int designware_eth_probe(struct udevice *dev) } #endif + ret = reset_get_bulk(dev, &reset_bulk); + if (ret) + dev_warn(dev, "Can't get reset: %d\n", ret); + else + reset_deassert_bulk(&reset_bulk); + #ifdef CONFIG_DM_PCI /* * If we are on PCI bus, either directly attached to a PCI root port, -- 1.7.1