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From: Ben Kalo <ben.h.kalo@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [cosmetic PATCH v1] ARM: socfpga: Fix Documentation errors in scu_registers
Date: Tue, 15 May 2018 19:45:37 +0300	[thread overview]
Message-ID: <1526402738-21963-1-git-send-email-ben.h.kalo@gmail.com> (raw)

According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers
Access Control register offset is 0x50.

Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
---

 arch/arm/mach-socfpga/include/mach/scu.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/scu.h b/arch/arm/mach-socfpga/include/mach/scu.h
index 27224b1..b684a55 100644
--- a/arch/arm/mach-socfpga/include/mach/scu.h
+++ b/arch/arm/mach-socfpga/include/mach/scu.h
@@ -14,8 +14,8 @@ struct scu_registers {
 	u32	_pad_0x10_0x3c[12];	/* 0x10 */
 	u32	fsar;			/* 0x40 */
 	u32	fear;
-	u32	_pad_0x48_0x50[2];
-	u32	acr;			/* 0x54 */
+	u32	_pad_0x48_0x4c[2];
+	u32	acr;			/* 0x50 */
 	u32	sacr;
 };
 
-- 
2.7.4

             reply	other threads:[~2018-05-15 16:45 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-15 16:45 Ben Kalo [this message]
2018-05-16  9:33 ` [U-Boot] [cosmetic PATCH v1] ARM: socfpga: Fix Documentation errors in scu_registers Marek Vasut

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