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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 6/7] drm/i915/execlists: Flush pending preemption events during reset
Date: Wed, 16 May 2018 16:01:50 +0100	[thread overview]
Message-ID: <152648291060.11239.8837454455472599109@mail.alporthouse.com> (raw)
In-Reply-To: <6a5f067d-ee78-6a51-ab09-31940d58fb18@linux.intel.com>

Quoting Tvrtko Ursulin (2018-05-16 15:24:33)
> > +     /*
> > +      * The last active request can then be no later than the last request
> > +      * now in ELSP[0]. So search backwards from there, so that if the GPU
> > +      * has advanced beyond the last CSB update, it will be pardoned.
> > +      */
> > +     active = NULL;
> > +     request = port_request(execlists->port);
> > +     if (request) {
> 
> Assignment to request is for nothing it seems.
> 
> > +             unsigned long flags;
> > +
> > +             spin_lock_irqsave(&engine->timeline.lock, flags);
> > +             list_for_each_entry_from_reverse(request,

It's a 'from' list_for_each variant.

> > +                                              &engine->timeline.requests,
> > +                                              link) {
> > +                     if (__i915_request_completed(request,
> > +                                                  request->global_seqno))
> > +                             break;
> > +
> > +                     active = request;
> > +             }
> > +             spin_unlock_irqrestore(&engine->timeline.lock, flags);
> > +     }
> > +
> > +     return active;
> >   }
> >   
> >   static void execlists_reset(struct intel_engine_cs *engine,
> > 
> 
> No other complaints and I could be bribed to look past the request to 
> split it. :)

Is not clearing the backlog so we can get onto features not enough
incentive? Chocolate? Beer? Chocolate-flavoured beer?
-Chris
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  reply	other threads:[~2018-05-16 15:01 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-16  6:47 [PATCH 1/7] drm/i915: Remove tasklet flush before disable Chris Wilson
2018-05-16  6:47 ` [PATCH 2/7] drm/i915: Only sync tasklets once for recursive reset preparation Chris Wilson
2018-05-16 14:24   ` Mika Kuoppala
2018-05-16 14:29     ` Chris Wilson
2018-05-16  6:47 ` [PATCH 3/7] drm/i915/execlists: Refactor out complete_preempt_context() Chris Wilson
2018-05-16  6:47 ` [PATCH 4/7] drm/i915: Move engine reset prepare/finish to backends Chris Wilson
2018-05-16  6:47 ` [PATCH 5/7] drm/i915: Split execlists/guc reset preparations Chris Wilson
2018-05-16  6:47 ` [PATCH 6/7] drm/i915/execlists: Flush pending preemption events during reset Chris Wilson
2018-05-16 14:24   ` Tvrtko Ursulin
2018-05-16 15:01     ` Chris Wilson [this message]
2018-05-16  6:47 ` [PATCH 7/7] drm/i915: Stop parking the signaler around reset Chris Wilson
2018-05-16  9:15   ` Tvrtko Ursulin
2018-05-16  9:25     ` Chris Wilson
2018-05-16  9:49       ` Tvrtko Ursulin
2018-05-16  9:58         ` Chris Wilson
2018-05-16 10:13   ` [PATCH v2] " Chris Wilson
2018-05-16 10:37     ` Tvrtko Ursulin
2018-05-16  7:09 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Remove tasklet flush before disable Patchwork
2018-05-16  7:27 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-16  8:39 ` [PATCH 1/7] " Mika Kuoppala
2018-05-16  8:41   ` Chris Wilson
2018-05-16  9:57     ` Mika Kuoppala
2018-05-16 10:33 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Remove tasklet flush before disable (rev2) Patchwork
2018-05-16 10:48 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-16 14:21 ` ✗ Fi.CI.IGT: failure for series starting with [1/7] drm/i915: Remove tasklet flush before disable Patchwork
2018-05-16 18:26 ` ✗ Fi.CI.IGT: failure for series starting with [1/7] drm/i915: Remove tasklet flush before disable (rev2) Patchwork
2018-05-16 15:12 [PATCH 1/7] drm/i915: Remove tasklet flush before disable Chris Wilson
2018-05-16 15:12 ` [PATCH 6/7] drm/i915/execlists: Flush pending preemption events during reset Chris Wilson
2018-05-16 15:31   ` Tvrtko Ursulin

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