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From: no-reply@patchew.org
To: richard.henderson@linaro.org
Cc: famz@redhat.com, qemu-devel@nongnu.org, peter.maydell@linaro.org,
	qemu-arm@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3-a 00/27] target/arm: Scalable Vector Extension
Date: Wed, 16 May 2018 16:01:41 -0700 (PDT)	[thread overview]
Message-ID: <152651170062.258.10553300984590992969@1f70390a8372> (raw)
In-Reply-To: <20180516223007.10256-1-richard.henderson@linaro.org>

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20180516223007.10256-1-richard.henderson@linaro.org
Subject: [Qemu-devel] [PATCH v3-a 00/27] target/arm: Scalable Vector Extension

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20180516223007.10256-1-richard.henderson@linaro.org -> patchew/20180516223007.10256-1-richard.henderson@linaro.org
Switched to a new branch 'test'
d5d6c8f1c1 target/arm: Implement SVE Permute - Unpredicated Group
3e81d585ea target/arm: Extend vec_reg_offset to larger sizes
b1fd0b35ed target/arm: Implement SVE Permute - Extract Group
7440d418b4 target/arm: Implement SVE Integer Wide Immediate - Predicated Group
c35230538c target/arm: Implement SVE Bitwise Immediate Group
b74492415e target/arm: Implement SVE Element Count Group
4c4d56ab60 target/arm: Implement SVE floating-point trig select coefficient
9037d7db89 target/arm: Implement SVE floating-point exponential accelerator
4dcb0e1e0d target/arm: Implement SVE Compute Vector Address Group
6ebd038b3f target/arm: Implement SVE Bitwise Shift - Unpredicated Group
6f313170d7 target/arm: Implement SVE Stack Allocation Group
3ac441769e target/arm: Implement SVE Index Generation Group
55bb3f6e0f target/arm: Implement SVE Integer Arithmetic - Unpredicated Group
a903947c6e target/arm: Implement SVE Integer Multiply-Add Group
61ca1958eb target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group
10ebd0fdb6 target/arm: Implement SVE bitwise shift by wide elements (predicated)
2bc70c192a target/arm: Implement SVE bitwise shift by vector (predicated)
df68c49188 target/arm: Implement SVE bitwise shift by immediate (predicated)
f7ff94163d target/arm: Implement SVE Integer Reduction Group
b1496deb00 target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group
c5f223b5fb target/arm: Implement SVE Predicate Misc Group
a437ba8c21 target/arm: Implement SVE Predicate Logical Operations Group
c2eb96dd2f target/arm: Implement SVE predicate test
d8c66d6568 target/arm: Implement SVE load vector/predicate
356c9c883c target/arm: Implement SVE Bitwise Logical - Unpredicated Group
932a4173aa target/arm: Add SVE decode skeleton
313294c78c target/arm: Introduce translate-a64.h

=== OUTPUT BEGIN ===
Checking PATCH 1/27: target/arm: Introduce translate-a64.h...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#256: 
new file mode 100644

total: 0 errors, 1 warnings, 337 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 2/27: target/arm: Add SVE decode skeleton...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 140 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 3/27: target/arm: Implement SVE Bitwise Logical - Unpredicated Group...
Checking PATCH 4/27: target/arm: Implement SVE load vector/predicate...
Checking PATCH 5/27: target/arm: Implement SVE predicate test...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#21: 
new file mode 100644

total: 0 errors, 1 warnings, 197 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 6/27: target/arm: Implement SVE Predicate Logical Operations Group...
Checking PATCH 7/27: target/arm: Implement SVE Predicate Misc Group...
Checking PATCH 8/27: target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group...
Checking PATCH 9/27: target/arm: Implement SVE Integer Reduction Group...
Checking PATCH 10/27: target/arm: Implement SVE bitwise shift by immediate (predicated)...
Checking PATCH 11/27: target/arm: Implement SVE bitwise shift by vector (predicated)...
Checking PATCH 12/27: target/arm: Implement SVE bitwise shift by wide elements (predicated)...
ERROR: spaces required around that '*' (ctx:WxV)
#118: FILE: target/arm/translate-sve.c:505:
+static bool trans_##NAME##_zpzw(DisasContext *s, arg_rprr_esz *a,         \
                                                               ^

total: 1 errors, 0 warnings, 110 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 13/27: target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group...
ERROR: spaces required around that '-' (ctx:VxV)
#185: FILE: target/arm/sve_helper.c:564:
+#define DO_FABS(N)    (N & ((__typeof(N))-1 >> 1))
                                          ^

ERROR: spaces required around that '-' (ctx:VxV)
#191: FILE: target/arm/sve_helper.c:570:
+#define DO_FNEG(N)    (N ^ ~((__typeof(N))-1 >> 1))
                                           ^

total: 2 errors, 0 warnings, 347 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 14/27: target/arm: Implement SVE Integer Multiply-Add Group...
Checking PATCH 15/27: target/arm: Implement SVE Integer Arithmetic - Unpredicated Group...
Checking PATCH 16/27: target/arm: Implement SVE Index Generation Group...
Checking PATCH 17/27: target/arm: Implement SVE Stack Allocation Group...
Checking PATCH 18/27: target/arm: Implement SVE Bitwise Shift - Unpredicated Group...
Checking PATCH 19/27: target/arm: Implement SVE Compute Vector Address Group...
Checking PATCH 20/27: target/arm: Implement SVE floating-point exponential accelerator...
Checking PATCH 21/27: target/arm: Implement SVE floating-point trig select coefficient...
Checking PATCH 22/27: target/arm: Implement SVE Element Count Group...
Checking PATCH 23/27: target/arm: Implement SVE Bitwise Immediate Group...
Checking PATCH 24/27: target/arm: Implement SVE Integer Wide Immediate - Predicated Group...
Checking PATCH 25/27: target/arm: Implement SVE Permute - Extract Group...
Checking PATCH 26/27: target/arm: Extend vec_reg_offset to larger sizes...
Checking PATCH 27/27: target/arm: Implement SVE Permute - Unpredicated Group...
ERROR: space prohibited before that close parenthesis ')'
#116: FILE: target/arm/sve_helper.c:1575:
+DO_INSR(sve_insr_d, uint64_t, )

ERROR: space prohibited before that close parenthesis ')'
#190: FILE: target/arm/sve_helper.c:1649:
+DO_TBL(sve_tbl_d, uint64_t, )

total: 2 errors, 0 warnings, 330 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


---
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Please send your feedback to patchew-devel@redhat.com

  parent reply	other threads:[~2018-05-17 10:47 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-16 22:29 [Qemu-devel] [PATCH v3-a 00/27] target/arm: Scalable Vector Extension Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 01/27] target/arm: Introduce translate-a64.h Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 02/27] target/arm: Add SVE decode skeleton Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 03/27] target/arm: Implement SVE Bitwise Logical - Unpredicated Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 04/27] target/arm: Implement SVE load vector/predicate Richard Henderson
2018-05-17 16:02   ` Peter Maydell
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 05/27] target/arm: Implement SVE predicate test Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 06/27] target/arm: Implement SVE Predicate Logical Operations Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 07/27] target/arm: Implement SVE Predicate Misc Group Richard Henderson
2018-05-17 16:11   ` Peter Maydell
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 08/27] target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group Richard Henderson
2018-05-17 16:03   ` Peter Maydell
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 09/27] target/arm: Implement SVE Integer Reduction Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 10/27] target/arm: Implement SVE bitwise shift by immediate (predicated) Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 11/27] target/arm: Implement SVE bitwise shift by vector (predicated) Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 12/27] target/arm: Implement SVE bitwise shift by wide elements (predicated) Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 13/27] target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 14/27] target/arm: Implement SVE Integer Multiply-Add Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 15/27] target/arm: Implement SVE Integer Arithmetic - Unpredicated Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 16/27] target/arm: Implement SVE Index Generation Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 17/27] target/arm: Implement SVE Stack Allocation Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 18/27] target/arm: Implement SVE Bitwise Shift - Unpredicated Group Richard Henderson
2018-05-16 22:29 ` [Qemu-devel] [PATCH v3-a 19/27] target/arm: Implement SVE Compute Vector Address Group Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 20/27] target/arm: Implement SVE floating-point exponential accelerator Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 21/27] target/arm: Implement SVE floating-point trig select coefficient Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 22/27] target/arm: Implement SVE Element Count Group Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 23/27] target/arm: Implement SVE Bitwise Immediate Group Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 24/27] target/arm: Implement SVE Integer Wide Immediate - Predicated Group Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 25/27] target/arm: Implement SVE Permute - Extract Group Richard Henderson
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 26/27] target/arm: Extend vec_reg_offset to larger sizes Richard Henderson
2018-05-17 15:57   ` Peter Maydell
2018-05-17 16:51     ` Richard Henderson
2018-05-17 16:56       ` Peter Maydell
2018-05-16 22:30 ` [Qemu-devel] [PATCH v3-a 27/27] target/arm: Implement SVE Permute - Unpredicated Group Richard Henderson
2018-05-16 23:01 ` no-reply [this message]
2018-05-18 12:16 ` [Qemu-devel] [PATCH v3-a 00/27] target/arm: Scalable Vector Extension Peter Maydell

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