From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41688) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fKqaP-0000fV-2i for qemu-devel@nongnu.org; Mon, 21 May 2018 15:35:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fKqaL-0003Ci-U4 for qemu-devel@nongnu.org; Mon, 21 May 2018 15:35:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:60242) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fKqaL-0003Ar-PJ for qemu-devel@nongnu.org; Mon, 21 May 2018 15:35:09 -0400 From: Stefano Stabellini Date: Mon, 21 May 2018 12:34:53 -0700 Message-Id: <1526931304-7289-4-git-send-email-sstabellini@kernel.org> In-Reply-To: References: Subject: [Qemu-devel] [PULL 04/15] xen_pt: Present the size of 64 bit BARs correctly List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org, stefanha@gmail.com Cc: sstabellini@kernel.org, stefanha@redhat.com, anthony.perard@citrix.com, xen-devel@lists.xenproject.org, qemu-devel@nongnu.org, Ross Lagerwall From: Ross Lagerwall The full size of the BAR is stored in the lower PCIIORegion.size. The upper PCIIORegion.size is 0. Calculate the size of the upper half correctly from the lower half otherwise the size read by the guest will be incorrect. Signed-off-by: Ross Lagerwall Acked-by: Anthony PERARD Signed-off-by: Stefano Stabellini --- hw/xen/xen_pt_config_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c index a3ce33e..aee31c6 100644 --- a/hw/xen/xen_pt_config_init.c +++ b/hw/xen/xen_pt_config_init.c @@ -504,6 +504,8 @@ static int xen_pt_bar_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry, bar_ro_mask = XEN_PT_BAR_IO_RO_MASK | (r_size - 1); break; case XEN_PT_BAR_FLAG_UPPER: + assert(index > 0); + r_size = d->io_regions[index - 1].size >> 32; bar_emu_mask = XEN_PT_BAR_ALLF; bar_ro_mask = r_size ? r_size - 1 : 0; break; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Stabellini Subject: [PULL 04/15] xen_pt: Present the size of 64 bit BARs correctly Date: Mon, 21 May 2018 12:34:53 -0700 Message-ID: <1526931304-7289-4-git-send-email-sstabellini@kernel.org> References: Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1fKqaN-0000Sr-2t for xen-devel@lists.xenproject.org; Mon, 21 May 2018 19:35:11 +0000 In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" To: peter.maydell@linaro.org, stefanha@gmail.com Cc: sstabellini@kernel.org, qemu-devel@nongnu.org, Ross Lagerwall , stefanha@redhat.com, anthony.perard@citrix.com, xen-devel@lists.xenproject.org List-Id: xen-devel@lists.xenproject.org RnJvbTogUm9zcyBMYWdlcndhbGwgPHJvc3MubGFnZXJ3YWxsQGNpdHJpeC5jb20+CgpUaGUgZnVs bCBzaXplIG9mIHRoZSBCQVIgaXMgc3RvcmVkIGluIHRoZSBsb3dlciBQQ0lJT1JlZ2lvbi5zaXpl LiBUaGUKdXBwZXIgUENJSU9SZWdpb24uc2l6ZSBpcyAwLiAgQ2FsY3VsYXRlIHRoZSBzaXplIG9m IHRoZSB1cHBlciBoYWxmCmNvcnJlY3RseSBmcm9tIHRoZSBsb3dlciBoYWxmIG90aGVyd2lzZSB0 aGUgc2l6ZSByZWFkIGJ5IHRoZSBndWVzdCB3aWxsCmJlIGluY29ycmVjdC4KClNpZ25lZC1vZmYt Ynk6IFJvc3MgTGFnZXJ3YWxsIDxyb3NzLmxhZ2Vyd2FsbEBjaXRyaXguY29tPgpBY2tlZC1ieTog QW50aG9ueSBQRVJBUkQgPGFudGhvbnkucGVyYXJkQGNpdHJpeC5jb20+ClNpZ25lZC1vZmYtYnk6 IFN0ZWZhbm8gU3RhYmVsbGluaSA8c3N0YWJlbGxpbmlAa2VybmVsLm9yZz4KLS0tCiBody94ZW4v eGVuX3B0X2NvbmZpZ19pbml0LmMgfCAyICsrCiAxIGZpbGUgY2hhbmdlZCwgMiBpbnNlcnRpb25z KCspCgpkaWZmIC0tZ2l0IGEvaHcveGVuL3hlbl9wdF9jb25maWdfaW5pdC5jIGIvaHcveGVuL3hl bl9wdF9jb25maWdfaW5pdC5jCmluZGV4IGEzY2UzM2UuLmFlZTMxYzYgMTAwNjQ0Ci0tLSBhL2h3 L3hlbi94ZW5fcHRfY29uZmlnX2luaXQuYworKysgYi9ody94ZW4veGVuX3B0X2NvbmZpZ19pbml0 LmMKQEAgLTUwNCw2ICs1MDQsOCBAQCBzdGF0aWMgaW50IHhlbl9wdF9iYXJfcmVnX3dyaXRlKFhl blBDSVBhc3N0aHJvdWdoU3RhdGUgKnMsIFhlblBUUmVnICpjZmdfZW50cnksCiAgICAgICAgIGJh cl9yb19tYXNrID0gWEVOX1BUX0JBUl9JT19ST19NQVNLIHwgKHJfc2l6ZSAtIDEpOwogICAgICAg ICBicmVhazsKICAgICBjYXNlIFhFTl9QVF9CQVJfRkxBR19VUFBFUjoKKyAgICAgICAgYXNzZXJ0 KGluZGV4ID4gMCk7CisgICAgICAgIHJfc2l6ZSA9IGQtPmlvX3JlZ2lvbnNbaW5kZXggLSAxXS5z aXplID4+IDMyOwogICAgICAgICBiYXJfZW11X21hc2sgPSBYRU5fUFRfQkFSX0FMTEY7CiAgICAg ICAgIGJhcl9yb19tYXNrID0gcl9zaXplID8gcl9zaXplIC0gMSA6IDA7CiAgICAgICAgIGJyZWFr OwotLSAKMS45LjEKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fXwpYZW4tZGV2ZWwgbWFpbGluZyBsaXN0Clhlbi1kZXZlbEBsaXN0cy54ZW5wcm9qZWN0Lm9y ZwpodHRwczovL2xpc3RzLnhlbnByb2plY3Qub3JnL21haWxtYW4vbGlzdGluZm8veGVuLWRldmVs