From: Amit Nischal <anischal@codeaurora.org>
To: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>
Cc: Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
Odelu Kukatla <okukatla@codeaurora.org>,
Taniya Das <tdas@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
Amit Nischal <anischal@codeaurora.org>
Subject: [PATCH 0/4] Add QCOM graphics clock controller driver for SDM845
Date: Wed, 6 Jun 2018 17:11:44 +0530 [thread overview]
Message-ID: <1528285308-25477-1-git-send-email-anischal@codeaurora.org> (raw)
This patch series adds support for graphics clock controller for SDM845.
Below is the brief description for each change:
1. For some of the GDSCs, there is requirement to enable/disable the
few clocks before turning on/off the gdsc power domain. This patch
will add support to enable/disable the clock associated with the
gdsc along with power domain on/off callbacks.
2. To turn on the gpu_gx_gdsc, there is a hardware requirement to
turn on the root clock (GFX3D RCG) first which would be the turn
on signal for the gdsc along with the SW_COLLAPSE. As per the
current implementation of clk_rcg2_shared_ops, it clears the
root_enable bit in the enable() and set_rate() clock ops. But due
to the above said requirement for GFX3D shared RCG, root_enable bit
would be already set by gdsc driver and rcg2_shared_ops should not clear
the root unless the disable() is called.
This patch add support for the same by reusing the existing
clk_rcg2_shared_ops and deriving "clk_rcg2_gfx3d_ops" clk_ops
for GFX3D clock to take care of the root set/clear requirement.
3. Add device tree bindings for graphics clock controller for SDM845.
4. Add graphics clock controller (GPUCC) driver for SDM845.
Amit Nischal (4):
clk: qcom: gdsc: Add support to enable/disable the clocks with GDSC
clk: qcom: Add clk_rcg2_gfx3d_ops for SDM845
dt-bindings: clock: Introduce QCOM Graphics clock bindings
clk: qcom: Add graphics clock controller driver for SDM845
.../devicetree/bindings/clock/qcom,gpucc.txt | 18 +
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/clk-rcg.h | 1 +
drivers/clk/qcom/clk-rcg2.c | 78 +++-
drivers/clk/qcom/gdsc.c | 44 ++
drivers/clk/qcom/gdsc.h | 5 +
drivers/clk/qcom/gpucc-sdm845.c | 441 +++++++++++++++++++++
include/dt-bindings/clock/qcom,gpucc-sdm845.h | 38 ++
9 files changed, 614 insertions(+), 21 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc.txt
create mode 100644 drivers/clk/qcom/gpucc-sdm845.c
create mode 100644 include/dt-bindings/clock/qcom,gpucc-sdm845.h
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next reply other threads:[~2018-06-06 11:41 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-06 11:41 Amit Nischal [this message]
2018-06-06 11:41 ` [PATCH 1/4] clk: qcom: gdsc: Add support to enable/disable the clocks with GDSC Amit Nischal
2018-07-09 5:34 ` Stephen Boyd
2018-07-09 5:34 ` Stephen Boyd
2018-07-09 5:34 ` Stephen Boyd
2018-07-12 12:23 ` Amit Nischal
2018-07-25 6:52 ` Stephen Boyd
2018-07-25 6:52 ` Stephen Boyd
2018-07-30 11:14 ` Amit Nischal
2018-06-06 11:41 ` [PATCH 2/4] clk: qcom: Add clk_rcg2_gfx3d_ops for SDM845 Amit Nischal
2018-07-09 6:15 ` Stephen Boyd
2018-07-09 6:15 ` Stephen Boyd
2018-07-09 6:15 ` Stephen Boyd
2018-07-12 12:30 ` Amit Nischal
2018-07-25 6:58 ` Stephen Boyd
2018-07-25 6:58 ` Stephen Boyd
2018-07-30 11:28 ` Amit Nischal
2018-08-02 22:44 ` Stephen Boyd
2018-08-02 22:44 ` Stephen Boyd
2018-08-06 9:07 ` Amit Nischal
2018-08-06 15:04 ` Jordan Crouse
2018-08-08 5:58 ` Stephen Boyd
2018-08-08 5:58 ` Stephen Boyd
2018-08-08 14:51 ` Jordan Crouse
2018-08-13 6:30 ` Amit Nischal
2018-06-06 11:41 ` [PATCH 3/4] dt-bindings: clock: Introduce QCOM Graphics clock bindings Amit Nischal
2018-07-09 5:38 ` Stephen Boyd
2018-07-09 5:38 ` Stephen Boyd
2018-07-09 5:38 ` Stephen Boyd
2018-07-12 12:32 ` Amit Nischal
2018-06-06 11:41 ` [PATCH 4/4] clk: qcom: Add graphics clock controller driver for SDM845 Amit Nischal
2018-07-09 6:07 ` Stephen Boyd
2018-07-09 6:07 ` Stephen Boyd
2018-07-09 6:07 ` Stephen Boyd
2018-07-12 12:38 ` Amit Nischal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1528285308-25477-1-git-send-email-anischal@codeaurora.org \
--to=anischal@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=david.brown@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=okukatla@codeaurora.org \
--cc=rnayak@codeaurora.org \
--cc=sboyd@kernel.org \
--cc=tdas@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.