From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomasz Jozwiak Subject: [PATCH v3 14/38] crypto/qat: move defines from sym to qp header file Date: Wed, 13 Jun 2018 14:13:58 +0200 Message-ID: <1528892062-4997-15-git-send-email-tomaszx.jozwiak@intel.com> References: <1523040732-3290-1-git-send-email-fiona.trahe@intel.com> <1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com> To: fiona.trahe@intel.com, tomaszx.jozwiak@intel.com, dev@dpdk.org Return-path: Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id C930C1EF52 for ; Wed, 13 Jun 2018 14:15:00 +0200 (CEST) In-Reply-To: <1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Fiona Trahe Move defines related to coalescing from sym header file to qp header file as these will be common for all services. Signed-off-by: Fiona Trahe --- drivers/crypto/qat/qat_qp.h | 7 +++++++ drivers/crypto/qat/qat_sym.h | 7 ------- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/qat/qat_qp.h b/drivers/crypto/qat/qat_qp.h index 7bd8fdcec..8cf072c55 100644 --- a/drivers/crypto/qat/qat_qp.h +++ b/drivers/crypto/qat/qat_qp.h @@ -7,6 +7,13 @@ #include "qat_common.h" #include "qat_device.h" +#define QAT_CSR_HEAD_WRITE_THRESH 32U +/* number of requests to accumulate before writing head CSR */ +#define QAT_CSR_TAIL_WRITE_THRESH 32U +/* number of requests to accumulate before writing tail CSR */ +#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U +/* number of inflights below which no tail write coalescing should occur */ + typedef int (*build_request_t)(void *op, uint8_t *req, void *op_cookie, enum qat_device_gen qat_dev_gen); diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h index 39574eeb6..b92ec72de 100644 --- a/drivers/crypto/qat/qat_sym.h +++ b/drivers/crypto/qat/qat_sym.h @@ -20,13 +20,6 @@ (((num) + (align) - 1) & ~((align) - 1)) #define QAT_64_BTYE_ALIGN_MASK (~0x3f) -#define QAT_CSR_HEAD_WRITE_THRESH 32U -/* number of requests to accumulate before writing head CSR */ -#define QAT_CSR_TAIL_WRITE_THRESH 32U -/* number of requests to accumulate before writing tail CSR */ -#define QAT_CSR_TAIL_FORCE_WRITE_THRESH 256U -/* number of inflights below which no tail write coalescing should occur */ - struct qat_sym_session; int -- 2.17.0