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From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: barrier: Implement smp_cond_load_relaxed
Date: Tue, 26 Jun 2018 12:00:10 +0100	[thread overview]
Message-ID: <1530010812-17161-2-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1530010812-17161-1-git-send-email-will.deacon@arm.com>

We can provide an implementation of smp_cond_load_relaxed using READ_ONCE
and __cmpwait_relaxed.

Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/barrier.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index f11518af96a9..822a9192c551 100644
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -128,6 +128,19 @@ do {									\
 	__u.__val;							\
 })
 
+#define smp_cond_load_relaxed(ptr, cond_expr)				\
+({									\
+	typeof(ptr) __PTR = (ptr);					\
+	typeof(*ptr) VAL;						\
+	for (;;) {							\
+		VAL = READ_ONCE(*__PTR);				\
+		if (cond_expr)						\
+			break;						\
+		__cmpwait_relaxed(__PTR, VAL);				\
+	}								\
+	VAL;								\
+})
+
 #define smp_cond_load_acquire(ptr, cond_expr)				\
 ({									\
 	typeof(ptr) __PTR = (ptr);					\
-- 
2.1.4

  reply	other threads:[~2018-06-26 11:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-26 11:00 [PATCH 0/3] Hook up qspinlock for arm64 Will Deacon
2018-06-26 11:00 ` Will Deacon [this message]
2018-06-26 11:00 ` [PATCH 2/3] arm64: locking: Replace ticket lock implementation with qspinlock Will Deacon
2018-06-26 11:00 ` [PATCH 3/3] arm64: kconfig: Ensure spinlock fastpaths are inlined if !PREEMPT Will Deacon
2018-07-20  9:07 ` [PATCH 0/3] Hook up qspinlock for arm64 John Garry

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