From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ran Wang Date: Fri, 27 Jul 2018 10:38:13 +0800 Subject: [U-Boot] [PATCH v2] armv8: layerscape: Enable EHCI access for LS1012A Message-ID: <1532659093-42964-1-git-send-email-ran.wang_1@nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Program Central Security Unit (CSU) to grant access permission for USB 2.0 controller, otherwiase EHCI funciton will down. Signed-off-by: Ran Wang --- Change in v2: - Add EL checking code to make sure related programming only happen in EL3 arch/arm/cpu/armv8/fsl-layerscape/soc.c | 9 +++++++++ arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 + 2 files changed, 10 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 6a56269..d8c3083 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -14,6 +14,7 @@ #include #include #include +#include #ifdef CONFIG_LAYERSCAPE_NS_ACCESS #include #endif @@ -668,6 +669,14 @@ void fsl_lsch2_early_init_f(void) CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN); } + /* + * Program Central Security Unit (CSU) to grant access + * permission for USB 2.0 controller + */ +#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL) + if (current_el() == 3) + set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW); +#endif /* Erratum */ erratum_a008850_early(); /* part 1 of 2 */ erratum_a009929(); diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h index fe97a93..d1b8efa 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h @@ -40,6 +40,7 @@ enum csu_cslx_ind { CSU_CSLX_ESDHC, CSU_CSLX_IFC = 45, CSU_CSLX_I2C1, + CSU_CSLX_USB_2, CSU_CSLX_I2C3 = 48, CSU_CSLX_I2C2, CSU_CSLX_DUART2 = 50, -- 2.7.4