From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1D67C43142 for ; Fri, 3 Aug 2018 03:12:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6615A216EE for ; Fri, 3 Aug 2018 03:12:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6615A216EE Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729778AbeHCFGJ (ORCPT ); Fri, 3 Aug 2018 01:06:09 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:62146 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727610AbeHCFFi (ORCPT ); Fri, 3 Aug 2018 01:05:38 -0400 X-UUID: 228cc5b3c54a4a0b807f572be33776c7-20180803 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 932321943; Fri, 03 Aug 2018 11:11:12 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 3 Aug 2018 11:11:10 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 3 Aug 2018 11:11:10 +0800 From: Stu Hsieh To: CK Hu , Philipp Zabel CC: David Airlie , Matthias Brugger , , , , , , Stu Hsieh Subject: [PATCH v2 00/15] Add RDMA memory mode support for mediatek SOC MT2712 Date: Fri, 3 Aug 2018 11:10:53 +0800 Message-ID: <1533265868-28110-1-git-send-email-stu.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series add RDMA memory mode support for mediatek SOC MT2712. MT2712 has three display data path, including three HW engine, two OVL and one RDMA. The RDMA used in third ddp and it need to be set memory mode, then RDMA could read data from memory and output to panel. Change in v2: - Remove some modification about dummy buffer in patch "drm/mediatek: add memory mode for RDMA": Register setting about reset and MATRIX_INT_MTX_SEL_DEFAULT. - Remove some patches about dummy buffer as folowing: "drm/mediatek: add drm_device in RDMA for mamory mode to reaquest buffer" "drm/mediatek: add dummy buffer for RDMA memory mode" - Rename and modify the v1 patch "drm/mediatek: add layer number condition for RDMA to control plane" as following patches to get the layer number by module. "drm/mediatek: add function to get layer number for component" "drm/mediatek: add callback function to return OVL layer number" "drm/mediatek: add callback function to return RDMA layer number" "drm/mediatek: use layer_nr function to get layer number to init plane" - Remove v1 patch "drm/mediatek: fixed the error value for add DSI1 in mutex" This patch would be send in the future. Stu Hsieh (15): drm/mediatek: add connection from RDMA0 to DPI1 drm/mediatek: add connection from RDMA0 to DSI1 drm/mediatek: add connection from RDMA1 to DSI0 drm/mediatek: add connection from RDMA2 to DSI0 drm/mediatek: add RDMA memory mode for crtc created drm/mediatek: add memory mode for RDMA drm/mediatek: add layer config to set RDMA for plane setting drm/mediatek: add RGB color format support for RDMA drm/mediatek: add YUYV/UYVY color format support for RDMA drm/mediatek: add function to get layer number for component drm/mediatek: add callback function to return OVL layer number drm/mediatek: add callback function to return RDMA layer number drm/mediatek: use layer_nr function to get layer number to init plane drm/mediatek: update some variable name from ovl to comp drm/mediatek: fix connection from RDMA2 to DSI1 drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 10 +++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 99 ++++++++++++++++++++++++++++- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 60 +++++++++++------ drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 4 +- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 18 +++++- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 8 +++ 6 files changed, 174 insertions(+), 25 deletions(-) -- 2.12.5.2.gbdf23ab From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stu Hsieh Subject: [PATCH v2 00/15] Add RDMA memory mode support for mediatek SOC MT2712 Date: Fri, 3 Aug 2018 11:10:53 +0800 Message-ID: <1533265868-28110-1-git-send-email-stu.hsieh@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: CK Hu , Philipp Zabel Cc: srv_heupstream@mediatek.com, David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, Stu Hsieh , Matthias Brugger , linux-arm-kernel@lists.infradead.org List-Id: linux-mediatek@lists.infradead.org VGhpcyBwYXRjaCBzZXJpZXMgYWRkIFJETUEgbWVtb3J5IG1vZGUgc3VwcG9ydCBmb3IgbWVkaWF0 ZWsgU09DIE1UMjcxMi4KTVQyNzEyIGhhcyB0aHJlZSBkaXNwbGF5IGRhdGEgcGF0aCwgaW5jbHVk aW5nIHRocmVlIEhXIGVuZ2luZSwKdHdvIE9WTCBhbmQgb25lIFJETUEuCgpUaGUgUkRNQSB1c2Vk IGluIHRoaXJkIGRkcCBhbmQgaXQgbmVlZCB0byBiZSBzZXQgbWVtb3J5IG1vZGUsCnRoZW4gUkRN QSBjb3VsZCByZWFkIGRhdGEgZnJvbSBtZW1vcnkgYW5kIG91dHB1dCB0byBwYW5lbC4KCkNoYW5n ZSBpbiB2MjoKLSBSZW1vdmUgc29tZSBtb2RpZmljYXRpb24gYWJvdXQgZHVtbXkgYnVmZmVyIGlu IHBhdGNoCiAgImRybS9tZWRpYXRlazogYWRkIG1lbW9yeSBtb2RlIGZvciBSRE1BIjoKICBSZWdp c3RlciBzZXR0aW5nIGFib3V0IHJlc2V0IGFuZCBNQVRSSVhfSU5UX01UWF9TRUxfREVGQVVMVC4K LSBSZW1vdmUgc29tZSBwYXRjaGVzIGFib3V0IGR1bW15IGJ1ZmZlciBhcyBmb2xvd2luZzoKICAi ZHJtL21lZGlhdGVrOiBhZGQgZHJtX2RldmljZSBpbiBSRE1BIGZvciBtYW1vcnkgbW9kZSB0byBy ZWFxdWVzdCBidWZmZXIiCiAgImRybS9tZWRpYXRlazogYWRkIGR1bW15IGJ1ZmZlciBmb3IgUkRN QSBtZW1vcnkgbW9kZSIKLSBSZW5hbWUgYW5kIG1vZGlmeSB0aGUgdjEgcGF0Y2gKICAiZHJtL21l ZGlhdGVrOiBhZGQgbGF5ZXIgbnVtYmVyIGNvbmRpdGlvbiBmb3IgUkRNQSB0byBjb250cm9sIHBs YW5lIgogIGFzIGZvbGxvd2luZyBwYXRjaGVzIHRvIGdldCB0aGUgbGF5ZXIgbnVtYmVyIGJ5IG1v ZHVsZS4KICAiZHJtL21lZGlhdGVrOiBhZGQgZnVuY3Rpb24gdG8gZ2V0IGxheWVyIG51bWJlciBm b3IgY29tcG9uZW50IgogICJkcm0vbWVkaWF0ZWs6IGFkZCBjYWxsYmFjayBmdW5jdGlvbiB0byBy ZXR1cm4gT1ZMIGxheWVyIG51bWJlciIKICAiZHJtL21lZGlhdGVrOiBhZGQgY2FsbGJhY2sgZnVu Y3Rpb24gdG8gcmV0dXJuIFJETUEgbGF5ZXIgbnVtYmVyIgogICJkcm0vbWVkaWF0ZWs6IHVzZSBs YXllcl9uciBmdW5jdGlvbiB0byBnZXQgbGF5ZXIgbnVtYmVyIHRvIGluaXQgcGxhbmUiCi0gUmVt b3ZlIHYxIHBhdGNoCiAgImRybS9tZWRpYXRlazogZml4ZWQgdGhlIGVycm9yIHZhbHVlIGZvciBh ZGQgRFNJMSBpbiBtdXRleCIKICBUaGlzIHBhdGNoIHdvdWxkIGJlIHNlbmQgaW4gdGhlIGZ1dHVy ZS4KClN0dSBIc2llaCAoMTUpOgogIGRybS9tZWRpYXRlazogYWRkIGNvbm5lY3Rpb24gZnJvbSBS RE1BMCB0byBEUEkxCiAgZHJtL21lZGlhdGVrOiBhZGQgY29ubmVjdGlvbiBmcm9tIFJETUEwIHRv IERTSTEKICBkcm0vbWVkaWF0ZWs6IGFkZCBjb25uZWN0aW9uIGZyb20gUkRNQTEgdG8gRFNJMAog IGRybS9tZWRpYXRlazogYWRkIGNvbm5lY3Rpb24gZnJvbSBSRE1BMiB0byBEU0kwCiAgZHJtL21l ZGlhdGVrOiBhZGQgUkRNQSBtZW1vcnkgbW9kZSBmb3IgY3J0YyBjcmVhdGVkCiAgZHJtL21lZGlh dGVrOiBhZGQgbWVtb3J5IG1vZGUgZm9yIFJETUEKICBkcm0vbWVkaWF0ZWs6IGFkZCBsYXllciBj b25maWcgdG8gc2V0IFJETUEgZm9yIHBsYW5lIHNldHRpbmcKICBkcm0vbWVkaWF0ZWs6IGFkZCBS R0IgY29sb3IgZm9ybWF0IHN1cHBvcnQgZm9yIFJETUEKICBkcm0vbWVkaWF0ZWs6IGFkZCBZVVlW L1VZVlkgY29sb3IgZm9ybWF0IHN1cHBvcnQgZm9yIFJETUEKICBkcm0vbWVkaWF0ZWs6IGFkZCBm dW5jdGlvbiB0byBnZXQgbGF5ZXIgbnVtYmVyIGZvciBjb21wb25lbnQKICBkcm0vbWVkaWF0ZWs6 IGFkZCBjYWxsYmFjayBmdW5jdGlvbiB0byByZXR1cm4gT1ZMIGxheWVyIG51bWJlcgogIGRybS9t ZWRpYXRlazogYWRkIGNhbGxiYWNrIGZ1bmN0aW9uIHRvIHJldHVybiBSRE1BIGxheWVyIG51bWJl cgogIGRybS9tZWRpYXRlazogdXNlIGxheWVyX25yIGZ1bmN0aW9uIHRvIGdldCBsYXllciBudW1i ZXIgdG8gaW5pdCBwbGFuZQogIGRybS9tZWRpYXRlazogdXBkYXRlIHNvbWUgdmFyaWFibGUgbmFt ZSBmcm9tIG92bCB0byBjb21wCiAgZHJtL21lZGlhdGVrOiBmaXggY29ubmVjdGlvbiBmcm9tIFJE TUEyIHRvIERTSTEKCiBkcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2Rpc3Bfb3ZsLmMgICAg IHwgMTAgKysrCiBkcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2Rpc3BfcmRtYS5jICAgIHwg OTkgKysrKysrKysrKysrKysrKysrKysrKysrKysrKy0KIGRyaXZlcnMvZ3B1L2RybS9tZWRpYXRl ay9tdGtfZHJtX2NydGMuYyAgICAgfCA2MCArKysrKysrKysrKy0tLS0tLQogZHJpdmVycy9ncHUv ZHJtL21lZGlhdGVrL210a19kcm1fY3J0Yy5oICAgICB8ICA0ICstCiBkcml2ZXJzL2dwdS9kcm0v bWVkaWF0ZWsvbXRrX2RybV9kZHAuYyAgICAgIHwgMTggKysrKystCiBkcml2ZXJzL2dwdS9kcm0v bWVkaWF0ZWsvbXRrX2RybV9kZHBfY29tcC5oIHwgIDggKysrCiA2IGZpbGVzIGNoYW5nZWQsIDE3 NCBpbnNlcnRpb25zKCspLCAyNSBkZWxldGlvbnMoLSkKCi0tIAoyLjEyLjUuMi5nYmRmMjNhYgoK X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: stu.hsieh@mediatek.com (Stu Hsieh) Date: Fri, 3 Aug 2018 11:10:53 +0800 Subject: [PATCH v2 00/15] Add RDMA memory mode support for mediatek SOC MT2712 Message-ID: <1533265868-28110-1-git-send-email-stu.hsieh@mediatek.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch series add RDMA memory mode support for mediatek SOC MT2712. MT2712 has three display data path, including three HW engine, two OVL and one RDMA. The RDMA used in third ddp and it need to be set memory mode, then RDMA could read data from memory and output to panel. Change in v2: - Remove some modification about dummy buffer in patch "drm/mediatek: add memory mode for RDMA": Register setting about reset and MATRIX_INT_MTX_SEL_DEFAULT. - Remove some patches about dummy buffer as folowing: "drm/mediatek: add drm_device in RDMA for mamory mode to reaquest buffer" "drm/mediatek: add dummy buffer for RDMA memory mode" - Rename and modify the v1 patch "drm/mediatek: add layer number condition for RDMA to control plane" as following patches to get the layer number by module. "drm/mediatek: add function to get layer number for component" "drm/mediatek: add callback function to return OVL layer number" "drm/mediatek: add callback function to return RDMA layer number" "drm/mediatek: use layer_nr function to get layer number to init plane" - Remove v1 patch "drm/mediatek: fixed the error value for add DSI1 in mutex" This patch would be send in the future. Stu Hsieh (15): drm/mediatek: add connection from RDMA0 to DPI1 drm/mediatek: add connection from RDMA0 to DSI1 drm/mediatek: add connection from RDMA1 to DSI0 drm/mediatek: add connection from RDMA2 to DSI0 drm/mediatek: add RDMA memory mode for crtc created drm/mediatek: add memory mode for RDMA drm/mediatek: add layer config to set RDMA for plane setting drm/mediatek: add RGB color format support for RDMA drm/mediatek: add YUYV/UYVY color format support for RDMA drm/mediatek: add function to get layer number for component drm/mediatek: add callback function to return OVL layer number drm/mediatek: add callback function to return RDMA layer number drm/mediatek: use layer_nr function to get layer number to init plane drm/mediatek: update some variable name from ovl to comp drm/mediatek: fix connection from RDMA2 to DSI1 drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 10 +++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 99 ++++++++++++++++++++++++++++- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 60 +++++++++++------ drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 4 +- drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 18 +++++- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 8 +++ 6 files changed, 174 insertions(+), 25 deletions(-) -- 2.12.5.2.gbdf23ab