From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [PATCH 3/4] drm/i915: Clear all residual RPS events
 on disabling interrupts
Date: Fri, 03 Aug 2018 15:13:00 +0100
Message-ID: <153330558058.15063.10414131511848089179@skylake-alporthouse-com>
References: <20180802100631.31305-1-chris@chris-wilson.co.uk>
 <20180802100631.31305-3-chris@chris-wilson.co.uk>
 <8736vvft41.fsf@gaia.fi.intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192])
 by gabe.freedesktop.org (Postfix) with ESMTPS id 17FAC6E734
 for <intel-gfx@lists.freedesktop.org>; Fri,  3 Aug 2018 14:13:04 +0000 (UTC)
In-Reply-To: <8736vvft41.fsf@gaia.fi.intel.com>
List-Unsubscribe: <https://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <https://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <https://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

UXVvdGluZyBNaWthIEt1b3BwYWxhICgyMDE4LTA4LTAzIDE0OjU5OjU4KQo+IENocmlzIFdpbHNv
biA8Y2hyaXNAY2hyaXMtd2lsc29uLmNvLnVrPiB3cml0ZXM6Cj4gPiBkaWZmIC0tZ2l0IGEvZHJp
dmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVf
cmVnLmgKPiA+IGluZGV4IGUwZjU5OTlmZmYwNy4uNGI2NTZmMzFmZGU5IDEwMDY0NAo+ID4gLS0t
IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaAo+ID4gKysrIGIvZHJpdmVycy9ncHUv
ZHJtL2k5MTUvaTkxNV9yZWcuaAo+ID4gQEAgLTg1ODIsOCArODU4MiwxMCBAQCBlbnVtIHsKPiA+
ICAjZGVmaW5lICBHRU42X1BNX1JQX0RPV05fVEhSRVNIT0xEICAgICAgICAgICAoMSA8PCA0KQo+
ID4gICNkZWZpbmUgIEdFTjZfUE1fUlBfVVBfRUlfRVhQSVJFRCAgICAgICAgICAgICgxIDw8IDIp
Cj4gPiAgI2RlZmluZSAgR0VONl9QTV9SUF9ET1dOX0VJX0VYUElSRUQgICAgICAgICAgKDEgPDwg
MSkKPiA+IC0jZGVmaW5lICBHRU42X1BNX1JQU19FVkVOVFMgICAgICAgICAgICAgICAgICAoR0VO
Nl9QTV9SUF9VUF9USFJFU0hPTEQgfCBcCj4gPiAtICAgICAgICAgICAgICAgICAgICAgICAgICAg
ICAgICAgICAgICAgICAgICAgIEdFTjZfUE1fUlBfRE9XTl9USFJFU0hPTEQgfCBcCj4gPiArI2Rl
ZmluZSAgR0VONl9QTV9SUFNfRVZFTlRTICAgICAgICAgICAgICAgICAgKEdFTjZfUE1fUlBfVVBf
RUlfRVhQSVJFRCAgIHwgXAo+ID4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg
ICAgICAgICAgICBHRU42X1BNX1JQX1VQX1RIUkVTSE9MRCAgICB8IFwKPiA+ICsgICAgICAgICAg
ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgR0VONl9QTV9SUF9ET1dOX0VJX0VY
UElSRUQgfCBcCj4gPiArICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg
ICAgIEdFTjZfUE1fUlBfRE9XTl9USFJFU0hPTEQgIHwgXAo+ID4gICAgICAgICAgICAgICAgICAg
ICAgICAgICAgICAgICAgICAgICAgICAgICAgICBHRU42X1BNX1JQX0RPV05fVElNRU9VVCkKPiAK
PiBHRU42X1BNX1JQU19NQVNLID8KCkkgdGhpbmsgd2UgYXJlIHN0aWxsIG1pc3NpbmcgYSBmZXcs
IHNvIGV2ZW50cyBhcyBhIHN1cGVyc2V0IG9mCnBtX3Jwc19ldmVudHMgc2VlbXMgbGlrZSBhIHJl
YXNvbmFibGUgbWluaW11bSBjaGFuZ2UgOikKCkJvbnVzLCBhZGQgdGhlIG9uZXMgd2UgYXJlIG1p
c3NpbmcuCi1DaHJpcwpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5v
cmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1n
ZngK