From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Woodhouse Subject: Re: [PATCH] x86/entry/64: Remove %ebx handling from error_entry/exit Date: Thu, 09 Aug 2018 13:41:41 +0100 Message-ID: <1533818501.5775.4.camel__3329.27984786711$1533818505$gmane$org@infradead.org> References: <6A458833-F161-4C0A-8DFF-8757EDA36D5C@amacapital.net> <1533749748-25861-1-git-send-email-srn@prgmr.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2176110506250376400==" Return-path: Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1fnkGv-0008Ll-Dn for xen-devel@lists.xenproject.org; Thu, 09 Aug 2018 12:42:33 +0000 In-Reply-To: <1533749748-25861-1-git-send-email-srn@prgmr.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" To: Sarah Newman , stable@vger.kernel.org, "Durand Wesolowski, Jimmy" Cc: Juergen Gross , Brian Gerst , x86@kernel.org, Dominik Brodowski , Ingo Molnar , Borislav Petkov , Andy Lutomirski , "H. Peter Anvin" , xen-devel@lists.xenproject.org, Thomas Gleixner , Boris Ostrovsky List-Id: xen-devel@lists.xenproject.org --===============2176110506250376400== Content-Type: multipart/signed; micalg="sha-256"; protocol="application/x-pkcs7-signature"; boundary="=-Ix2L9eLSAW6zrjiPV4yr" --=-Ix2L9eLSAW6zrjiPV4yr Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2018-08-08 at 10:35 -0700, Sarah Newman wrote: > commit b3681dd548d06deb2e1573890829dff4b15abf46 upstream. >=20 > This version applies to v4.9. I think you can kill the 'xorl %ebx,%ebx' from error_entry too but yes, this does want to go to 4.9 and earlier because the 'Fixes:' tag is a bit of a lie =E2=80=94 the problem existed before that, at least in theory. > From Andy Lutomirski, original author: >=20 > error_entry and error_exit communicate the user vs kernel status of > the frame using %ebx.=C2=A0=C2=A0This is unnecessary -- the information i= s in > regs->cs.=C2=A0=C2=A0Just use regs->cs. >=20 > This makes error_entry simpler and makes error_exit more robust. >=20 > It also fixes a nasty bug.=C2=A0=C2=A0Before all the Spectre nonsense, Th= e > xen_failsafe_callback entry point returned like this: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0ALLOC_PT_GPREGS_ON_STACK > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0SAVE_C_REGS > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0SAVE_EXTRA_REGS > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0ENCODE_FRAME_POINTER > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0jmp=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0error_exit >=20 > And it did not go through error_entry.=C2=A0=C2=A0This was bogus: RBX > contained garbage, and error_exit expected a flag in RBX. > Fortunately, it generally contained *nonzero* garbage, so the > correct code path was used.=C2=A0=C2=A0As part of the Spectre fixes, code= was > added to clear RBX to mitigate certain speculation attacks.=C2=A0=C2=A0No= w, > depending on kernel configuration, RBX got zeroed and, when running > some Wine workloads, the kernel crashes.=C2=A0=C2=A0This was introduced b= y: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0commit 3ac6d8c787b8 ("x86/entry/64: Clear registe= rs for > =C2=A0=C2=A0=C2=A0=C2=A0exceptions/interrupts, to reduce speculation atta= ck surface") >=20 > With this patch applied, RBX is no longer needed as a flag, and the > problem goes away. >=20 > I suspect that malicious userspace could use this bug to crash the > kernel even without the offending patch applied, though. >=20 > [Historical note: I wrote this patch as a cleanup before I was aware > =C2=A0of the bug it fixed.] >=20 > [Note to stable maintainers: this should probably get applied to all > =C2=A0kernels.] >=20 > Cc: Brian Gerst > Cc: Borislav Petkov > Cc: Dominik Brodowski > Cc: Ingo Molnar > Cc: "H. Peter Anvin" > Cc: Thomas Gleixner > Cc: Boris Ostrovsky > Cc: Juergen Gross > Cc: xen-devel@lists.xenproject.org > Cc: x86@kernel.org > Cc: stable@vger.kernel.org > Cc: Andy Lutomirski > Fixes: 3ac6d8c787b8 ("x86/entry/64: Clear registers for > exceptions/interrupts, to reduce speculation attack surface") > Reported-and-tested-by: "M. Vefa Bicakci" > Signed-off-by: Andy Lutomirski > Signed-off-by: Sarah Newman > --- > =C2=A0arch/x86/entry/entry_64.S | 19 ++++--------------- > =C2=A01 file changed, 4 insertions(+), 15 deletions(-) >=20 > diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S > index d58d8dc..0dab47a 100644 > --- a/arch/x86/entry/entry_64.S > +++ b/arch/x86/entry/entry_64.S > @@ -774,7 +774,7 @@ ENTRY(\sym) > =C2=A0 > =C2=A0 call \do_sym > =C2=A0 > - jmp error_exit /* %ebx: no > swapgs flag */ > + jmp error_exit > =C2=A0 .endif > =C2=A0END(\sym) > =C2=A0.endm > @@ -1043,7 +1043,6 @@ END(paranoid_exit) > =C2=A0 > =C2=A0/* > =C2=A0 * Save all registers in pt_regs, and switch gs if needed. > - * Return: EBX=3D0: came from user mode; EBX=3D1: otherwise > =C2=A0 */ > =C2=A0ENTRY(error_entry) > =C2=A0 cld > @@ -1087,7 +1086,6 @@ ENTRY(error_entry) > =C2=A0 =C2=A0* for these here too. > =C2=A0 =C2=A0*/ > =C2=A0.Lerror_kernelspace: > - incl %ebx > =C2=A0 leaq native_irq_return_iret(%rip), %rcx > =C2=A0 cmpq %rcx, RIP+8(%rsp) > =C2=A0 je .Lerror_bad_iret > @@ -1119,28 +1117,19 @@ ENTRY(error_entry) > =C2=A0 > =C2=A0 /* > =C2=A0 =C2=A0* Pretend that the exception came from user mode: set up > pt_regs > - =C2=A0* as if we faulted immediately after IRET and clear EBX so > that > - =C2=A0* error_exit knows that we will be returning to user mode. > + =C2=A0* as if we faulted immediately after IRET. > =C2=A0 =C2=A0*/ > =C2=A0 mov %rsp, %rdi > =C2=A0 call fixup_bad_iret > =C2=A0 mov %rax, %rsp > - decl %ebx > =C2=A0 jmp .Lerror_entry_from_usermode_after_swapgs > =C2=A0END(error_entry) > =C2=A0 > - > -/* > - * On entry, EBX is a "return to kernel mode" flag: > - *=C2=A0=C2=A0=C2=A01: already in kernel mode, don't need SWAPGS > - *=C2=A0=C2=A0=C2=A00: user gsbase is loaded, we need SWAPGS and standar= d > preparation for return to usermode > - */ > =C2=A0ENTRY(error_exit) > - movl %ebx, %eax > =C2=A0 DISABLE_INTERRUPTS(CLBR_NONE) > =C2=A0 TRACE_IRQS_OFF > - testl %eax, %eax > - jnz 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