From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anoob Joseph Subject: [PATCH v2 16/33] common/cpt: add common code required for session management Date: Tue, 4 Sep 2018 09:29:03 +0530 Message-ID: <1536033560-21541-17-git-send-email-ajoseph@caviumnetworks.com> References: <1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com> <1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Cc: Nithin Dabilpuram , Jerin Jacob , Narayana Prasad , dev@dpdk.org, Ankur Dwivedi , Anoob Joseph , Murthy NSSR , Ragothaman Jayaraman , Srisivasubramanian S , Tejasree Kondoj To: Akhil Goyal , Pablo de Lara , Thomas Monjalon Return-path: Received: from NAM02-CY1-obe.outbound.protection.outlook.com (mail-cys01nam02on0060.outbound.protection.outlook.com [104.47.37.60]) by dpdk.org (Postfix) with ESMTP id 960EF2C38 for ; Tue, 4 Sep 2018 06:03:09 +0200 (CEST) In-Reply-To: <1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Nithin Dabilpuram Adding common code required for session configure, session clear and get session size ops routines Signed-off-by: Ankur Dwivedi Signed-off-by: Anoob Joseph Signed-off-by: Murthy NSSR Signed-off-by: Nithin Dabilpuram Signed-off-by: Ragothaman Jayaraman Signed-off-by: Srisivasubramanian S Signed-off-by: Tejasree Kondoj --- drivers/common/cpt/cpt_mcode_defines.h | 110 +++++++++++++++++++++++++++++++++ drivers/common/cpt/cpt_request_mgr.h | 32 ++++++++++ drivers/common/cpt/cpt_ucode.h | 47 ++++++++++++++ 3 files changed, 189 insertions(+) create mode 100644 drivers/common/cpt/cpt_request_mgr.h create mode 100644 drivers/common/cpt/cpt_ucode.h diff --git a/drivers/common/cpt/cpt_mcode_defines.h b/drivers/common/cpt/cpt_mcode_defines.h index 1bbe8c4..5b1566e 100644 --- a/drivers/common/cpt/cpt_mcode_defines.h +++ b/drivers/common/cpt/cpt_mcode_defines.h @@ -5,6 +5,9 @@ #ifndef _CPT_MCODE_DEFINES_H_ #define _CPT_MCODE_DEFINES_H_ +#include +#include + /* * This file defines macros and structures according to microcode spec * @@ -35,4 +38,111 @@ typedef struct sglist_comp { uint64_t ptr[4]; } sg_comp_t; +struct cpt_sess_misc { + uint16_t cpt_op:4; + uint16_t zsk_flag:4; + uint16_t aes_gcm:1; + uint16_t aes_ctr:1; + uint16_t is_null:1; + /**< To check if NULL cipher/auth */ + uint16_t is_gmac:1; + uint16_t aad_length; + uint8_t mac_len; + uint8_t iv_length; + /**< IV length in bytes */ + uint8_t auth_iv_length; + /**< Auth IV length in bytes */ + uint8_t rsvd1; + uint16_t iv_offset; + /**< IV offset in bytes */ + uint16_t auth_iv_offset; + /**< Auth IV offset in bytes */ + uint32_t salt; + phys_addr_t ctx_dma_addr; +}; + +typedef union { + uint64_t flags; + struct { +#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN + uint64_t enc_cipher : 4; + uint64_t reserved1 : 1; + uint64_t aes_key : 2; + uint64_t iv_source : 1; + uint64_t hash_type : 4; + uint64_t reserved2 : 3; + uint64_t auth_input_type : 1; + uint64_t mac_len : 8; + uint64_t reserved3 : 8; + uint64_t encr_offset : 16; + uint64_t iv_offset : 8; + uint64_t auth_offset : 8; +#else + uint64_t auth_offset : 8; + uint64_t iv_offset : 8; + uint64_t encr_offset : 16; + uint64_t reserved3 : 8; + uint64_t mac_len : 8; + uint64_t auth_input_type : 1; + uint64_t reserved2 : 3; + uint64_t hash_type : 4; + uint64_t iv_source : 1; + uint64_t aes_key : 2; + uint64_t reserved1 : 1; + uint64_t enc_cipher : 4; +#endif + } e; +} encr_ctrl_t; + +typedef struct { + encr_ctrl_t enc_ctrl; + uint8_t encr_key[32]; + uint8_t encr_iv[16]; +} mc_enc_context_t; + +typedef struct { + uint8_t ipad[64]; + uint8_t opad[64]; +} mc_fc_hmac_context_t; + +typedef struct { + mc_enc_context_t enc; + mc_fc_hmac_context_t hmac; +} mc_fc_context_t; + +typedef struct { + uint8_t encr_auth_iv[16]; + uint8_t ci_key[16]; + uint8_t zuc_const[32]; +} mc_zuc_snow3g_ctx_t; + +typedef struct { + uint8_t reg_A[8]; + uint8_t ci_key[16]; +} mc_kasumi_ctx_t; + +struct cpt_ctx { + /* Below fields are accessed by sw */ + uint64_t enc_cipher :8; + uint64_t hash_type :8; + uint64_t mac_len :8; + uint64_t auth_key_len :8; + uint64_t fc_type :4; + uint64_t hmac :1; + uint64_t zsk_flags :3; + uint64_t k_ecb :1; + uint64_t snow3g :1; + /**< Set if it is snow3g and not ZUC */ + uint64_t rsvd :22; + /* Below fields are accessed by hardware */ + union { + mc_fc_context_t fctx; + mc_zuc_snow3g_ctx_t zs_ctx; + mc_kasumi_ctx_t k_ctx; + }; + uint8_t auth_key[64]; +}; + +#define CPT_P_ENC_CTRL(fctx) fctx->enc.enc_ctrl.e + #endif /* _CPT_MCODE_DEFINES_H_ */ diff --git a/drivers/common/cpt/cpt_request_mgr.h b/drivers/common/cpt/cpt_request_mgr.h new file mode 100644 index 0000000..733c402 --- /dev/null +++ b/drivers/common/cpt/cpt_request_mgr.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Cavium, Inc + */ + +#ifndef _CPT_REQUEST_MGR_H_ +#define _CPT_REQUEST_MGR_H_ + +#include "cpt_mcode_defines.h" + +/* + * This file defines the agreement between the common layer and the individual + * crypto drivers for OcteonTX series. Datapath in otx* directory include this + * file and all these functions are static inlined for better performance. + * + */ + +/* + * Get the session size + * + * This function is used in the data path. + * + * @return + * - session size + */ +static __rte_always_inline unsigned int +cpt_get_session_size(void) +{ + unsigned int ctx_len = sizeof(struct cpt_ctx); + return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8)); +} + +#endif /* _CPT_REQUEST_MGR_H_ */ diff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h new file mode 100644 index 0000000..e4f16fe --- /dev/null +++ b/drivers/common/cpt/cpt_ucode.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Cavium, Inc + */ + +#ifndef _CPT_UCODE_H_ +#define _CPT_UCODE_H_ + +#include "cpt_mcode_defines.h" + +/* + * This file defines functions that are interfaces to microcode spec. + * + */ + +static __rte_always_inline int +cpt_is_algo_supported(struct rte_crypto_sym_xform *xform) +{ + /* + * Microcode only supports the following combination. + * Encryption followed by authentication + * Authentication followed by decryption + */ + if (xform->next) { + if ((xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) && + (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) && + (xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)) { + /* Unsupported as of now by microcode */ + CPT_LOG_DP_ERR("Unsupported combination"); + return -1; + } + if ((xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) && + (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) && + (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT)) { + /* For GMAC auth there is no cipher operation */ + if (xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM || + xform->next->auth.algo != + RTE_CRYPTO_AUTH_AES_GMAC) { + /* Unsupported as of now by microcode */ + CPT_LOG_DP_ERR("Unsupported combination"); + return -1; + } + } + } + return 0; +} + +#endif /*_CPT_UCODE_H_ */ -- 2.7.4