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* [PATCH 01/13] drm/amd/include: update the bitfield define for PF_MAX_REGION
@ 2018-09-05 15:28 shaoyunl
       [not found] ` <1536161280-4128-1-git-send-email-Shaoyun.Liu-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 2+ messages in thread
From: shaoyunl @ 2018-09-05 15:28 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Shaoyun Liu

From: Shaoyun Liu <Shaoyun.Liu@amd.com>

Correct the definition based on vega20 register spec

Change-Id: Ifde296134d00423cdf1078c8249d044f5b5cf5a5
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
---
 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
index 6626fc2..76ea902 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
@@ -8241,9 +8241,9 @@
 #define MC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL__LOCK_MASK                                                          0x00000001L
 //MC_VM_XGMI_LFB_CNTL
 #define MC_VM_XGMI_LFB_CNTL__PF_LFB_REGION__SHIFT                                                             0x0
-#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION__SHIFT                                                             0x3
+#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION__SHIFT                                                             0x4
 #define MC_VM_XGMI_LFB_CNTL__PF_LFB_REGION_MASK                                                               0x00000007L
-#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION_MASK                                                               0x00000038L
+#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION_MASK                                                               0x00000070L
 //MC_VM_XGMI_LFB_SIZE
 #define MC_VM_XGMI_LFB_SIZE__PF_LFB_SIZE__SHIFT                                                               0x0
 #define MC_VM_XGMI_LFB_SIZE__PF_LFB_SIZE_MASK                                                                 0x0000FFFFL
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 2+ messages in thread
* Re: [PATCH 01/13] drm/amd/include: update the bitfield define for PF_MAX_REGION
       [not found] ` <1536161280-4128-1-git-send-email-Shaoyun.Liu-5C7GfCeVMHo@public.gmane.org>
@ 2018-09-06  7:29   ` Christian König
  0 siblings, 0 replies; 2+ messages in thread
From: Christian König @ 2018-09-06  7:29 UTC (permalink / raw)
  To: shaoyunl, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Am 05.09.2018 um 17:28 schrieb shaoyunl:
> From: Shaoyun Liu <Shaoyun.Liu@amd.com>
>
> Correct the definition based on vega20 register spec
>
> Change-Id: Ifde296134d00423cdf1078c8249d044f5b5cf5a5
> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>

Acked-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
> index 6626fc2..76ea902 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h
> @@ -8241,9 +8241,9 @@
>   #define MC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL__LOCK_MASK                                                          0x00000001L
>   //MC_VM_XGMI_LFB_CNTL
>   #define MC_VM_XGMI_LFB_CNTL__PF_LFB_REGION__SHIFT                                                             0x0
> -#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION__SHIFT                                                             0x3
> +#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION__SHIFT                                                             0x4
>   #define MC_VM_XGMI_LFB_CNTL__PF_LFB_REGION_MASK                                                               0x00000007L
> -#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION_MASK                                                               0x00000038L
> +#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION_MASK                                                               0x00000070L
>   //MC_VM_XGMI_LFB_SIZE
>   #define MC_VM_XGMI_LFB_SIZE__PF_LFB_SIZE__SHIFT                                                               0x0
>   #define MC_VM_XGMI_LFB_SIZE__PF_LFB_SIZE_MASK                                                                 0x0000FFFFL

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2018-09-05 15:28 [PATCH 01/13] drm/amd/include: update the bitfield define for PF_MAX_REGION shaoyunl
     [not found] ` <1536161280-4128-1-git-send-email-Shaoyun.Liu-5C7GfCeVMHo@public.gmane.org>
2018-09-06  7:29   ` Christian König

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