From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bin Meng Date: Mon, 10 Sep 2018 21:37:36 -0700 Subject: [U-Boot] [PATCH v2 11/15] riscv: Make start.S available for all targets In-Reply-To: <1536640660-3376-1-git-send-email-bmeng.cn@gmail.com> References: <1536640660-3376-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1536640660-3376-12-git-send-email-bmeng.cn@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Currently start.S is inside arch/riscv/cpu/ax25/, but it can be common for all RISC-V targets. Signed-off-by: Bin Meng --- Changes in v2: None arch/riscv/Makefile | 2 +- arch/riscv/cpu/Makefile | 2 ++ arch/riscv/cpu/ax25/Makefile | 2 -- arch/riscv/cpu/{ax25 => }/start.S | 0 arch/riscv/cpu/u-boot.lds | 2 +- 5 files changed, 4 insertions(+), 4 deletions(-) rename arch/riscv/cpu/{ax25 => }/start.S (100%) diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index af432e1..8fb6a88 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -3,7 +3,7 @@ # Copyright (C) 2017 Andes Technology Corporation. # Rick Chen, Andes Technology Corporation -head-y := arch/riscv/cpu/$(CPU)/start.o +head-y := arch/riscv/cpu/start.o libs-y += arch/riscv/cpu/ libs-y += arch/riscv/cpu/$(CPU)/ diff --git a/arch/riscv/cpu/Makefile b/arch/riscv/cpu/Makefile index 63de163..2cc6757 100644 --- a/arch/riscv/cpu/Makefile +++ b/arch/riscv/cpu/Makefile @@ -2,4 +2,6 @@ # # Copyright (C) 2018, Bin Meng +extra-y = start.o + obj-y += cpu.o diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/ax25/Makefile index c3f164c..2ab0342 100644 --- a/arch/riscv/cpu/ax25/Makefile +++ b/arch/riscv/cpu/ax25/Makefile @@ -3,6 +3,4 @@ # Copyright (C) 2017 Andes Technology Corporation # Rick Chen, Andes Technology Corporation -extra-y = start.o - obj-y := cpu.o diff --git a/arch/riscv/cpu/ax25/start.S b/arch/riscv/cpu/start.S similarity index 100% rename from arch/riscv/cpu/ax25/start.S rename to arch/riscv/cpu/start.S diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds index f414473..11bc4a7 100644 --- a/arch/riscv/cpu/u-boot.lds +++ b/arch/riscv/cpu/u-boot.lds @@ -11,7 +11,7 @@ SECTIONS { . = ALIGN(4); .text : { - arch/riscv/cpu/ax25/start.o (.text) + arch/riscv/cpu/start.o (.text) } /* This needs to come before *(.text*) */ -- 2.7.4