From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Zhu Subject: [PATCH 8/8] drm/amdgpu:Enable DPG mode on PCO Date: Tue, 25 Sep 2018 15:55:23 -0400 Message-ID: <1537905323-27071-8-git-send-email-James.Zhu@amd.com> References: <1537905323-27071-1-git-send-email-James.Zhu@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1537905323-27071-1-git-send-email-James.Zhu-5C7GfCeVMHo@public.gmane.org> List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: james.zhu-5C7GfCeVMHo@public.gmane.org QWRkIGZsYWcgQU1EX1BHX1NVUFBPUlRfRFBHIHRvIGVuYWJsZSBEUEcgbW9kZSBvbiBQaWNhc3Nv CgpTaWduZWQtb2ZmLWJ5OiBKYW1lcyBaaHUgPEphbWVzLlpodUBhbWQuY29tPgotLS0KIGRyaXZl cnMvZ3B1L2RybS9hbWQvYW1kZ3B1L3NvYzE1LmMgfCAzICsrLQogMSBmaWxlIGNoYW5nZWQsIDIg aW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2Ry bS9hbWQvYW1kZ3B1L3NvYzE1LmMgYi9kcml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9zb2MxNS5j CmluZGV4IDEzOGM0ODEuLjlmNDYyYzAgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9hbWQv YW1kZ3B1L3NvYzE1LmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2FtZC9hbWRncHUvc29jMTUuYwpA QCAtNzM5LDcgKzczOSw4IEBAIHN0YXRpYyBpbnQgc29jMTVfY29tbW9uX2Vhcmx5X2luaXQodm9p ZCAqaGFuZGxlKQogCiAJCQlhZGV2LT5wZ19mbGFncyA9IEFNRF9QR19TVVBQT1JUX1NETUEgfAog CQkJCUFNRF9QR19TVVBQT1JUX01NSFVCIHwKLQkJCQlBTURfUEdfU1VQUE9SVF9WQ047CisJCQkJ QU1EX1BHX1NVUFBPUlRfVkNOIHwKKwkJCQlBTURfUEdfU1VQUE9SVF9EUEc7CiAJCX0gZWxzZSB7 CiAJCQlhZGV2LT5jZ19mbGFncyA9IEFNRF9DR19TVVBQT1JUX0dGWF9NR0NHIHwKIAkJCQlBTURf Q0dfU1VQUE9SVF9HRlhfTUdMUyB8Ci0tIAoyLjcuNAoKX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX18KYW1kLWdmeCBtYWlsaW5nIGxpc3QKYW1kLWdmeEBsaXN0 cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9s aXN0aW5mby9hbWQtZ2Z4Cg==