From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jyoti Yadav Subject: [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. Date: Fri, 5 Oct 2018 00:02:26 -0400 Message-ID: <1538712146-31325-1-git-send-email-jyoti.r.yadav@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 934086E655 for ; Fri, 5 Oct 2018 04:02:49 +0000 (UTC) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: chris.p.wilson@intel.com, rodrigo.vivi@intel.com List-Id: intel-gfx@lists.freedesktop.org REM1IGFuZCBEQzYgY291bnRlciByZWdpc3RlciB0ZWxscyBhYm91dCByZXNpZGVuY3kgb2YgREM1 IGFuZCBEQzYuClRoZXNlIHJlZ2lzdGVycyBhcmUgc2FtZSBmb3IgU0tMIGFuZCBJQ0wuCgp2MiA6 IFJlbW92ZSBjc3JfdmVyc2lvbiBjaGVjay4KICAgICBBZGRlZCBnZW5lcmljIGNoZWNrIHJlZ2Fy ZGluZyBEQyBjb3VudGVycyBmb3IgIEdlbjkgb253YXJkcy4gKFJvZHJpZ28pCnYzIDogU2ltcGxp ZmllZCBnZW4gY2hlY2tzLiAoQ2hyaXMpCnY0IDogU2ltcGxpZmllZCAiaWYiIGxhZGRlciBmb3Ig bXVsdGlwbGUgZ2Vucy4KClNpZ25lZC1vZmYtYnk6IEp5b3RpIFlhZGF2IDxqeW90aS5yLnlhZGF2 QGludGVsLmNvbT4KLS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2RlYnVnZnMuYyB8IDkg KysrKy0tLS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oICAgICB8IDEgKwogMiBm aWxlcyBjaGFuZ2VkLCA1IGluc2VydGlvbnMoKyksIDUgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kZWJ1Z2ZzLmMgYi9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pOTE1X2RlYnVnZnMuYwppbmRleCBhNTI2NWMyLi43MzhmOGM3IDEwMDY0NAotLS0gYS9k cml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2RlYnVnZnMuYworKysgYi9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pOTE1X2RlYnVnZnMuYwpAQCAtMjg5NywxNSArMjg5NywxNCBAQCBzdGF0aWMgaW50IGk5 MTVfZG1jX2luZm8oc3RydWN0IHNlcV9maWxlICptLCB2b2lkICp1bnVzZWQpCiAJc2VxX3ByaW50 ZihtLCAidmVyc2lvbjogJWQuJWRcbiIsIENTUl9WRVJTSU9OX01BSk9SKGNzci0+dmVyc2lvbiks CiAJCSAgIENTUl9WRVJTSU9OX01JTk9SKGNzci0+dmVyc2lvbikpOwogCi0JaWYgKElTX0tBQllM QUtFKGRldl9wcml2KSB8fAotCSAgICAoSVNfU0tZTEFLRShkZXZfcHJpdikgJiYgY3NyLT52ZXJz aW9uID49IENTUl9WRVJTSU9OKDEsIDYpKSkgeworCWlmIChJU19CUk9YVE9OKGRldl9wcml2KSkg eworCQlzZXFfcHJpbnRmKG0sICJEQzMgLT4gREM1IGNvdW50OiAlZFxuIiwKKwkJCSAgIEk5MTVf UkVBRChCWFRfQ1NSX0RDM19EQzVfQ09VTlQpKTsKKwl9IGVsc2UgaWYgKElTX0dFTihkZXZfcHJp diwgOSwgMTEpKSB7CiAJCXNlcV9wcmludGYobSwgIkRDMyAtPiBEQzUgY291bnQ6ICVkXG4iLAog CQkJICAgSTkxNV9SRUFEKFNLTF9DU1JfREMzX0RDNV9DT1VOVCkpOwogCQlzZXFfcHJpbnRmKG0s ICJEQzUgLT4gREM2IGNvdW50OiAlZFxuIiwKIAkJCSAgIEk5MTVfUkVBRChTS0xfQ1NSX0RDNV9E QzZfQ09VTlQpKTsKLQl9IGVsc2UgaWYgKElTX0JST1hUT04oZGV2X3ByaXYpICYmIGNzci0+dmVy c2lvbiA+PSBDU1JfVkVSU0lPTigxLCA0KSkgewotCQlzZXFfcHJpbnRmKG0sICJEQzMgLT4gREM1 IGNvdW50OiAlZFxuIiwKLQkJCSAgIEk5MTVfUkVBRChCWFRfQ1NSX0RDM19EQzVfQ09VTlQpKTsK IAl9CiAKIG91dDoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCmluZGV4IDg1MzRmODguLjU3M2Q1ZjMg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKKysrIGIvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaApAQCAtNjk4NSw2ICs2OTg1LDcgQEAgZW51bSB7CiAv KiBNTUlPIGFkZHJlc3MgcmFuZ2UgZm9yIENTUiBwcm9ncmFtICgweDgwMDAwIC0gMHg4MkZGRikg Ki8KICNkZWZpbmUgQ1NSX01NSU9fU1RBUlRfUkFOR0UJMHg4MDAwMAogI2RlZmluZSBDU1JfTU1J T19FTkRfUkFOR0UJMHg4RkZGRgorLyogREMzX0RDNSBjb3VudCBhbmQgREM1X0RDNiBjb3VudCBy ZWdpc3RlcnMgYXJlIHNhbWUgZm9yIFNLTCBhbmQgSUNMICovCiAjZGVmaW5lIFNLTF9DU1JfREMz X0RDNV9DT1VOVAlfTU1JTygweDgwMDMwKQogI2RlZmluZSBTS0xfQ1NSX0RDNV9EQzZfQ09VTlQJ X01NSU8oMHg4MDAyQykKICNkZWZpbmUgQlhUX0NTUl9EQzNfREM1X0NPVU5UCV9NTUlPKDB4ODAw MzgpCi0tIAoxLjkuMQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Au b3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwt Z2Z4Cg==