From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
To: gregkh@linuxfoundation.org
Cc: neil@brown.name, driverdev-devel@linuxdriverproject.org
Subject: [PATCH v5 03/17] staging: mt7621-pci: add two helpers for read and write pcie register ports
Date: Mon, 15 Oct 2018 20:22:53 +0200 [thread overview]
Message-ID: <1539627787-2958-4-git-send-email-sergio.paracuellos@gmail.com> (raw)
In-Reply-To: <1539627787-2958-1-git-send-email-sergio.paracuellos@gmail.com>
mt7621-pcie_port data structure has filed 'base' as the base address for
read and write related port registers. Create two inline functions
'pcie_port_read' and 'pcie_port_write' to make this task easier and
code more readable.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
---
drivers/staging/mt7621-pci/pci-mt7621.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index 357bbdd..04e82c3 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -175,6 +175,17 @@ static inline void pcie_write(struct mt7621_pcie *pcie, u32 val, u32 reg)
writel(val, pcie->base + reg);
}
+static inline u32 pcie_port_read(struct mt7621_pcie_port *port, u32 reg)
+{
+ return readl(port->base + reg);
+}
+
+static inline void pcie_port_write(struct mt7621_pcie_port *port,
+ u32 val, u32 reg)
+{
+ writel(val, port->base + reg);
+}
+
static inline u32 mt7621_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
unsigned int func, unsigned int where)
{
--
2.7.4
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next prev parent reply other threads:[~2018-10-15 18:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-15 18:22 [PATCH v5 00/17] staging: mt7621-pci: Parse ports info from DT and other minor cleanups Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 01/17] staging: mt7621-pci: parse and init port data from device tree Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 02/17] staging: mt7621-pci: replace return value if devm_pci_alloc_host_bridge call fails Sergio Paracuellos
2018-10-15 18:22 ` Sergio Paracuellos [this message]
2018-10-15 18:22 ` [PATCH v5 04/17] staging: mt7621-pci: factor out 'mt7621_pcie_enable_port' function Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 05/17] staging: mt7621-pci: remove [ASSERT|DEASSERT]_SYSRST_PCIE macros Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 06/17] staging: mt7621-pci: remove GPL2+ text from license header Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 07/17] staging: mt7621-pci: remove two commented code lines Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 08/17] staging: mt7621-pci: remove reset related unused macros Sergio Paracuellos
2018-10-15 18:22 ` [PATCH v5 09/17] staging: mt7621-pci: reagroup reset related macros all together Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 10/17] staging: mt7621-pci: rewrite pcie phy related functions Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 11/17] staging: mt7621-pci: factor out 'mt7621_enable_phy' function Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 12/17] staging: mt7621-pci: debug port N_FTS inside 'mt7621_pcie_enable_port' Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 13/17] staging: mt7621-pci: rename 'mt7621_pcie_enable_port' into 'mt7621_pcie_init_port' Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 14/17] staging: mt7621-dts: add sysctl registers base address to pcie Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 15/17] staging: mt7621-pci: remap and use sysctl from device tree Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 16/17] staging: mt7621-pci: use a trailing */ on a separate line Sergio Paracuellos
2018-10-15 18:23 ` [PATCH v5 17/17] staging: mt7621-pci: use dev_* functions instead of printk Sergio Paracuellos
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