From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sharat Masetty Subject: [PATCH 3/3] drm/msm: Optimize adreno_show_object() Date: Tue, 6 Nov 2018 11:40:06 +0530 Message-ID: <1541484606-20813-3-git-send-email-smasetty@codeaurora.org> References: <1541484606-20813-1-git-send-email-smasetty@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1541484606-20813-1-git-send-email-smasetty-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sharat Masetty , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, chris-Y6uKTt2uX1cEflXRtASbqLVCufUGDwFn@public.gmane.org, jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org List-Id: linux-arm-msm@vger.kernel.org V2hlbiB0aGUgdXNlcnNwYWNlIHRyaWVzIHRvIHJlYWQgdGhlIGNyYXNoc3RhdGUgZHVtcCwgdGhl IHJlYWQgc2lkZQppbXBsZW1lbnRhdGlvbiBpbiB0aGUgZHJpdmVyIGN1cnJlbnRseSBhc2NpaTg1 IGVuY29kZXMgYWxsIHRoZSBiaW5hcnkKYnVmZmVycyBhbmQgaXQgZG9lcyB0aGlzIGVhY2ggdGlt ZSB0aGUgcmVhZCBzeXN0ZW0gY2FsbCBpcyBjYWxsZWQuCkEgdXNlcnNwYWNlIHRvb2wgbGlrZSBj YXQgdHlwaWNhbGx5IGRvZXMgYSBwYWdlIGJ5IHBhZ2UgcmVhZCBhbmQgdGhlCm51bWJlciBvZiBy ZWFkIGNhbGxzIGRlcGVuZHMgb24gdGhlIHNpemUgb2YgdGhlIGRhdGEgY2FwdHVyZWQgYnkgdGhl CmRyaXZlci4gVGhpcyBpcyBjZXJ0YWlubHkgbm90IGRlc2lyYWJsZSBhbmQgZG9lcyBub3Qgc2Nh bGUgd2VsbCB3aXRoCmxhcmdlIGNhcHR1cmVzLgoKVGhpcyBwYXRjaCBlbmNvZGVzIHRoZSBidWZm ZXIgb25seSBvbmNlIGluIHRoZSByZWFkIHBhdGguIFdpdGggdGhpcyB0aGVyZQppcyBhbiBpbW1l ZGlhdGUgPjEwWCBzcGVlZCBpbXByb3ZlbWVudCBpbiBjcmFzaHN0YXRlIHNhdmUgdGltZS4KClNp Z25lZC1vZmYtYnk6IFNoYXJhdCBNYXNldHR5IDxzbWFzZXR0eUBjb2RlYXVyb3JhLm9yZz4KLS0t CiBkcml2ZXJzL2dwdS9kcm0vbXNtL2FkcmVuby9hZHJlbm9fZ3B1LmMgfCA3NiArKysrKysrKysr KysrKysrKysrKysrKystLS0tLS0tLS0KIGRyaXZlcnMvZ3B1L2RybS9tc20vbXNtX2dwdS5oICAg ICAgICAgICB8ICAyICsKIDIgZmlsZXMgY2hhbmdlZCwgNTggaW5zZXJ0aW9ucygrKSwgMjAgZGVs ZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21zbS9hZHJlbm8vYWRyZW5v X2dwdS5jIGIvZHJpdmVycy9ncHUvZHJtL21zbS9hZHJlbm8vYWRyZW5vX2dwdS5jCmluZGV4IGM5 MzcwMmQuLmUyOTA5M2UgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9tc20vYWRyZW5vL2Fk cmVub19ncHUuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vbXNtL2FkcmVuby9hZHJlbm9fZ3B1LmMK QEAgLTQ3NSwzNCArNDc1LDcwIEBAIGludCBhZHJlbm9fZ3B1X3N0YXRlX3B1dChzdHJ1Y3QgbXNt X2dwdV9zdGF0ZSAqc3RhdGUpCiAKICNpZiBkZWZpbmVkKENPTkZJR19ERUJVR19GUykgfHwgZGVm aW5lZChDT05GSUdfREVWX0NPUkVEVU1QKQogCi1zdGF0aWMgdm9pZCBhZHJlbm9fc2hvd19vYmpl Y3Qoc3RydWN0IGRybV9wcmludGVyICpwLCB1MzIgKnB0ciwgaW50IGxlbikKK3N0YXRpYyBjaGFy ICphZHJlbm9fZ3B1X2FzY2lpODVfZW5jb2RlKHUzMiAqc3JjLCBzaXplX3QgbGVuKQogewotCWNo YXIgb3V0W0FTQ0lJODVfQlVGU1pdOwotCWxvbmcgbCwgZGF0YWxlbiwgaTsKKwl2b2lkICpidWY7 CisJc2l6ZV90IGJ1Zl9pdHIgPSAwOworCWxvbmcgaSwgbDsKIAotCWlmICghcHRyIHx8ICFsZW4p Ci0JCXJldHVybjsKKwlpZiAoIWxlbikKKwkJcmV0dXJuIE5VTEw7CisKKwlsID0gYXNjaWk4NV9l bmNvZGVfbGVuKGxlbik7CiAKIAkvKgotCSAqIE9ubHkgZHVtcCB0aGUgbm9uLXplcm8gcGFydCBv ZiB0aGUgYnVmZmVyIC0gcmFyZWx5IHdpbGwgYW55IGRhdGEKLQkgKiBjb21wbGV0ZWx5IGZpbGwg dGhlIGVudGlyZSBhbGxvY2F0ZWQgc2l6ZSBvZiB0aGUgYnVmZmVyCisJICogYXNjaWk4NSBvdXRw dXRzIGVpdGhlciBhIDUgYnl0ZSBzdHJpbmcgb3IgYSAxIGJ5dGUgc3RyaW5nLiBTbyB3ZQorCSAq IGFjY291bnQgZm9yIHRoZSB3b3JzdCBjYXNlIG9mIDUgYnl0ZXMgcGVyIGR3b3JkIHBsdXMgdGhl IDEgZm9yICdcMCcKIAkgKi8KLQlmb3IgKGRhdGFsZW4gPSAwLCBpID0gMDsgaSA8IGxlbiA+PiAy OyBpKyspIHsKLQkJaWYgKHB0cltpXSkKLQkJCWRhdGFsZW4gPSAoaSA8PCAyKSArIDE7Ci0JfQor CWJ1ZiA9IGt2bWFsbG9jKChsICogNSkgKyAxLCBHRlBfS0VSTkVMKTsKKwlpZiAoIWJ1ZikKKwkJ cmV0dXJuIE5VTEw7CiAKLQkvKiBTa2lwIHByaW50aW5nIHRoZSBvYmplY3QgaWYgaXQgaXMgZW1w dHkgKi8KLQlpZiAoZGF0YWxlbiA9PSAwKQorCWZvciAoaSA9IDA7IGkgPCBsOyBpKyspCisJCWJ1 Zl9pdHIgKz0gYXNjaWk4NV9lbmNvZGVfdG9fYnVmKHNyY1tpXSwgYnVmICsgYnVmX2l0cik7CisK KwlyZXR1cm4gYnVmOworfQorCisvKiBsZW4gaXMgZXhwZWN0ZWQgdG8gYmUgaW4gYnl0ZXMgKi8K K3N0YXRpYyB2b2lkIGFkcmVub19zaG93X29iamVjdChzdHJ1Y3QgZHJtX3ByaW50ZXIgKnAsIHZv aWQgKipwdHIsIGludCBsZW4sCisJCWJvb2wgKmVuY29kZWQpCit7CisJaWYgKCEqcHRyIHx8ICFs ZW4pCiAJCXJldHVybjsKIAotCWwgPSBhc2NpaTg1X2VuY29kZV9sZW4oZGF0YWxlbik7CisJaWYg KCEqZW5jb2RlZCkgeworCQlsb25nIGRhdGFsZW4sIGk7CisJCXUzMiAqYnVmID0gKnB0cjsKKwor CQkvKgorCQkgKiBPbmx5IGR1bXAgdGhlIG5vbi16ZXJvIHBhcnQgb2YgdGhlIGJ1ZmZlciAtIHJh cmVseSB3aWxsCisJCSAqIGFueSBkYXRhIGNvbXBsZXRlbHkgZmlsbCB0aGUgZW50aXJlIGFsbG9j YXRlZCBzaXplIG9mCisJCSAqIHRoZSBidWZmZXIuCisJCSAqLworCQlmb3IgKGRhdGFsZW4gPSAw LCBpID0gMDsgaSA8IGxlbiA+PiAyOyBpKyspIHsKKwkJCWlmIChidWZbaV0pCisJCQkJZGF0YWxl biA9ICgoaSArIDEpIDw8IDIpOworCQl9CisKKwkJLyoKKwkJICogSWYgd2UgcmVhY2ggaGVyZSwg dGhlbiB0aGUgb3JpZ2luYWxseSBjYXB0dXJlZCBiaW5hcnkgYnVmZmVyCisJCSAqIHdpbGwgYmUg cmVwbGFjZWQgd2l0aCB0aGUgYXNjaWk4NSBlbmNvZGVkIHN0cmluZworCQkgKi8KKwkJKnB0ciA9 IGFkcmVub19ncHVfYXNjaWk4NV9lbmNvZGUoYnVmLCBkYXRhbGVuKTsKKworCQlrdmZyZWUoYnVm KTsKKworCQkqZW5jb2RlZCA9IHRydWU7CisJfQorCisJaWYgKCEqcHRyKQorCQlyZXR1cm47CiAK IAlkcm1fcHV0cyhwLCAiICAgIGRhdGE6ICEhYXNjaWk4NSB8XG4iKTsKIAlkcm1fcHV0cyhwLCAi ICAgICAiKTsKIAotCWZvciAoaSA9IDA7IGkgPCBsOyBpKyspCi0JCWRybV9wdXRzKHAsIGFzY2lp ODVfZW5jb2RlKHB0cltpXSwgb3V0KSk7CisJZHJtX3B1dHMocCwgKnB0cik7CiAKIAlkcm1fcHV0 cyhwLCAiXG4iKTsKIH0KQEAgLTUzNCw4ICs1NzAsOCBAQCB2b2lkIGFkcmVub19zaG93KHN0cnVj dCBtc21fZ3B1ICpncHUsIHN0cnVjdCBtc21fZ3B1X3N0YXRlICpzdGF0ZSwKIAkJZHJtX3ByaW50 ZihwLCAiICAgIHdwdHI6ICVkXG4iLCBzdGF0ZS0+cmluZ1tpXS53cHRyKTsKIAkJZHJtX3ByaW50 ZihwLCAiICAgIHNpemU6ICVkXG4iLCBNU01fR1BVX1JJTkdCVUZGRVJfU1opOwogCi0JCWFkcmVu b19zaG93X29iamVjdChwLCBzdGF0ZS0+cmluZ1tpXS5kYXRhLAotCQkJc3RhdGUtPnJpbmdbaV0u ZGF0YV9zaXplKTsKKwkJYWRyZW5vX3Nob3dfb2JqZWN0KHAsICZzdGF0ZS0+cmluZ1tpXS5kYXRh LAorCQkJc3RhdGUtPnJpbmdbaV0uZGF0YV9zaXplLCAmc3RhdGUtPnJpbmdbaV0uZW5jb2RlZCk7 CiAJfQogCiAJaWYgKHN0YXRlLT5ib3MpIHsKQEAgLTU0Niw4ICs1ODIsOCBAQCB2b2lkIGFkcmVu b19zaG93KHN0cnVjdCBtc21fZ3B1ICpncHUsIHN0cnVjdCBtc21fZ3B1X3N0YXRlICpzdGF0ZSwK IAkJCQlzdGF0ZS0+Ym9zW2ldLmlvdmEpOwogCQkJZHJtX3ByaW50ZihwLCAiICAgIHNpemU6ICV6 ZFxuIiwgc3RhdGUtPmJvc1tpXS5zaXplKTsKIAotCQkJYWRyZW5vX3Nob3dfb2JqZWN0KHAsIHN0 YXRlLT5ib3NbaV0uZGF0YSwKLQkJCQlzdGF0ZS0+Ym9zW2ldLnNpemUpOworCQkJYWRyZW5vX3No b3dfb2JqZWN0KHAsICZzdGF0ZS0+Ym9zW2ldLmRhdGEsCisJCQkJc3RhdGUtPmJvc1tpXS5zaXpl LCAmc3RhdGUtPmJvc1tpXS5lbmNvZGVkKTsKIAkJfQogCX0KIApkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL21zbS9tc21fZ3B1LmggYi9kcml2ZXJzL2dwdS9kcm0vbXNtL21zbV9ncHUuaApp bmRleCBmODJiYWMwLi5lZmI0OWJiIDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vbXNtL21z bV9ncHUuaAorKysgYi9kcml2ZXJzL2dwdS9kcm0vbXNtL21zbV9ncHUuaApAQCAtMTg3LDYgKzE4 Nyw3IEBAIHN0cnVjdCBtc21fZ3B1X3N0YXRlX2JvIHsKIAl1NjQgaW92YTsKIAlzaXplX3Qgc2l6 ZTsKIAl2b2lkICpkYXRhOworCWJvb2wgZW5jb2RlZDsKIH07CiAKIHN0cnVjdCBtc21fZ3B1X3N0 YXRlIHsKQEAgLTIwMSw2ICsyMDIsNyBAQCBzdHJ1Y3QgbXNtX2dwdV9zdGF0ZSB7CiAJCXUzMiB3 cHRyOwogCQl2b2lkICpkYXRhOwogCQlpbnQgZGF0YV9zaXplOworCQlib29sIGVuY29kZWQ7CiAJ fSByaW5nW01TTV9HUFVfTUFYX1JJTkdTXTsKIAogCWludCBucl9yZWdpc3RlcnM7Ci0tIAoxLjku MQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KRnJlZWRy ZW5vIG1haWxpbmcgbGlzdApGcmVlZHJlbm9AbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8v bGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZnJlZWRyZW5vCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2C7DC32789 for ; Tue, 6 Nov 2018 06:10:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9757020827 for ; Tue, 6 Nov 2018 06:10:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="YJrST7B/"; dkim=fail reason="key not found in DNS" (0-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="jbLnU8JR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9757020827 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387465AbeKFPeD (ORCPT ); Tue, 6 Nov 2018 10:34:03 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:57624 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729342AbeKFPeC (ORCPT ); Tue, 6 Nov 2018 10:34:02 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 13B0260ADB; Tue, 6 Nov 2018 06:10:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1541484627; bh=Cn3HO29ZZ1PWta/JA8C2cL6tD/wzqk1MvMJZ30dT5bk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YJrST7B/VE61p/ifamGYdJyYKDFoTD4YTEHJAFv3UD+mncXsBQTqMmbfFZnCMDr3P YGFHXl2pqM7b3Uw1YmwelBWe5siISoiK3R+EEXDrSNeJdAtzLnKVehgp4mP7r15Cbd NQOiQoXpuznF7z4iDR7X0oVi7RMoUo7m4l/fbg/E= Received: from smasetty-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: smasetty@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 428C360A9B; Tue, 6 Nov 2018 06:10:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1541484626; bh=Cn3HO29ZZ1PWta/JA8C2cL6tD/wzqk1MvMJZ30dT5bk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jbLnU8JR1Z5joEXHE0GJ04EA+cIHsZ2mttks74EpJLES46dxnBmHLMj3v88EZINFU bMRyJEBs4l3WRQoPadz0M2P7f3MNcwBn9Y+zNOkBR/Uvt46L2kUeLu4DIc8VV5xlFN Wn2z7xnFWn/q6+MifejKrCiJHEltC3jMQHCTi8jw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 428C360A9B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=smasetty@codeaurora.org From: Sharat Masetty To: freedreno@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, chris@chris-wilson.co.uk, jcrouse@codeaurora.org, robdclark@gmail.com, linux-kernel@vger.kernel.org, Sharat Masetty Subject: [PATCH 3/3] drm/msm: Optimize adreno_show_object() Date: Tue, 6 Nov 2018 11:40:06 +0530 Message-Id: <1541484606-20813-3-git-send-email-smasetty@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1541484606-20813-1-git-send-email-smasetty@codeaurora.org> References: <1541484606-20813-1-git-send-email-smasetty@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When the userspace tries to read the crashstate dump, the read side implementation in the driver currently ascii85 encodes all the binary buffers and it does this each time the read system call is called. A userspace tool like cat typically does a page by page read and the number of read calls depends on the size of the data captured by the driver. This is certainly not desirable and does not scale well with large captures. This patch encodes the buffer only once in the read path. With this there is an immediate >10X speed improvement in crashstate save time. Signed-off-by: Sharat Masetty --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 76 ++++++++++++++++++++++++--------- drivers/gpu/drm/msm/msm_gpu.h | 2 + 2 files changed, 58 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index c93702d..e29093e 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -475,34 +475,70 @@ int adreno_gpu_state_put(struct msm_gpu_state *state) #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) -static void adreno_show_object(struct drm_printer *p, u32 *ptr, int len) +static char *adreno_gpu_ascii85_encode(u32 *src, size_t len) { - char out[ASCII85_BUFSZ]; - long l, datalen, i; + void *buf; + size_t buf_itr = 0; + long i, l; - if (!ptr || !len) - return; + if (!len) + return NULL; + + l = ascii85_encode_len(len); /* - * Only dump the non-zero part of the buffer - rarely will any data - * completely fill the entire allocated size of the buffer + * ascii85 outputs either a 5 byte string or a 1 byte string. So we + * account for the worst case of 5 bytes per dword plus the 1 for '\0' */ - for (datalen = 0, i = 0; i < len >> 2; i++) { - if (ptr[i]) - datalen = (i << 2) + 1; - } + buf = kvmalloc((l * 5) + 1, GFP_KERNEL); + if (!buf) + return NULL; - /* Skip printing the object if it is empty */ - if (datalen == 0) + for (i = 0; i < l; i++) + buf_itr += ascii85_encode_to_buf(src[i], buf + buf_itr); + + return buf; +} + +/* len is expected to be in bytes */ +static void adreno_show_object(struct drm_printer *p, void **ptr, int len, + bool *encoded) +{ + if (!*ptr || !len) return; - l = ascii85_encode_len(datalen); + if (!*encoded) { + long datalen, i; + u32 *buf = *ptr; + + /* + * Only dump the non-zero part of the buffer - rarely will + * any data completely fill the entire allocated size of + * the buffer. + */ + for (datalen = 0, i = 0; i < len >> 2; i++) { + if (buf[i]) + datalen = ((i + 1) << 2); + } + + /* + * If we reach here, then the originally captured binary buffer + * will be replaced with the ascii85 encoded string + */ + *ptr = adreno_gpu_ascii85_encode(buf, datalen); + + kvfree(buf); + + *encoded = true; + } + + if (!*ptr) + return; drm_puts(p, " data: !!ascii85 |\n"); drm_puts(p, " "); - for (i = 0; i < l; i++) - drm_puts(p, ascii85_encode(ptr[i], out)); + drm_puts(p, *ptr); drm_puts(p, "\n"); } @@ -534,8 +570,8 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, drm_printf(p, " wptr: %d\n", state->ring[i].wptr); drm_printf(p, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); - adreno_show_object(p, state->ring[i].data, - state->ring[i].data_size); + adreno_show_object(p, &state->ring[i].data, + state->ring[i].data_size, &state->ring[i].encoded); } if (state->bos) { @@ -546,8 +582,8 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, state->bos[i].iova); drm_printf(p, " size: %zd\n", state->bos[i].size); - adreno_show_object(p, state->bos[i].data, - state->bos[i].size); + adreno_show_object(p, &state->bos[i].data, + state->bos[i].size, &state->bos[i].encoded); } } diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index f82bac0..efb49bb 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -187,6 +187,7 @@ struct msm_gpu_state_bo { u64 iova; size_t size; void *data; + bool encoded; }; struct msm_gpu_state { @@ -201,6 +202,7 @@ struct msm_gpu_state { u32 wptr; void *data; int data_size; + bool encoded; } ring[MSM_GPU_MAX_RINGS]; int nr_registers; -- 1.9.1