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From: Alex Williamson <alex.williamson@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: [Qemu-devel] [for-4.0 PATCH v2 9/9] pcie: Fast PCIe root ports for new machines
Date: Mon, 03 Dec 2018 09:28:51 -0700	[thread overview]
Message-ID: <154385453112.17724.5531705925756096220.stgit@gimli.home> (raw)
In-Reply-To: <154385426086.17724.4390242199797858265.stgit@gimli.home>

Change the default speed and width for new machine types to the
fastest and widest currently supported.  This should be compatible to
the PCIe 4.0 spec.  Pre-QEMU-4.0 machine types remain at 2.5GT/s, x1
width.

Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
---
 hw/pci-bridge/gen_pcie_root_port.c |    4 ++--
 include/hw/compat.h                |   10 +++++++++-
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
index e3bba2ab68ef..8e70c32a49ee 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/pci-bridge/gen_pcie_root_port.c
@@ -124,8 +124,8 @@ static Property gen_rp_props[] = {
                      res_reserve.mem_pref_32, -1),
     DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort,
                      res_reserve.mem_pref_64, -1),
-    DEFINE_PROP_PCIE_LINK_SPEED("speed", PCIESlot, speed, PCIE_LINK_SPEED_2_5),
-    DEFINE_PROP_PCIE_LINK_WIDTH("width", PCIESlot, width, PCIE_LINK_WIDTH_1),
+    DEFINE_PROP_PCIE_LINK_SPEED("speed", PCIESlot, speed, PCIE_LINK_SPEED_16),
+    DEFINE_PROP_PCIE_LINK_WIDTH("width", PCIESlot, width, PCIE_LINK_WIDTH_32),
     DEFINE_PROP_END_OF_LIST()
 };
 
diff --git a/include/hw/compat.h b/include/hw/compat.h
index 70958328fe7a..702cc62277db 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -2,7 +2,15 @@
 #define HW_COMPAT_H
 
 #define HW_COMPAT_3_1 \
-    /* empty */
+    {\
+        .driver   = "pcie-root-port",\
+        .property = "speed",\
+        .value    = "2_5",\
+    },{\
+        .driver   = "pcie-root-port",\
+        .property = "width",\
+        .value    = "1",\
+    },
 
 #define HW_COMPAT_3_0 \
     /* empty */

      parent reply	other threads:[~2018-12-03 16:29 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-03 16:27 [Qemu-devel] [for-4.0 PATCH v2 0/9] pcie: Enhanced link speed and width support Alex Williamson
2018-12-03 16:27 ` [Qemu-devel] [for-4.0 PATCH v2 1/9] pcie: Create enums for link speed and width Alex Williamson
2018-12-03 16:27 ` [Qemu-devel] [for-4.0 PATCH v2 2/9] pci: Sync PCIe downstream port LNKSTA on read Alex Williamson
2018-12-03 16:27 ` [Qemu-devel] [for-4.0 PATCH v2 3/9] qapi: Define PCIe link speed and width properties Alex Williamson
2018-12-03 16:27 ` [Qemu-devel] [for-4.0 PATCH v2 4/9] pcie: Add link speed and width fields to PCIESlot Alex Williamson
2018-12-03 16:28 ` [Qemu-devel] [for-4.0 PATCH v2 5/9] pcie: Fill PCIESlot link fields to support higher speeds and widths Alex Williamson
2018-12-03 16:28 ` [Qemu-devel] [for-4.0 PATCH v2 6/9] pcie: Allow generic PCIe root port to specify link speed and width Alex Williamson
2018-12-03 16:28 ` [Qemu-devel] [for-4.0 PATCH v2 7/9] vfio/pci: Remove PCIe Link Status emulation Alex Williamson
2018-12-03 16:28 ` [Qemu-devel] [for-4.0 PATCH v2 8/9] q35/440fx/arm/spapr: Add QEMU 4.0 machine type Alex Williamson
2018-12-04  0:18   ` David Gibson
2018-12-04 18:27   ` Eduardo Habkost
2018-12-05  1:37     ` David Gibson
2018-12-04 18:29   ` Peter Maydell
2018-12-03 16:28 ` Alex Williamson [this message]

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