* [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board
@ 2018-12-20 14:28 Oliver Graute
2018-12-20 14:28 ` [PATCH 2/3] ARM: dts: Add support for i.MX6 UltraLite DART NAND/WIFI Oliver Graute
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Oliver Graute @ 2018-12-20 14:28 UTC (permalink / raw)
To: linux-arm-kernel
Cc: s.hauer, Oliver Graute, linux-imx, kernel, fabio.estevam, shawnguo
From: Oliver Graute <oliver.graute@gmail.com>
This patch adds support for the Variscite DART-6UL SoM
Signed-off-by: Oliver Graute <oliver.graute@gmail.com>
---
.../boot/dts/imx6ul-imx6ull-var-dart-common.dtsi | 623 +++++++++++++++++++++
1 file changed, 623 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
new file mode 100644
index 0000000..0bcb459
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
@@ -0,0 +1,623 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * Copyright (C) 2015-2017 Variscite Ltd. - http://www.variscite.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 20000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ status = "okay";
+ };
+
+ pxp_v4l2 {
+ compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
+ status = "okay";
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ touch_3v3_regulator: touch_3v3_regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "touch_3v3_supply";
+ regulator-always-on;
+ status = "okay";
+ };
+
+ reg_sd1_vmmc: regulator_sd1_vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "VSD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_gpio_dvfs: regulator-gpio {
+ compatible = "regulator-gpio";
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "gpio_dvfs";
+ regulator-type = "voltage";
+ gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
+ states = <1300000 0x1 1400000 0x0>;
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "wm8731audio";
+ simple-audio-card,widgets =
+ "Headphone", "Headphone Jack",
+ "Line", "Line Jack",
+ "Microphone", "Mic Jack";
+ simple-audio-card,routing =
+ "Headphone Jack", "RHPOUT",
+ "Headphone Jack", "LHPOUT",
+ "LLINEIN", "Line Jack",
+ "RLINEIN", "Line Jack",
+ "MICIN", "Mic Bias",
+ "Mic Bias", "Mic Jack";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&sound_master>;
+ simple-audio-card,frame-master = <&sound_master>;
+ /*simple-audio-card,bitclock-inversion;*/
+
+ sound_master: simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
+ system-clock-id = <2>; /* WM8731_SYSCLK_MCLK */
+ system-clock-frequency = <12288000>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ user {
+ gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_BACK>;
+ gpio-key,wakeup;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ d16_led {
+ gpios = <&gpio4 20 0>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&cpu0 {
+ arm-supply = <®_arm>;
+ soc-supply = <®_soc>;
+ dc-supply = <®_gpio_dvfs>;
+};
+
+&clks {
+ /* ref_clk for micrel ethernet phy */
+ rmii_ref_clk: rmii_ref_clk_grp {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ clock-output-names = "rmii-ref";
+ };
+};
+
+&clks {
+ assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+ assigned-clock-rates = <786432000>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-reset-gpios=<&gpio5 0 1>;
+ phy-reset-duration=<100>;
+ phy-reset-on-resume;
+ phy-handle = <ðphy0>;
+ status = "okay";
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ phy-reset-gpios=<&gpio1 10 1>;
+ phy-reset-duration=<100>;
+ phy-reset-on-resume;
+ status = "okay";
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ micrel,rmii-reference-clock-select-25-mhz;
+ clocks = <&rmii_ref_clk>;
+ clock-names = "rmii-ref";
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ micrel,rmii-reference-clock-select-25-mhz;
+ clocks = <&rmii_ref_clk>;
+ clock-names = "rmii-ref";
+ reg = <3>;
+ };
+ };
+};
+
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "okay";
+};
+
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ status = "disabled";
+};
+
+&gpc {
+ fsl,cpu_pupscr_sw2iso = <0x2>;
+ fsl,cpu_pupscr_sw = <0x1>;
+ fsl,cpu_pdnscr_iso2sw = <0x1>;
+ fsl,cpu_pdnscr_iso = <0x1>;
+ fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ display = <&display0>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ bus-width = <24>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency =<35000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <40>;
+ hback-porch = <40>;
+ hsync-len = <48>;
+ vback-porch = <29>;
+ vfront-porch = <13>;
+ vsync-len = <3>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&sai2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai2>;
+ assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
+ <&clks IMX6UL_CLK_SAI2>;
+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+ assigned-clock-rates = <0>, <12288000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
+&adc1 {
+ vref-supply = <&touch_3v3_regulator>;
+ status = "okay";
+};
+
+&tsc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tsc>;
+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ measure_delay_time = <0xffff>;
+ pre_charge_time = <0xfff>;
+ status = "disabled";
+};
+
+/* Console UART */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+/* Bluetooth UART */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ fsl,uart-has-rtscts;
+ status = "okay";
+};
+
+/* ttymxc2 UART */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ fsl,uart-has-rtscts;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+};
+
+&usbotg1 {
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ disable-over-current;
+ status = "okay";
+};
+
+/* Wi-Fi/BT SD Card Slot Definition */
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
+ assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
+ assigned-clock-rates = <0>, <132000000>;
+ fsl,tuning-step= <2>;
+ vmmc-supply = <®_sd1_vmmc>;
+ status = "okay";
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand_1>;
+ fsl,legacy-bch-geometry;
+ status = "okay";
+
+ partition@0 {
+ label = "spl";
+ reg = <0x00000000 0x00200000>;
+ };
+
+ partition@1 {
+ label = "uboot";
+ reg = <0x00200000 0x00200000>;
+ };
+
+ partition@2 {
+ label = "uboot-env";
+ reg = <0x00400000 0x00200000>;
+ };
+
+ partition@3 {
+ label = "kernel";
+ reg = <0x00600000 0x00800000>;
+ };
+
+ partition@4 {
+ label = "rootfs";
+ reg = <0x00e00000 0x3f200000>;
+ };
+};
+
+&usdhc2 {
+ status = "disabled";
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock_frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ codec: wm8731@1a {
+ #sound-dai-cells = <0>;
+ compatible = "wlf,wm8731";
+ reg = <0x1a>;
+ clocks = <&clks IMX6UL_CLK_SAI2>;
+ clock-names = "mclk";
+ };
+
+ ft5x06_ts@38 {
+ compatible = "edt,edt-ft5x06";
+ reg = <0x38>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <4 0>;
+ touchscreen-size-x = <800>;
+ touchscreen-size-y = <480>;
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ };
+
+ /* DS1337 RTC module */
+ rtc@0x68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rtc>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ };
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog_1>;
+ imx6ul-evk {
+ pinctrl_hog_1: hoggrp-1 {
+ fsl,pins = <
+ MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b0
+ MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x17059
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x03029
+ >;
+ };
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
+ MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp{
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020
+ MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp{
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
+ MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
+ MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
+ MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
+ MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
+ MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
+ MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__PWM1_OUT 0x110b0
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
+ MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
+ MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1
+ >;
+ };
+
+ pinctrl_gpmi_nand_1: gpmi-nand-1 {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
+ MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0xb0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_tsc: tscgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+ >;
+ };
+
+ pinctrl_sai1: sai1grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x11088
+ MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC 0x17088
+ MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x11088
+ MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA 0x11088
+ >;
+ };
+
+ pinctrl_sai2: sai2grp {
+ fsl,pins = <
+ MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
+ MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
+ MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
+ MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
+ MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x78b0
+ >;
+ };
+ };
+};
+
+&snvs_rtc {
+ status = "disabled";
+};
+
+&snvs_poweroff {
+ status = "okay";
+};
--
1.9.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] ARM: dts: Add support for i.MX6 UltraLite DART NAND/WIFI
2018-12-20 14:28 [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Oliver Graute
@ 2018-12-20 14:28 ` Oliver Graute
2018-12-20 14:28 ` [PATCH 3/3] ARM: dts: Add imx6ul-var-dart-nand-wifi.dtb Oliver Graute
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Oliver Graute @ 2018-12-20 14:28 UTC (permalink / raw)
To: linux-arm-kernel
Cc: s.hauer, Oliver Graute, linux-imx, kernel, fabio.estevam, shawnguo
From: Oliver Graute <oliver.graute@gmail.com>
This patch adds DeviceTree Bindings for the i.MX6 UltraLite DART NAND/WIFI
Signed-off-by: Oliver Graute <oliver.graute@gmail.com>
---
arch/arm/boot/dts/imx6ul-var-dart.dtsi | 43 ++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-var-dart.dtsi
diff --git a/arch/arm/boot/dts/imx6ul-var-dart.dtsi b/arch/arm/boot/dts/imx6ul-var-dart.dtsi
new file mode 100644
index 0000000..4cdeb89
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-var-dart.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * Support for Variscite DART-6UL Module
+ *
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * Copyright (C) 2015-2016 Variscite Ltd. - http://www.variscite.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include "imx6ul.dtsi"
+#include "imx6ul-imx6ull-var-dart-common.dtsi"
+
+/ {
+ model = "Variscite i.MX6 UltraLite DART NAND/WIFI";
+ compatible = "fsl,imx6ul-var-dart", "fsl,imx6ul";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog_1
+ &pinctrl_hog_2>;
+ imx6ul-evk {
+ pinctrl_hog_2: hoggrp-2 {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0b0
+ MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x1b0b0
+ MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x03029
+ >;
+ };
+
+ pinctrl_rtc: rtcgrp {
+ fsl,pins = <
+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0
+ >;
+ };
+ };
+};
--
1.9.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] ARM: dts: Add imx6ul-var-dart-nand-wifi.dtb
2018-12-20 14:28 [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Oliver Graute
2018-12-20 14:28 ` [PATCH 2/3] ARM: dts: Add support for i.MX6 UltraLite DART NAND/WIFI Oliver Graute
@ 2018-12-20 14:28 ` Oliver Graute
2018-12-26 16:18 ` [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Fabio Estevam
2019-01-03 11:36 ` Neil Armstrong
3 siblings, 0 replies; 7+ messages in thread
From: Oliver Graute @ 2018-12-20 14:28 UTC (permalink / raw)
To: linux-arm-kernel
Cc: s.hauer, Oliver Graute, linux-imx, kernel, fabio.estevam, shawnguo
From: Oliver Graute <oliver.graute@gmail.com>
added imx6ul-var-dart-nand-wifi.dts
updated Makefile
Signed-off-by: Oliver Graute <oliver.graute@gmail.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6ul-var-dart-nand-wifi.dts | 9 +++++++++
2 files changed, 10 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6ul-var-dart-nand-wifi.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 78551c4..9c0c77c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -564,6 +564,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
imx6ul-tx6ul-mainboard.dtb \
+ imx6ul-var-dart-nand-wifi.dts \
imx6ull-14x14-evk.dtb \
imx6ull-colibri-eval-v3.dtb \
imx6ull-colibri-wifi-eval-v3.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-var-dart-nand-wifi.dts b/arch/arm/boot/dts/imx6ul-var-dart-nand-wifi.dts
new file mode 100644
index 0000000..3fa5985
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-var-dart-nand-wifi.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * Copyright (C) 2015-2016 Variscite Ltd. - http://www.variscite.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include "imx6ul-var-dart.dtsi"
--
1.9.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board
2018-12-20 14:28 [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Oliver Graute
2018-12-20 14:28 ` [PATCH 2/3] ARM: dts: Add support for i.MX6 UltraLite DART NAND/WIFI Oliver Graute
2018-12-20 14:28 ` [PATCH 3/3] ARM: dts: Add imx6ul-var-dart-nand-wifi.dtb Oliver Graute
@ 2018-12-26 16:18 ` Fabio Estevam
2019-01-02 22:14 ` Oliver Graute
2019-01-03 11:36 ` Neil Armstrong
3 siblings, 1 reply; 7+ messages in thread
From: Fabio Estevam @ 2018-12-26 16:18 UTC (permalink / raw)
To: Oliver Graute
Cc: Sascha Hauer, NXP Linux Team, Sascha Hauer, Fabio Estevam,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
Hi Oliver,
On Thu, Dec 20, 2018 at 12:29 PM Oliver Graute <oliver.graute@gmail.com> wrote:
>
> From: Oliver Graute <oliver.graute@gmail.com>
>
> This patch adds support for the Variscite DART-6UL SoM
>
> Signed-off-by: Oliver Graute <oliver.graute@gmail.com>
> ---
> .../boot/dts/imx6ul-imx6ull-var-dart-common.dtsi | 623 +++++++++++++++++++++
> 1 file changed, 623 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
>
> diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
> new file mode 100644
> index 0000000..0bcb459
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
> @@ -0,0 +1,623 @@
> +// SPDX-License-Identifier: (GPL-2.0)
> +/*
> + * Copyright (C) 2015 Freescale Semiconductor, Inc.
> + *
> + * Copyright (C) 2015-2017 Variscite Ltd. - http://www.variscite.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
As you added the SPDX identifier you could simply remove this paragraph.
> + */
> +
> +/ {
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + memory {
You need to pass "device_type = "memory";"
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pwm1 0 20000>;
> + brightness-levels = <0 4 8 16 32 64 128 255>;
> + default-brightness-level = <6>;
> + status = "okay";
> + };
> +
> + pxp_v4l2 {
> + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
> + status = "okay";
> + };
This compatible does not exist in mainline, so please remove it.
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + touch_3v3_regulator: touch_3v3_regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "touch_3v3_supply";
> + regulator-always-on;
> + status = "okay";
> + };
regulators should not be places under "simple-bus".
Move it outside and name it like:
touch_3v3_regulator: regulator-touch-3v3 {
> +
> + reg_sd1_vmmc: regulator_sd1_vmmc {
reg_sd1_vmmc: regulato-rsd1-vmmc
> + compatible = "regulator-fixed";
> + regulator-name = "VSD_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + reg_gpio_dvfs: regulator-gpio {
> + compatible = "regulator-gpio";
> + regulator-min-microvolt = <1300000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-name = "gpio_dvfs";
> + regulator-type = "voltage";
> + gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
> + states = <1300000 0x1 1400000 0x0>;
> + };
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "wm8731audio";
> + simple-audio-card,widgets =
> + "Headphone", "Headphone Jack",
> + "Line", "Line Jack",
> + "Microphone", "Mic Jack";
> + simple-audio-card,routing =
> + "Headphone Jack", "RHPOUT",
> + "Headphone Jack", "LHPOUT",
> + "LLINEIN", "Line Jack",
> + "RLINEIN", "Line Jack",
> + "MICIN", "Mic Bias",
> + "Mic Bias", "Mic Jack";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,bitclock-master = <&sound_master>;
> + simple-audio-card,frame-master = <&sound_master>;
> + /*simple-audio-card,bitclock-inversion;*/
Remove the property instead of commenting it out.
> +
> + sound_master: simple-audio-card,cpu {
> + sound-dai = <&sai2>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&codec>;
> + system-clock-id = <2>; /* WM8731_SYSCLK_MCLK */
This property does not exist in mainline.
> + system-clock-frequency = <12288000>;
> + };
> + };
> +
> + keys {
> + compatible = "gpio-keys";
> +
> + user {
> + gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_BACK>;
> + gpio-key,wakeup;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + d16_led {
> + gpios = <&gpio4 20 0>;
Please use GPIO_ACTIVE_HIGH instead of 0.
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> +&cpu0 {
> + arm-supply = <®_arm>;
> + soc-supply = <®_soc>;
> + dc-supply = <®_gpio_dvfs>;
This property does not exist in mainline.
> +
> +&clks {
> + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
> + assigned-clock-rates = <786432000>;
> +};
> +
> +&fec1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet1>;
> + phy-mode = "rmii";
> + phy-reset-gpios=<&gpio5 0 1>;
GPIO_ACTIVE_LOW
> + phy-reset-duration=<100>;
> + phy-reset-on-resume;
This property does not exist in mainline.
> + phy-handle = <ðphy0>;
> + status = "okay";
> +};
> +
> +&fec2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet2>;
> + phy-mode = "rmii";
> + phy-handle = <ðphy1>;
> + phy-reset-gpios=<&gpio1 10 1>;
GPIO_ACTIVE_LOW
> + phy-reset-duration=<100>;
> + phy-reset-on-resume;
This property does not exist in mainline.
> + status = "okay";
Add an empty line here
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +&gpc {
> + fsl,cpu_pupscr_sw2iso = <0x2>;
> + fsl,cpu_pupscr_sw = <0x1>;
> + fsl,cpu_pdnscr_iso2sw = <0x1>;
> + fsl,cpu_pdnscr_iso = <0x1>;
> + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
None of these properties exist.
> +};
> +
> +&lcdif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_lcdif_dat
> + &pinctrl_lcdif_ctrl>;
> + display = <&display0>;
> + status = "okay";
> +
> + display0: display {
> + bits-per-pixel = <16>;
> + bus-width = <24>;
> +
> + display-timings {
> + native-mode = <&timing0>;
> + timing0: timing0 {
> + clock-frequency =<35000000>;
> + hactive = <800>;
> + vactive = <480>;
> + hfront-porch = <40>;
> + hback-porch = <40>;
> + hsync-len = <48>;
> + vback-porch = <29>;
> + vfront-porch = <13>;
> + vsync-len = <3>;
> + hsync-active = <0>;
> + vsync-active = <0>;
> + de-active = <1>;
> + pixelclk-active = <0>;
Don't add timing parameters in the device tree. Add the panel support
in the simple panel driver and use the drm mxsfb bindings.
> +
> +&tsc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_tsc>;
> + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
> + measure_delay_time = <0xffff>;
> + pre_charge_time = <0xfff>;
These two properties do not exist.
> + status = "disabled";
> +};
> +
> +/* Console UART */
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +/* Bluetooth UART */
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + fsl,uart-has-rtscts;
Use "uart-has-rtscts" instead.
> + status = "okay";
> +};
> +
> +/* ttymxc2 UART */
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + fsl,uart-has-rtscts;
Ditto.
> + status = "okay";
> +};
> +
> +&wdog1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdog>;
> + fsl,ext-reset-output;
> +};
Keep the node names sorted . Except iomuxc that can go as the last one.
> +&gpmi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpmi_nand_1>;
> + fsl,legacy-bch-geometry;
> + status = "okay";
> +
> + partition@0 {
> + label = "spl";
> + reg = <0x00000000 0x00200000>;
> + };
> +
> + partition@1 {
> + label = "uboot";
> + reg = <0x00200000 0x00200000>;
The unit address and reg values do not match. This would trigger a dtc
warning if you build it with W=1.
Please make sure that you get no dtc warning in v2
> + };
> +
> + partition@2 {
> + label = "uboot-env";
> + reg = <0x00400000 0x00200000>;
> + };
> +
> + partition@3 {
> + label = "kernel";
> + reg = <0x00600000 0x00800000>;
> + };
> +
> + partition@4 {
> + label = "rootfs";
> + reg = <0x00e00000 0x3f200000>;
> + };
> +};
> +
> +&usdhc2 {
> + status = "disabled";
This node is already disabled in the dtsi.
> +};
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock_frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + codec: wm8731@1a {
Node names should be generic and label names should be specific, so:
wm8731: codec@1a
> + #sound-dai-cells = <0>;
> + compatible = "wlf,wm8731";
> + reg = <0x1a>;
> + clocks = <&clks IMX6UL_CLK_SAI2>;
> + clock-names = "mclk";
> + };
> +
> + ft5x06_ts@38 {
touchscreen@38
> + compatible = "edt,edt-ft5x06";
> + reg = <0x38>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <4 0>;
> + touchscreen-size-x = <800>;
> + touchscreen-size-y = <480>;
> + touchscreen-inverted-x;
> + touchscreen-inverted-y;
> + };
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog_1>;
> + imx6ul-evk {
There is no need for this imx6ul-evk. Just place the pinctrl nodes
outside of it.
> + pinctrl_hog_1: hoggrp-1 {
> + fsl,pins = <
> + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b0
> + MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x17059
These should go to the LED pinctrl group instead of hog.
> + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
> + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
This should go to enet2 pin group instead of hog.
> + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x03029
Is this for Wifi? If so you could add a pwrseq entry that could take care of it.
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Re: [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board
2018-12-26 16:18 ` [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Fabio Estevam
@ 2019-01-02 22:14 ` Oliver Graute
2019-01-03 8:47 ` Fwd: " Oliver Graute
0 siblings, 1 reply; 7+ messages in thread
From: Oliver Graute @ 2019-01-02 22:14 UTC (permalink / raw)
To: linux-arm-kernel
Cc: s.hauer, Oliver Graute, linux-imx, kernel, fabio.estevam, shawnguo
>> +&lcdif {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_lcdif_dat
>> + &pinctrl_lcdif_ctrl>;
>> + display = <&display0>;
>> + status = "okay";
>> +
>> + display0: display {
>> + bits-per-pixel = <16>;
>> + bus-width = <24>;
>> +
>> + display-timings {
>> + native-mode = <&timing0>;
>> + timing0: timing0 {
>> + clock-frequency =<35000000>;
>> + hactive = <800>;
>> + vactive = <480>;
>> + hfront-porch = <40>;
>> + hback-porch = <40>;
>> + hsync-len = <48>;
>> + vback-porch = <29>;
>> + vfront-porch = <13>;
>> + vsync-len = <3>;
>> + hsync-active = <0>;
>> + vsync-active = <0>;
>> + de-active = <1>;
>> + pixelclk-active = <0>;
> Don't add timing parameters in the device tree. Add the panel support
> in the simple panel driver and use the drm mxsfb bindings.
can you point me to an example? I don't have any clue how to do this.
which panel driver code do you mean?
>> + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT
>> 0x03029
>Is this for Wifi? If so you could add a pwrseq entry that could take
>care of it.
yes this PAD is for wifi. Do you have an pwrseq example?
Best Regards,
Oliver
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Fwd: Re: [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board
2019-01-02 22:14 ` Oliver Graute
@ 2019-01-03 8:47 ` Oliver Graute
0 siblings, 0 replies; 7+ messages in thread
From: Oliver Graute @ 2019-01-03 8:47 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Sascha Hauer, Oliver Graute, dl-linux-imx, kernel, Fabio Estevam,
Shawn Guo
Hello,
hope this message come through:
>> +&lcdif {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_lcdif_dat
>> + &pinctrl_lcdif_ctrl>;
>> + display = <&display0>;
>> + status = "okay";
>> +
>> + display0: display {
>> + bits-per-pixel = <16>;
>> + bus-width = <24>;
>> +
>> + display-timings {
>> + native-mode = <&timing0>;
>> + timing0: timing0 {
>> + clock-frequency =<35000000>;
>> + hactive = <800>;
>> + vactive = <480>;
>> + hfront-porch = <40>;
>> + hback-porch = <40>;
>> + hsync-len = <48>;
>> + vback-porch = <29>;
>> + vfront-porch = <13>;
>> + vsync-len = <3>;
>> + hsync-active = <0>;
>> + vsync-active = <0>;
>> + de-active = <1>;
>> + pixelclk-active = <0>;
> Don't add timing parameters in the device tree. Add the panel support
> in the simple panel driver and use the drm mxsfb bindings.
can you point me to an example? I don't have any clue how to do this.
which panel driver code do you mean?
>> + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT
>> 0x03029
>Is this for Wifi? If so you could add a pwrseq entry that could take
>care of it.
yes this PAD is for wifi. Do you have an pwrseq example?
Best Regards,
Oliver
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board
2018-12-20 14:28 [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Oliver Graute
` (2 preceding siblings ...)
2018-12-26 16:18 ` [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Fabio Estevam
@ 2019-01-03 11:36 ` Neil Armstrong
3 siblings, 0 replies; 7+ messages in thread
From: Neil Armstrong @ 2019-01-03 11:36 UTC (permalink / raw)
To: Oliver Graute, linux-arm-kernel
Cc: fabio.estevam, s.hauer, shawnguo, linux-imx, kernel
Hi Olivier,
On 20/12/2018 15:28, Oliver Graute wrote:
> From: Oliver Graute <oliver.graute@gmail.com>
>
> This patch adds support for the Variscite DART-6UL SoM
The subject says "board", but here you add the "UL-ULL" common dtsi.
Here should be only the "SoM" specific nodes,
please look at the arch/arm/boot/dts/imx6qdl-var-dart.dtsi and
arch/arm/boot/dts/imx6q-var-dt6customboard.dts files for the
namings and separations between the SoM and Board DTs.
Especially, all HW on the "SoM" must go in the SoM dtsi and
the hardware on the Variscite provided "Board" in the board dts.
For example, the display must be in the board, you could have some
board based on this SoM without a display for example.
WiFi/BT should go in the SoM, Ethernet in the SoM, but the ethernet
PHY in the board, because another board could use a different PHY.
For audio, the codec should go in the SoM, but the audio card node
should go in the board, since the routing is board specific because
the board could have some other HW behind like amplifier, ...
Finally, the "board" should be named "6ulcustomboard" because it's
the actual board name used by variscite :
https://www.variscite.com/wp-content/uploads/2017/12/VAR-6ULCustomboard-Schematics.pdf
Neil
>
> Signed-off-by: Oliver Graute <oliver.graute@gmail.com>
> ---
> .../boot/dts/imx6ul-imx6ull-var-dart-common.dtsi | 623 +++++++++++++++++++++
> 1 file changed, 623 insertions(+)
> create mode 100644 arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
>
> diff --git a/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
> new file mode 100644
> index 0000000..0bcb459
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ul-imx6ull-var-dart-common.dtsi
> @@ -0,0 +1,623 @@
> +// SPDX-License-Identifier: (GPL-2.0)
> +/*
> + * Copyright (C) 2015 Freescale Semiconductor, Inc.
> + *
> + * Copyright (C) 2015-2017 Variscite Ltd. - http://www.variscite.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +/ {
> + chosen {
> + stdout-path = &uart1;
> + };
> +
> + memory {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pwm1 0 20000>;
> + brightness-levels = <0 4 8 16 32 64 128 255>;
> + default-brightness-level = <6>;
> + status = "okay";
> + };
> +
> + pxp_v4l2 {
> + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
> + status = "okay";
> + };
> +
> + regulators {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + touch_3v3_regulator: touch_3v3_regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "touch_3v3_supply";
> + regulator-always-on;
> + status = "okay";
> + };
> +
> + reg_sd1_vmmc: regulator_sd1_vmmc {
> + compatible = "regulator-fixed";
> + regulator-name = "VSD_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + reg_gpio_dvfs: regulator-gpio {
> + compatible = "regulator-gpio";
> + regulator-min-microvolt = <1300000>;
> + regulator-max-microvolt = <1400000>;
> + regulator-name = "gpio_dvfs";
> + regulator-type = "voltage";
> + gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
> + states = <1300000 0x1 1400000 0x0>;
> + };
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,name = "wm8731audio";
> + simple-audio-card,widgets =
> + "Headphone", "Headphone Jack",
> + "Line", "Line Jack",
> + "Microphone", "Mic Jack";
> + simple-audio-card,routing =
> + "Headphone Jack", "RHPOUT",
> + "Headphone Jack", "LHPOUT",
> + "LLINEIN", "Line Jack",
> + "RLINEIN", "Line Jack",
> + "MICIN", "Mic Bias",
> + "Mic Bias", "Mic Jack";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,bitclock-master = <&sound_master>;
> + simple-audio-card,frame-master = <&sound_master>;
> + /*simple-audio-card,bitclock-inversion;*/
> +
> + sound_master: simple-audio-card,cpu {
> + sound-dai = <&sai2>;
> + };
> +
> + simple-audio-card,codec {
> + sound-dai = <&codec>;
> + system-clock-id = <2>; /* WM8731_SYSCLK_MCLK */
> + system-clock-frequency = <12288000>;
> + };
> + };
> +
> + keys {
> + compatible = "gpio-keys";
> +
> + user {
> + gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_BACK>;
> + gpio-key,wakeup;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + d16_led {
> + gpios = <&gpio4 20 0>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> +
> +&cpu0 {
> + arm-supply = <®_arm>;
> + soc-supply = <®_soc>;
> + dc-supply = <®_gpio_dvfs>;
> +};
> +
> +&clks {
> + /* ref_clk for micrel ethernet phy */
> + rmii_ref_clk: rmii_ref_clk_grp {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + clock-output-names = "rmii-ref";
> + };
> +};
> +
> +&clks {
> + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
> + assigned-clock-rates = <786432000>;
> +};
> +
> +&fec1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet1>;
> + phy-mode = "rmii";
> + phy-reset-gpios=<&gpio5 0 1>;
> + phy-reset-duration=<100>;
> + phy-reset-on-resume;
> + phy-handle = <ðphy0>;
> + status = "okay";
> +};
> +
> +&fec2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet2>;
> + phy-mode = "rmii";
> + phy-handle = <ðphy1>;
> + phy-reset-gpios=<&gpio1 10 1>;
> + phy-reset-duration=<100>;
> + phy-reset-on-resume;
> + status = "okay";
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy0: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + micrel,rmii-reference-clock-select-25-mhz;
> + clocks = <&rmii_ref_clk>;
> + clock-names = "rmii-ref";
> + reg = <1>;
> + };
> +
> + ethphy1: ethernet-phy@3 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + micrel,rmii-reference-clock-select-25-mhz;
> + clocks = <&rmii_ref_clk>;
> + clock-names = "rmii-ref";
> + reg = <3>;
> + };
> + };
> +};
> +
> +&can1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + status = "okay";
> +};
> +
> +&can2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + status = "disabled";
> +};
> +
> +&gpc {
> + fsl,cpu_pupscr_sw2iso = <0x2>;
> + fsl,cpu_pupscr_sw = <0x1>;
> + fsl,cpu_pdnscr_iso2sw = <0x1>;
> + fsl,cpu_pdnscr_iso = <0x1>;
> + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
> +};
> +
> +&lcdif {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_lcdif_dat
> + &pinctrl_lcdif_ctrl>;
> + display = <&display0>;
> + status = "okay";
> +
> + display0: display {
> + bits-per-pixel = <16>;
> + bus-width = <24>;
> +
> + display-timings {
> + native-mode = <&timing0>;
> + timing0: timing0 {
> + clock-frequency =<35000000>;
> + hactive = <800>;
> + vactive = <480>;
> + hfront-porch = <40>;
> + hback-porch = <40>;
> + hsync-len = <48>;
> + vback-porch = <29>;
> + vfront-porch = <13>;
> + vsync-len = <3>;
> + hsync-active = <0>;
> + vsync-active = <0>;
> + de-active = <1>;
> + pixelclk-active = <0>;
> + };
> + };
> + };
> +};
> +
> +&pwm1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm1>;
> + status = "okay";
> +};
> +
> +&sai2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sai2>;
> + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
> + <&clks IMX6UL_CLK_SAI2>;
> + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
> + assigned-clock-rates = <0>, <12288000>;
> + fsl,sai-mclk-direction-output;
> + status = "okay";
> +};
> +
> +&adc1 {
> + vref-supply = <&touch_3v3_regulator>;
> + status = "okay";
> +};
> +
> +&tsc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_tsc>;
> + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
> + measure_delay_time = <0xffff>;
> + pre_charge_time = <0xfff>;
> + status = "disabled";
> +};
> +
> +/* Console UART */
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart1>;
> + status = "okay";
> +};
> +
> +/* Bluetooth UART */
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart2>;
> + fsl,uart-has-rtscts;
> + status = "okay";
> +};
> +
> +/* ttymxc2 UART */
> +&uart3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart3>;
> + fsl,uart-has-rtscts;
> + status = "okay";
> +};
> +
> +&wdog1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdog>;
> + fsl,ext-reset-output;
> +};
> +
> +&usbotg1 {
> + dr_mode = "host";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +&usbotg2 {
> + dr_mode = "host";
> + disable-over-current;
> + status = "okay";
> +};
> +
> +/* Wi-Fi/BT SD Card Slot Definition */
> +&usdhc1 {
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + pinctrl-0 = <&pinctrl_usdhc1>;
> + pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
> + assigned-clocks = <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDHC1>;
> + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
> + assigned-clock-rates = <0>, <132000000>;
> + fsl,tuning-step= <2>;
> + vmmc-supply = <®_sd1_vmmc>;
> + status = "okay";
> +};
> +
> +&gpmi {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpmi_nand_1>;
> + fsl,legacy-bch-geometry;
> + status = "okay";
> +
> + partition@0 {
> + label = "spl";
> + reg = <0x00000000 0x00200000>;
> + };
> +
> + partition@1 {
> + label = "uboot";
> + reg = <0x00200000 0x00200000>;
> + };
> +
> + partition@2 {
> + label = "uboot-env";
> + reg = <0x00400000 0x00200000>;
> + };
> +
> + partition@3 {
> + label = "kernel";
> + reg = <0x00600000 0x00800000>;
> + };
> +
> + partition@4 {
> + label = "rootfs";
> + reg = <0x00e00000 0x3f200000>;
> + };
> +};
> +
> +&usdhc2 {
> + status = "disabled";
> +};
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock_frequency = <100000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +
> + codec: wm8731@1a {
> + #sound-dai-cells = <0>;
> + compatible = "wlf,wm8731";
> + reg = <0x1a>;
> + clocks = <&clks IMX6UL_CLK_SAI2>;
> + clock-names = "mclk";
> + };
> +
> + ft5x06_ts@38 {
> + compatible = "edt,edt-ft5x06";
> + reg = <0x38>;
> + interrupt-parent = <&gpio3>;
> + interrupts = <4 0>;
> + touchscreen-size-x = <800>;
> + touchscreen-size-y = <480>;
> + touchscreen-inverted-x;
> + touchscreen-inverted-y;
> + };
> +
> + /* DS1337 RTC module */
> + rtc@0x68 {
> + compatible = "dallas,ds1337";
> + reg = <0x68>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rtc>;
> + interrupt-parent = <&gpio5>;
> + interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
> + };
> +};
> +
> +&iomuxc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_hog_1>;
> + imx6ul-evk {
> + pinctrl_hog_1: hoggrp-1 {
> + fsl,pins = <
> + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b0
> + MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x17059
> + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
> + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
> + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x03029
> + >;
> + };
> +
> + pinctrl_enet1: enet1grp {
> + fsl,pins = <
> + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
> + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
> + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
> + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
> + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
> + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
> + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
> + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
> + >;
> + };
> +
> + pinctrl_enet2: enet2grp {
> + fsl,pins = <
> + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
> + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
> + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
> + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
> + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
> + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
> + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
> + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
> + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0
> + >;
> + };
> +
> + pinctrl_flexcan1: flexcan1grp{
> + fsl,pins = <
> + MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020
> + MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020
> + >;
> + };
> +
> + pinctrl_flexcan2: flexcan2grp{
> + fsl,pins = <
> + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
> + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
> + >;
> + };
> +
> + pinctrl_lcdif_dat: lcdifdatgrp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
> + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
> + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
> + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
> + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
> + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
> + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
> + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
> + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
> + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
> + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
> + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
> + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
> + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
> + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
> + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
> + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
> + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
> + >;
> + };
> +
> + pinctrl_lcdif_ctrl: lcdifctrlgrp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
> + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
> + >;
> + };
> +
> + pinctrl_pwm1: pwm1grp {
> + fsl,pins = <
> + MX6UL_PAD_LCD_DATA00__PWM1_OUT 0x110b0
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
> + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
> + MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart3: uart3grp {
> + fsl,pins = <
> + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
> + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
> + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1
> + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usdhc1: usdhc1grp {
> + fsl,pins = <
> + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
> + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059
> + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
> + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
> + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
> + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
> + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
> + fsl,pins = <
> + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
> + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
> + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
> + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
> + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
> + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
> + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
> + fsl,pins = <
> + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
> + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
> + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
> + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
> + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
> + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
> + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b0b1
> + >;
> + };
> +
> + pinctrl_gpmi_nand_1: gpmi-nand-1 {
> + fsl,pins = <
> + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
> + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
> + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
> + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
> + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
> + MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0xb0b1
> + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
> + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
> + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
> + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
> + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
> + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
> + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
> + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
> + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
> + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
> + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
> + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
> + >;
> + };
> +
> + pinctrl_tsc: tscgrp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
> + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
> + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
> + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
> + >;
> + };
> +
> + pinctrl_sai1: sai1grp {
> + fsl,pins = <
> + MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x11088
> + MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC 0x17088
> + MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x11088
> + MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA 0x11088
> + >;
> + };
> +
> + pinctrl_sai2: sai2grp {
> + fsl,pins = <
> + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
> + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
> + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088
> + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088
> + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x78b0
> + >;
> + };
> + };
> +};
> +
> +&snvs_rtc {
> + status = "disabled";
> +};
> +
> +&snvs_poweroff {
> + status = "okay";
> +};
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-01-03 11:36 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-12-20 14:28 [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Oliver Graute
2018-12-20 14:28 ` [PATCH 2/3] ARM: dts: Add support for i.MX6 UltraLite DART NAND/WIFI Oliver Graute
2018-12-20 14:28 ` [PATCH 3/3] ARM: dts: Add imx6ul-var-dart-nand-wifi.dtb Oliver Graute
2018-12-26 16:18 ` [PATCH 1/3] ARM: dts: Add support for Variscite DART-6UL board Fabio Estevam
2019-01-02 22:14 ` Oliver Graute
2019-01-03 8:47 ` Fwd: " Oliver Graute
2019-01-03 11:36 ` Neil Armstrong
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