[PATCH v2 0/3] x86/umwait: Enable user wait instructions

[Fenghua Yu <fenghua.yu@intel.com>]

User wait instructions (umwait, umonitor, and tpause) and
IA32_MWAIT_CONTROL MSR to control umwait/umonitor/tpause behaviors
will be available in Tremont and other future x86 processors.

This patch set enumerates the instructions, adds a sysfs interface for
user to configure the umwait/umonitor/tpause instructions.

The sysfs interface files are in /sys/devices/system/cpu/umwait_control/
because it's hard to find an existing place to host the files.

The instructions generates #GP if CR4.TSD=1 and CPL>0. If user worries
security issues from the instructions, disabling TSC can prevent
malicious code from executing the instructions.

Detailed information on the instructions and the MSR can be found in
the latest Intel Architecture Instruction Set Extensions and Future
Features Programming Reference.

Changelog:
v2:
- Address comments from Thomas Gleixner and Andy Lutomirski
- Remove vDSO functions
- Add sysfs control file for umwait max time

v1:
Based on comments from Thomas:
- Change user APIs to vDSO functions
- Change sysfs to positive logic and enable file name
- Change patch descriptions etc

Fenghua Yu (3):
  x86/cpufeatures: Enumerate user wait instructions
  x86/umwait: Setup umwait C0.2 state
  x86/umwait: Control umwait maximum time

 arch/x86/include/asm/cpufeatures.h |   1 +
 arch/x86/include/asm/msr-index.h   |   6 ++
 arch/x86/power/Makefile            |   1 +
 arch/x86/power/umwait.c            | 154 +++++++++++++++++++++++++++++
 4 files changed, 162 insertions(+)
 create mode 100644 arch/x86/power/umwait.c

-- 
2.19.1