From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [PATCHv2,1/4] EDAC, altera: Fix S10 persistent register offset From: thor.thayer@linux.intel.com Message-Id: <1548179287-21760-2-git-send-email-thor.thayer@linux.intel.com> Date: Tue, 22 Jan 2019 11:48:04 -0600 To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, james.morse@arm.com Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org, stable@vger.kernel.org List-ID: RnJvbTogVGhvciBUaGF5ZXIgPHRob3IudGhheWVyQGxpbnV4LmludGVsLmNvbT4KCkNvcnJlY3Qg dGhlIHBlcnNpc3RlbnQgcmVnaXN0ZXIgb2Zmc2V0IHdoZXJlIGFkZHJlc3MKYW5kIHN0YXR1cyBh cmUgc3RvcmVkLgoKRml4ZXM6IDA4ZjA4YmZiN2I0YyAoIkVEQUMsIGFsdGVyYTogTWVyZ2UgU3Ry YXRpeDEwIGludG8gdGhlIEFycmlhMTAgU0RSQU0gcHJvYmUgcm91dGluZSIpCkNjOiBzdGFibGVA dmdlci5rZXJuZWwub3JnClNpZ25lZC1vZmYtYnk6IFRob3IgVGhheWVyIDx0aG9yLnRoYXllckBs aW51eC5pbnRlbC5jb20+Ci0tLQp2MiAgRml4ZXMgdGFnIHNob3VsZCBiZSBvbiBvbmUgbGluZSBp bnN0ZWFkIG9mIHdyYXBwZWQuCi0tLQogZHJpdmVycy9lZGFjL2FsdGVyYV9lZGFjLmggfCA0ICsr LS0KIDEgZmlsZSBjaGFuZ2VkLCAyIGluc2VydGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCgpkaWZm IC0tZ2l0IGEvZHJpdmVycy9lZGFjL2FsdGVyYV9lZGFjLmggYi9kcml2ZXJzL2VkYWMvYWx0ZXJh X2VkYWMuaAppbmRleCA0MjEzY2IwYmIyYTcuLmY4NjY0YmFjOWZhOCAxMDA2NDQKLS0tIGEvZHJp dmVycy9lZGFjL2FsdGVyYV9lZGFjLmgKKysrIGIvZHJpdmVycy9lZGFjL2FsdGVyYV9lZGFjLmgK QEAgLTI5NSw4ICsyOTUsOCBAQCBzdHJ1Y3QgYWx0cl9zZHJhbV9tY19kYXRhIHsKICNkZWZpbmUg UzEwX1NZU01HUl9FQ0NfSU5UU1RBVF9ERVJSX09GU1QgIDB4QTAKIAogLyogU3RpY2t5IHJlZ2lz dGVycyBmb3IgVW5jb3JyZWN0ZWQgRXJyb3JzICovCi0jZGVmaW5lIFMxMF9TWVNNR1JfVUVfVkFM X09GU1QgICAgICAgICAgICAweDEyMAotI2RlZmluZSBTMTBfU1lTTUdSX1VFX0FERFJfT0ZTVCAg ICAgICAgICAgMHgxMjQKKyNkZWZpbmUgUzEwX1NZU01HUl9VRV9WQUxfT0ZTVCAgICAgICAgICAg IDB4MjIwCisjZGVmaW5lIFMxMF9TWVNNR1JfVUVfQUREUl9PRlNUICAgICAgICAgICAweDIyNAog CiAjZGVmaW5lIFMxMF9ERFIwX0lSUV9NQVNLICAgICAgICAgICAgICAgICBCSVQoMTYpCiAK From mboxrd@z Thu Jan 1 00:00:00 1970 From: thor.thayer@linux.intel.com Subject: [PATCHv2 1/4] EDAC, altera: Fix S10 persistent register offset Date: Tue, 22 Jan 2019 11:48:04 -0600 Message-ID: <1548179287-21760-2-git-send-email-thor.thayer@linux.intel.com> References: <1548179287-21760-1-git-send-email-thor.thayer@linux.intel.com> Return-path: In-Reply-To: <1548179287-21760-1-git-send-email-thor.thayer@linux.intel.com> Sender: stable-owner@vger.kernel.org To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, james.morse@arm.com Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org, stable@vger.kernel.org List-Id: devicetree@vger.kernel.org From: Thor Thayer Correct the persistent register offset where address and status are stored. Fixes: 08f08bfb7b4c ("EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine") Cc: stable@vger.kernel.org Signed-off-by: Thor Thayer --- v2 Fixes tag should be on one line instead of wrapped. --- drivers/edac/altera_edac.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 4213cb0bb2a7..f8664bac9fa8 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -295,8 +295,8 @@ struct altr_sdram_mc_data { #define S10_SYSMGR_ECC_INTSTAT_DERR_OFST 0xA0 /* Sticky registers for Uncorrected Errors */ -#define S10_SYSMGR_UE_VAL_OFST 0x120 -#define S10_SYSMGR_UE_ADDR_OFST 0x124 +#define S10_SYSMGR_UE_VAL_OFST 0x220 +#define S10_SYSMGR_UE_ADDR_OFST 0x224 #define S10_DDR0_IRQ_MASK BIT(16) -- 2.7.4