From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v4,1/5] dmaengine: imx-sdma: add clock ratio 1:1 check From: Lucas Stach Message-Id: <1548409366.28802.39.camel@pengutronix.de> Date: Fri, 25 Jan 2019 10:42:46 +0100 To: "Angus Ainslie (Purism)" Cc: angus.ainslie@puri.sm, Vinod Koul , dmaengine@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Daniel Baluta List-ID: QW0gRG9ubmVyc3RhZywgZGVuIDI0LjAxLjIwMTksIDE5OjU1IC0wNzAwIHNjaHJpZWIgQW5ndXMg QWluc2xpZSAoUHVyaXNtKToKPiBPbiBpLm14OCBtc2NhbGUgQjAgY2hpcCwgQUhCL1NETUEgY2xv Y2sgcmF0aW8gMjoxIGNhbid0IGJlIHN1cHBvcnR0ZWQsCj4gc2luY2UgU0RNQSBjbG9jayByYXRp byBoYXMgdG8gYmUgaW5jcmVhc2VkIHRvIDI1ME1oeiwgQUhCIGNhbid0IHJlYWNoCj4gdG8gNTAw TWh6LCBzbyB1c2UgMToxIGluc3RlYWQuCj4gCj4gPiBCYXNlZCBvbiBOWFAgY29tbWl0IE1MSy0x Njg0MS0xIGJ5IFJvYmluIEdvbmcgPHlpYmluLmdvbmdAbnhwLmNvbT4KPiAKPiA+IFNpZ25lZC1v ZmYtYnk6IEFuZ3VzIEFpbnNsaWUgKFB1cmlzbSkgPGFuZ3VzQGFra2VhLmNhPgo+IC0tLQo+IMKg ZHJpdmVycy9kbWEvaW14LXNkbWEuYyB8IDIxICsrKysrKysrKysrKysrKysrLS0tLQo+IMKgMSBm aWxlIGNoYW5nZWQsIDE3IGluc2VydGlvbnMoKyksIDQgZGVsZXRpb25zKC0pCj4gCj4gZGlmZiAt LWdpdCBhL2RyaXZlcnMvZG1hL2lteC1zZG1hLmMgYi9kcml2ZXJzL2RtYS9pbXgtc2RtYS5jCj4g aW5kZXggMGIzYTY3ZmY4ZTgyLi41ZTVlZjBiNWE5NzMgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9k bWEvaW14LXNkbWEuYwo+ICsrKyBiL2RyaXZlcnMvZG1hL2lteC1zZG1hLmMKPiBAQCAtNDQwLDYg KzQ0MCw4IEBAIHN0cnVjdCBzZG1hX2VuZ2luZSB7Cj4gPiA+IMKgCXVuc2lnbmVkIGludAkJCWly cTsKPiA+ID4gwqAJZG1hX2FkZHJfdAkJCWJkMF9waHlzOwo+ID4gPiDCoAlzdHJ1Y3Qgc2RtYV9i dWZmZXJfZGVzY3JpcHRvcgkqYmQwOwo+ID4gKwkvKiBjbG9jayByYXRpbyBmb3IgQUhCOlNETUEg Y29yZS4gMToxIGlzIDEsIDI6MSBpcyAwKi8KPiA+ID4gKwlib29sCQkJCWNsa19yYXRpbzsKPiDC oH07Cj4gwqAKPiDCoHN0YXRpYyBpbnQgc2RtYV9jb25maWdfd3JpdGUoc3RydWN0IGRtYV9jaGFu ICpjaGFuLAo+IEBAIC02NjIsOCArNjY0LDE0IEBAIHN0YXRpYyBpbnQgc2RtYV9ydW5fY2hhbm5l bDAoc3RydWN0IHNkbWFfZW5naW5lICpzZG1hKQo+ID4gwqAJCWRldl9lcnIoc2RtYS0+ZGV2LCAi VGltZW91dCB3YWl0aW5nIGZvciBDSDAgcmVhZHlcbiIpOwo+IMKgCj4gPiDCoAkvKiBTZXQgYml0 cyBvZiBDT05GSUcgcmVnaXN0ZXIgd2l0aCBkeW5hbWljIGNvbnRleHQgc3dpdGNoaW5nICovCj4g PiAtCWlmIChyZWFkbChzZG1hLT5yZWdzICsgU0RNQV9IX0NPTkZJRykgPT0gMCkKPiA+IC0JCXdy aXRlbF9yZWxheGVkKFNETUFfSF9DT05GSUdfQ1NNLCBzZG1hLT5yZWdzICsgU0RNQV9IX0NPTkZJ Ryk7Cj4gKwlpZiAoKHJlYWRsKHNkbWEtPnJlZ3MgKyBTRE1BX0hfQ09ORklHKSAmIH5TRE1BX0hf Q09ORklHX0FDUikgPT0gMCkgewoKVGhlIGludGVudGlvbiBvZiB0aGlzIGNvZGUgd2FzIHByb2Jh Ymx5IHRvIHNldCB0aGUgQ1NNIGJpdCBpZiB0aGV5CndlcmVuJ3Qgc2V0IGJlZm9yZSwgc28gbWFz a2luZyBvdXQgaW5kaXZpZHVhbCBiaXRzIGZyb20gdGhlIHJlZ2lzdGVyCmFuZCByaXNraW5nIHRv IHNraXAgdGhpcyB3aGVuIG9uZSBvZiB0aGUgb3RoZXIgYml0cyB3YXMgc2V0IGRvZXNuJ3QKc2Vl bSByaWdodC4KCkkgZ3Vlc3MgdGhlIHdob2xlIGJsb2NrIGNhbiBiZSBzaW1wbGlmaWVkIHRvOgoK cmVnID0gcmVhZGwoc2RtYS0+cmVncyArIFNETUFfSF9DT05GSUcpOwppZiAoKHJlZyAmIFNETUFf SF9DT05GSUdfQ1NNKSAhPSBTRE1BX0hfQ09ORklHX0NTTSkKCXJlZyB8PSBTRE1BX0hfQ09ORklH X0NTTTsKd3JpdGVsX3JlbGF4ZWQocmVnLCBzZG1hLT5yZWdzICsgU0RNQV9IX0NPTkZJRyk7CgpS ZWdhcmRzLApMdWNhcwoKPiArCQlyZWcgPSBTRE1BX0hfQ09ORklHX0NTTTsKPiArCj4gPiArCQlp ZiAoc2RtYS0+Y2xrX3JhdGlvKQo+ID4gKwkJCXJlZyB8PSBTRE1BX0hfQ09ORklHX0FDUjsKPiAr Cj4gPiArCQl3cml0ZWxfcmVsYXhlZChyZWcsIHNkbWEtPnJlZ3MgKyBTRE1BX0hfQ09ORklHKTsK PiA+ICsJfQo+IMKgCj4gPiDCoAlyZXR1cm4gcmV0Owo+IMKgfQo+IEBAIC0xODQwLDYgKzE4NDgs OSBAQCBzdGF0aWMgaW50IHNkbWFfaW5pdChzdHJ1Y3Qgc2RtYV9lbmdpbmUgKnNkbWEpCj4gPiDC oAlpZiAocmV0KQo+ID4gwqAJCWdvdG8gZGlzYWJsZV9jbGtfaXBnOwo+IMKgCj4gPiArCWlmIChj bGtfZ2V0X3JhdGUoc2RtYS0+Y2xrX2FoYikgPT0gY2xrX2dldF9yYXRlKHNkbWEtPmNsa19pcGcp KQo+ID4gKwkJc2RtYS0+Y2xrX3JhdGlvID0gMTsKPiArCj4gPiDCoAkvKiBCZSBzdXJlIFNETUEg aGFzIG5vdCBzdGFydGVkIHlldCAqLwo+ID4gwqAJd3JpdGVsX3JlbGF4ZWQoMCwgc2RtYS0+cmVn cyArIFNETUFfSF9DMFBUUik7Cj4gwqAKPiBAQCAtMTg4MCw4ICsxODkxLDEwIEBAIHN0YXRpYyBp bnQgc2RtYV9pbml0KHN0cnVjdCBzZG1hX2VuZ2luZSAqc2RtYSkKPiA+IMKgCXdyaXRlbF9yZWxh eGVkKDB4NDA1MCwgc2RtYS0+cmVncyArIFNETUFfQ0hOMEFERFIpOwo+IMKgCj4gPiDCoAkvKiBT ZXQgYml0cyBvZiBDT05GSUcgcmVnaXN0ZXIgYnV0IHdpdGggc3RhdGljIGNvbnRleHQgc3dpdGNo aW5nICovCj4gPiAtCS8qIEZJWE1FOiBDaGVjayB3aGV0aGVyIHRvIHNldCBBQ1IgYml0IGRlcGVu ZGluZyBvbiBjbG9jayByYXRpb3MgKi8KPiA+IC0Jd3JpdGVsX3JlbGF4ZWQoMCwgc2RtYS0+cmVn cyArIFNETUFfSF9DT05GSUcpOwo+ID4gKwlpZiAoc2RtYS0+Y2xrX3JhdGlvKQo+ID4gKwkJd3Jp dGVsX3JlbGF4ZWQoU0RNQV9IX0NPTkZJR19BQ1IsIHNkbWEtPnJlZ3MgKyBTRE1BX0hfQ09ORklH KTsKPiA+ICsJZWxzZQo+ID4gKwkJd3JpdGVsX3JlbGF4ZWQoMCwgc2RtYS0+cmVncyArIFNETUFf SF9DT05GSUcpOwo+IMKgCj4gPiDCoAl3cml0ZWxfcmVsYXhlZChjY2JfcGh5cywgc2RtYS0+cmVn cyArIFNETUFfSF9DMFBUUik7Cj4K From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F64BC282C0 for ; Fri, 25 Jan 2019 09:42:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0799C2184B for ; Fri, 25 Jan 2019 09:42:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728986AbfAYJmw (ORCPT ); Fri, 25 Jan 2019 04:42:52 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:58099 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726888AbfAYJmw (ORCPT ); Fri, 25 Jan 2019 04:42:52 -0500 Received: from kresse.hi.pengutronix.de ([2001:67c:670:100:1d::2a]) by metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1gmy0c-0002bH-MG; Fri, 25 Jan 2019 10:42:46 +0100 Message-ID: <1548409366.28802.39.camel@pengutronix.de> Subject: Re: [PATCH v4 1/5] dmaengine: imx-sdma: add clock ratio 1:1 check From: Lucas Stach To: "Angus Ainslie (Purism)" Cc: angus.ainslie@puri.sm, Vinod Koul , dmaengine@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Daniel Baluta Date: Fri, 25 Jan 2019 10:42:46 +0100 In-Reply-To: <20190125025528.15645-2-angus@akkea.ca> References: <20190120023150.17138-1-angus@akkea.ca> <20190125025528.15645-1-angus@akkea.ca> <20190125025528.15645-2-angus@akkea.ca> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::2a X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Donnerstag, den 24.01.2019, 19:55 -0700 schrieb Angus Ainslie (Purism): > On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted, > since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach > to 500Mhz, so use 1:1 instead. > > > Based on NXP commit MLK-16841-1 by Robin Gong > > > Signed-off-by: Angus Ainslie (Purism) > --- >  drivers/dma/imx-sdma.c | 21 +++++++++++++++++---- >  1 file changed, 17 insertions(+), 4 deletions(-) > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c > index 0b3a67ff8e82..5e5ef0b5a973 100644 > --- a/drivers/dma/imx-sdma.c > +++ b/drivers/dma/imx-sdma.c > @@ -440,6 +440,8 @@ struct sdma_engine { > > >   unsigned int irq; > > >   dma_addr_t bd0_phys; > > >   struct sdma_buffer_descriptor *bd0; > > + /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/ > > > + bool clk_ratio; >  }; >   >  static int sdma_config_write(struct dma_chan *chan, > @@ -662,8 +664,14 @@ static int sdma_run_channel0(struct sdma_engine *sdma) > >   dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); >   > >   /* Set bits of CONFIG register with dynamic context switching */ > > - if (readl(sdma->regs + SDMA_H_CONFIG) == 0) > > - writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG); > + if ((readl(sdma->regs + SDMA_H_CONFIG) & ~SDMA_H_CONFIG_ACR) == 0) { The intention of this code was probably to set the CSM bit if they weren't set before, so masking out individual bits from the register and risking to skip this when one of the other bits was set doesn't seem right. I guess the whole block can be simplified to: reg = readl(sdma->regs + SDMA_H_CONFIG); if ((reg & SDMA_H_CONFIG_CSM) != SDMA_H_CONFIG_CSM) reg |= SDMA_H_CONFIG_CSM; writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG); Regards, Lucas > + reg = SDMA_H_CONFIG_CSM; > + > > + if (sdma->clk_ratio) > > + reg |= SDMA_H_CONFIG_ACR; > + > > + writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG); > > + } >   > >   return ret; >  } > @@ -1840,6 +1848,9 @@ static int sdma_init(struct sdma_engine *sdma) > >   if (ret) > >   goto disable_clk_ipg; >   > > + if (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg)) > > + sdma->clk_ratio = 1; > + > >   /* Be sure SDMA has not started yet */ > >   writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); >   > @@ -1880,8 +1891,10 @@ static int sdma_init(struct sdma_engine *sdma) > >   writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR); >   > >   /* Set bits of CONFIG register but with static context switching */ > > - /* FIXME: Check whether to set ACR bit depending on clock ratios */ > > - writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); > > + if (sdma->clk_ratio) > > + writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG); > > + else > > + writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); >   > >   writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); >   From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7D12C282C2 for ; Fri, 25 Jan 2019 09:42:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher 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metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1gmy0c-0002bH-MG; Fri, 25 Jan 2019 10:42:46 +0100 Message-ID: <1548409366.28802.39.camel@pengutronix.de> Subject: Re: [PATCH v4 1/5] dmaengine: imx-sdma: add clock ratio 1:1 check From: Lucas Stach To: "Angus Ainslie (Purism)" Date: Fri, 25 Jan 2019 10:42:46 +0100 In-Reply-To: <20190125025528.15645-2-angus@akkea.ca> References: <20190120023150.17138-1-angus@akkea.ca> <20190125025528.15645-1-angus@akkea.ca> <20190125025528.15645-2-angus@akkea.ca> X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::2a X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190125_014252_173650_FCAF533D X-CRM114-Status: GOOD ( 16.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Baluta , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, Vinod Koul , NXP Linux Team , Pengutronix Kernel Team , angus.ainslie@puri.sm, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org QW0gRG9ubmVyc3RhZywgZGVuIDI0LjAxLjIwMTksIDE5OjU1IC0wNzAwIHNjaHJpZWIgQW5ndXMg QWluc2xpZSAoUHVyaXNtKToKPiBPbiBpLm14OCBtc2NhbGUgQjAgY2hpcCwgQUhCL1NETUEgY2xv Y2sgcmF0aW8gMjoxIGNhbid0IGJlIHN1cHBvcnR0ZWQsCj4gc2luY2UgU0RNQSBjbG9jayByYXRp byBoYXMgdG8gYmUgaW5jcmVhc2VkIHRvIDI1ME1oeiwgQUhCIGNhbid0IHJlYWNoCj4gdG8gNTAw TWh6LCBzbyB1c2UgMToxIGluc3RlYWQuCj4gCj4gPiBCYXNlZCBvbiBOWFAgY29tbWl0IE1MSy0x Njg0MS0xIGJ5IFJvYmluIEdvbmcgPHlpYmluLmdvbmdAbnhwLmNvbT4KPiAKPiA+IFNpZ25lZC1v ZmYtYnk6IEFuZ3VzIEFpbnNsaWUgKFB1cmlzbSkgPGFuZ3VzQGFra2VhLmNhPgo+IC0tLQo+IMKg ZHJpdmVycy9kbWEvaW14LXNkbWEuYyB8IDIxICsrKysrKysrKysrKysrKysrLS0tLQo+IMKgMSBm aWxlIGNoYW5nZWQsIDE3IGluc2VydGlvbnMoKyksIDQgZGVsZXRpb25zKC0pCj4gCj4gZGlmZiAt LWdpdCBhL2RyaXZlcnMvZG1hL2lteC1zZG1hLmMgYi9kcml2ZXJzL2RtYS9pbXgtc2RtYS5jCj4g aW5kZXggMGIzYTY3ZmY4ZTgyLi41ZTVlZjBiNWE5NzMgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9k bWEvaW14LXNkbWEuYwo+ICsrKyBiL2RyaXZlcnMvZG1hL2lteC1zZG1hLmMKPiBAQCAtNDQwLDYg KzQ0MCw4IEBAIHN0cnVjdCBzZG1hX2VuZ2luZSB7Cj4gPiA+IMKgCXVuc2lnbmVkIGludAkJCWly cTsKPiA+ID4gwqAJZG1hX2FkZHJfdAkJCWJkMF9waHlzOwo+ID4gPiDCoAlzdHJ1Y3Qgc2RtYV9i dWZmZXJfZGVzY3JpcHRvcgkqYmQwOwo+ID4gKwkvKiBjbG9jayByYXRpbyBmb3IgQUhCOlNETUEg Y29yZS4gMToxIGlzIDEsIDI6MSBpcyAwKi8KPiA+ID4gKwlib29sCQkJCWNsa19yYXRpbzsKPiDC oH07Cj4gwqAKPiDCoHN0YXRpYyBpbnQgc2RtYV9jb25maWdfd3JpdGUoc3RydWN0IGRtYV9jaGFu ICpjaGFuLAo+IEBAIC02NjIsOCArNjY0LDE0IEBAIHN0YXRpYyBpbnQgc2RtYV9ydW5fY2hhbm5l bDAoc3RydWN0IHNkbWFfZW5naW5lICpzZG1hKQo+ID4gwqAJCWRldl9lcnIoc2RtYS0+ZGV2LCAi VGltZW91dCB3YWl0aW5nIGZvciBDSDAgcmVhZHlcbiIpOwo+IMKgCj4gPiDCoAkvKiBTZXQgYml0 cyBvZiBDT05GSUcgcmVnaXN0ZXIgd2l0aCBkeW5hbWljIGNvbnRleHQgc3dpdGNoaW5nICovCj4g PiAtCWlmIChyZWFkbChzZG1hLT5yZWdzICsgU0RNQV9IX0NPTkZJRykgPT0gMCkKPiA+IC0JCXdy aXRlbF9yZWxheGVkKFNETUFfSF9DT05GSUdfQ1NNLCBzZG1hLT5yZWdzICsgU0RNQV9IX0NPTkZJ Ryk7Cj4gKwlpZiAoKHJlYWRsKHNkbWEtPnJlZ3MgKyBTRE1BX0hfQ09ORklHKSAmIH5TRE1BX0hf Q09ORklHX0FDUikgPT0gMCkgewoKVGhlIGludGVudGlvbiBvZiB0aGlzIGNvZGUgd2FzIHByb2Jh Ymx5IHRvIHNldCB0aGUgQ1NNIGJpdCBpZiB0aGV5CndlcmVuJ3Qgc2V0IGJlZm9yZSwgc28gbWFz a2luZyBvdXQgaW5kaXZpZHVhbCBiaXRzIGZyb20gdGhlIHJlZ2lzdGVyCmFuZCByaXNraW5nIHRv IHNraXAgdGhpcyB3aGVuIG9uZSBvZiB0aGUgb3RoZXIgYml0cyB3YXMgc2V0IGRvZXNuJ3QKc2Vl bSByaWdodC4KCkkgZ3Vlc3MgdGhlIHdob2xlIGJsb2NrIGNhbiBiZSBzaW1wbGlmaWVkIHRvOgoK cmVnID0gcmVhZGwoc2RtYS0+cmVncyArIFNETUFfSF9DT05GSUcpOwppZiAoKHJlZyAmIFNETUFf SF9DT05GSUdfQ1NNKSAhPSBTRE1BX0hfQ09ORklHX0NTTSkKCXJlZyB8PSBTRE1BX0hfQ09ORklH X0NTTTsKd3JpdGVsX3JlbGF4ZWQocmVnLCBzZG1hLT5yZWdzICsgU0RNQV9IX0NPTkZJRyk7CgpS ZWdhcmRzLApMdWNhcwoKPiArCQlyZWcgPSBTRE1BX0hfQ09ORklHX0NTTTsKPiArCj4gPiArCQlp ZiAoc2RtYS0+Y2xrX3JhdGlvKQo+ID4gKwkJCXJlZyB8PSBTRE1BX0hfQ09ORklHX0FDUjsKPiAr Cj4gPiArCQl3cml0ZWxfcmVsYXhlZChyZWcsIHNkbWEtPnJlZ3MgKyBTRE1BX0hfQ09ORklHKTsK PiA+ICsJfQo+IMKgCj4gPiDCoAlyZXR1cm4gcmV0Owo+IMKgfQo+IEBAIC0xODQwLDYgKzE4NDgs OSBAQCBzdGF0aWMgaW50IHNkbWFfaW5pdChzdHJ1Y3Qgc2RtYV9lbmdpbmUgKnNkbWEpCj4gPiDC oAlpZiAocmV0KQo+ID4gwqAJCWdvdG8gZGlzYWJsZV9jbGtfaXBnOwo+IMKgCj4gPiArCWlmIChj bGtfZ2V0X3JhdGUoc2RtYS0+Y2xrX2FoYikgPT0gY2xrX2dldF9yYXRlKHNkbWEtPmNsa19pcGcp KQo+ID4gKwkJc2RtYS0+Y2xrX3JhdGlvID0gMTsKPiArCj4gPiDCoAkvKiBCZSBzdXJlIFNETUEg aGFzIG5vdCBzdGFydGVkIHlldCAqLwo+ID4gwqAJd3JpdGVsX3JlbGF4ZWQoMCwgc2RtYS0+cmVn cyArIFNETUFfSF9DMFBUUik7Cj4gwqAKPiBAQCAtMTg4MCw4ICsxODkxLDEwIEBAIHN0YXRpYyBp bnQgc2RtYV9pbml0KHN0cnVjdCBzZG1hX2VuZ2luZSAqc2RtYSkKPiA+IMKgCXdyaXRlbF9yZWxh eGVkKDB4NDA1MCwgc2RtYS0+cmVncyArIFNETUFfQ0hOMEFERFIpOwo+IMKgCj4gPiDCoAkvKiBT ZXQgYml0cyBvZiBDT05GSUcgcmVnaXN0ZXIgYnV0IHdpdGggc3RhdGljIGNvbnRleHQgc3dpdGNo aW5nICovCj4gPiAtCS8qIEZJWE1FOiBDaGVjayB3aGV0aGVyIHRvIHNldCBBQ1IgYml0IGRlcGVu ZGluZyBvbiBjbG9jayByYXRpb3MgKi8KPiA+IC0Jd3JpdGVsX3JlbGF4ZWQoMCwgc2RtYS0+cmVn cyArIFNETUFfSF9DT05GSUcpOwo+ID4gKwlpZiAoc2RtYS0+Y2xrX3JhdGlvKQo+ID4gKwkJd3Jp dGVsX3JlbGF4ZWQoU0RNQV9IX0NPTkZJR19BQ1IsIHNkbWEtPnJlZ3MgKyBTRE1BX0hfQ09ORklH KTsKPiA+ICsJZWxzZQo+ID4gKwkJd3JpdGVsX3JlbGF4ZWQoMCwgc2RtYS0+cmVncyArIFNETUFf SF9DT05GSUcpOwo+IMKgCj4gPiDCoAl3cml0ZWxfcmVsYXhlZChjY2JfcGh5cywgc2RtYS0+cmVn cyArIFNETUFfSF9DMFBUUik7Cj4gwqAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1r ZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWls bWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK