From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:36990) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gr5HA-0003Bv-Kp for qemu-devel@nongnu.org; Tue, 05 Feb 2019 13:16:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gr5H8-0004Xp-PH for qemu-devel@nongnu.org; Tue, 05 Feb 2019 13:16:52 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:40600) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gr5H8-0004MA-EW for qemu-devel@nongnu.org; Tue, 05 Feb 2019 13:16:50 -0500 Received: by mail-wm1-x333.google.com with SMTP id f188so4727154wmf.5 for ; Tue, 05 Feb 2019 10:16:33 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Tue, 5 Feb 2019 19:15:12 +0100 Message-Id: <1549390526-24246-63-git-send-email-pbonzini@redhat.com> In-Reply-To: <1549390526-24246-1-git-send-email-pbonzini@redhat.com> References: <1549390526-24246-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 62/76] hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Yang Zhong From: Yang Zhong Add the new configs to default-configs/riscv*-sofmmu.mak. Signed-off-by: Yang Zhong Signed-off-by: Paolo Bonzini Reviewed-by: Alistair Francis Reviewed-by: Thomas Huth Message-Id: <20190202072456.6468-19-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini --- default-configs/riscv32-softmmu.mak | 7 +++++++ default-configs/riscv64-softmmu.mak | 7 +++++++ hw/riscv/Makefile.objs | 22 +++++++++++----------- 3 files changed, 25 insertions(+), 11 deletions(-) diff --git a/default-configs/riscv32-softmmu.mak b/default-configs/riscv32-softmmu.mak index fbfd1d4..6533716 100644 --- a/default-configs/riscv32-softmmu.mak +++ b/default-configs/riscv32-softmmu.mak @@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y CONFIG_VGA=y CONFIG_VGA_PCI=y + +CONFIG_SPIKE=y +CONFIG_HART=y +CONFIG_SIFIVE_E=y +CONFIG_SIFIVE=y +CONFIG_SIFIVE_U=y +CONFIG_RISCV_VIRT=y diff --git a/default-configs/riscv64-softmmu.mak b/default-configs/riscv64-softmmu.mak index fbfd1d4..6533716 100644 --- a/default-configs/riscv64-softmmu.mak +++ b/default-configs/riscv64-softmmu.mak @@ -12,3 +12,10 @@ CONFIG_PCI_EXPRESS_GENERIC_BRIDGE=y CONFIG_VGA=y CONFIG_VGA_PCI=y + +CONFIG_SPIKE=y +CONFIG_HART=y +CONFIG_SIFIVE_E=y +CONFIG_SIFIVE=y +CONFIG_SIFIVE_U=y +CONFIG_RISCV_VIRT=y diff --git a/hw/riscv/Makefile.objs b/hw/riscv/Makefile.objs index 1dde01d..79bfb3a 100644 --- a/hw/riscv/Makefile.objs +++ b/hw/riscv/Makefile.objs @@ -1,11 +1,11 @@ -obj-y += riscv_htif.o -obj-y += riscv_hart.o -obj-y += sifive_e.o -obj-y += sifive_clint.o -obj-y += sifive_prci.o -obj-y += sifive_plic.o -obj-y += sifive_test.o -obj-y += sifive_u.o -obj-y += sifive_uart.o -obj-y += spike.o -obj-y += virt.o +obj-$(CONFIG_SPIKE) += riscv_htif.o +obj-$(CONFIG_HART) += riscv_hart.o +obj-$(CONFIG_SIFIVE_E) += sifive_e.o +obj-$(CONFIG_SIFIVE) += sifive_clint.o +obj-$(CONFIG_SIFIVE) += sifive_prci.o +obj-$(CONFIG_SIFIVE) += sifive_plic.o +obj-$(CONFIG_SIFIVE) += sifive_test.o +obj-$(CONFIG_SIFIVE_U) += sifive_u.o +obj-$(CONFIG_SIFIVE) += sifive_uart.o +obj-$(CONFIG_SPIKE) += spike.o +obj-$(CONFIG_RISCV_VIRT) += virt.o -- 1.8.3.1