From mboxrd@z Thu Jan 1 00:00:00 1970 From: Louis Kuo Subject: [RFC PATCH V0 3/4] dt-bindings: mt8183: Added sensor interface dt-bindings Date: Thu, 21 Feb 2019 15:21:57 +0800 Message-ID: <1550733718-31702-4-git-send-email-louis.kuo@mediatek.com> References: <1550733718-31702-1-git-send-email-louis.kuo@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1550733718-31702-1-git-send-email-louis.kuo-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+glpam-linux-mediatek=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: hans.verkuil-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org, laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org, tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, mchehab-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sean.Cheng-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Rynn.Wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, holmes.chiou-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, Jerry-ch.Chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, jungo.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, sj.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, yuzhao-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, zwisler-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, Louis Kuo , christie.yu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, frederic.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org This patch adds the DT binding documentation for the sensor interface module in Mediatek SoCs. Signed-off-by: Louis Kuo --- .../devicetree/bindings/media/mediatek-seninf.txt | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt new file mode 100644 index 0000000..5c84a77 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt @@ -0,0 +1,52 @@ +* Mediatek seninf MIPI-CSI2 host driver + +Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support a widely adopted, +simple, high-speed protocol primarily intended for point-to-point image and video +transmission between cameras and host devices. + +Required properties: + - compatible: "mediatek,mt8183-seninf" + - reg: Must contain an entry for each entry in reg-names. + - reg-names: Must include the following entries: + "base_reg": seninf registers base + "rx_reg": Rx analog registers base + - interrupts: interrupt number to the cpu. + - clocks : clock name from clock manager + - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF. + It is the clocks of seninf + - port : port for camera sensor + - port reg : must be '0' for camera 0, '1' for camera 1 + - endpoint : config mipi-csi2 port setting for each camera + - data-lanes : the number of the data lane + +Example: + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183_seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11C80000 0 0x6000>; + reg-names = "base_reg", "ana_reg"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = + <&camsys CLK_CAM_SENINF>, <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = + "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + mipi_in_cam0: endpoint@0 { + reg = <0>; + data-lanes = <1 3>; + }; + }; + port@1 { + reg = <1>; + mipi_in_cam1: endpoint@0 { + reg = <1>; + data-lanes = <1 3>; + }; + }; + }; + } -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15180C43381 for ; Thu, 21 Feb 2019 07:22:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E31A821841 for ; Thu, 21 Feb 2019 07:22:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727224AbfBUHWW (ORCPT ); Thu, 21 Feb 2019 02:22:22 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:18928 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727161AbfBUHWV (ORCPT ); Thu, 21 Feb 2019 02:22:21 -0500 X-UUID: 7e65c5128a144c74a5313c31aaf071da-20190221 X-UUID: 7e65c5128a144c74a5313c31aaf071da-20190221 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 975319082; Thu, 21 Feb 2019 15:22:05 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 21 Feb 2019 15:22:03 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 21 Feb 2019 15:22:03 +0800 From: Louis Kuo To: , , , , CC: , , , , , , , , , , , , , , , Louis Kuo Subject: [RFC PATCH V0 3/4] dt-bindings: mt8183: Added sensor interface dt-bindings Date: Thu, 21 Feb 2019 15:21:57 +0800 Message-ID: <1550733718-31702-4-git-send-email-louis.kuo@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1550733718-31702-1-git-send-email-louis.kuo@mediatek.com> References: <1550733718-31702-1-git-send-email-louis.kuo@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org This patch adds the DT binding documentation for the sensor interface module in Mediatek SoCs. Signed-off-by: Louis Kuo --- .../devicetree/bindings/media/mediatek-seninf.txt | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt new file mode 100644 index 0000000..5c84a77 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt @@ -0,0 +1,52 @@ +* Mediatek seninf MIPI-CSI2 host driver + +Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support a widely adopted, +simple, high-speed protocol primarily intended for point-to-point image and video +transmission between cameras and host devices. + +Required properties: + - compatible: "mediatek,mt8183-seninf" + - reg: Must contain an entry for each entry in reg-names. + - reg-names: Must include the following entries: + "base_reg": seninf registers base + "rx_reg": Rx analog registers base + - interrupts: interrupt number to the cpu. + - clocks : clock name from clock manager + - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF. + It is the clocks of seninf + - port : port for camera sensor + - port reg : must be '0' for camera 0, '1' for camera 1 + - endpoint : config mipi-csi2 port setting for each camera + - data-lanes : the number of the data lane + +Example: + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183_seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11C80000 0 0x6000>; + reg-names = "base_reg", "ana_reg"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = + <&camsys CLK_CAM_SENINF>, <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = + "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + mipi_in_cam0: endpoint@0 { + reg = <0>; + data-lanes = <1 3>; + }; + }; + port@1 { + reg = <1>; + mipi_in_cam1: endpoint@0 { + reg = <1>; + data-lanes = <1 3>; + }; + }; + }; + } -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD8FDC43381 for ; Thu, 21 Feb 2019 07:24:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8966A2086A for ; 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Thu, 21 Feb 2019 15:22:03 +0800 From: Louis Kuo To: , , , , Subject: [RFC PATCH V0 3/4] dt-bindings: mt8183: Added sensor interface dt-bindings Date: Thu, 21 Feb 2019 15:21:57 +0800 Message-ID: <1550733718-31702-4-git-send-email-louis.kuo@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1550733718-31702-1-git-send-email-louis.kuo@mediatek.com> References: <1550733718-31702-1-git-send-email-louis.kuo@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190220_232220_676587_3F17CA88 X-CRM114-Status: GOOD ( 12.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sean.Cheng@mediatek.com, Rynn.Wu@mediatek.com, srv_heupstream@mediatek.com, holmes.chiou@mediatek.com, Jerry-ch.Chen@mediatek.com, jungo.lin@mediatek.com, sj.huang@mediatek.com, yuzhao@chromium.org, linux-mediatek@lists.infradead.org, zwisler@chromium.org, Louis Kuo , christie.yu@mediatek.com, frederic.chen@mediatek.com, linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds the DT binding documentation for the sensor interface module in Mediatek SoCs. Signed-off-by: Louis Kuo --- .../devicetree/bindings/media/mediatek-seninf.txt | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-seninf.txt diff --git a/Documentation/devicetree/bindings/media/mediatek-seninf.txt b/Documentation/devicetree/bindings/media/mediatek-seninf.txt new file mode 100644 index 0000000..5c84a77 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-seninf.txt @@ -0,0 +1,52 @@ +* Mediatek seninf MIPI-CSI2 host driver + +Seninf MIPI-CSI2 host driver is a HW camera interface controller. It support a widely adopted, +simple, high-speed protocol primarily intended for point-to-point image and video +transmission between cameras and host devices. + +Required properties: + - compatible: "mediatek,mt8183-seninf" + - reg: Must contain an entry for each entry in reg-names. + - reg-names: Must include the following entries: + "base_reg": seninf registers base + "rx_reg": Rx analog registers base + - interrupts: interrupt number to the cpu. + - clocks : clock name from clock manager + - clock-names: must be CLK_CAM_SENINF and CLK_TOP_MUX_SENINF. + It is the clocks of seninf + - port : port for camera sensor + - port reg : must be '0' for camera 0, '1' for camera 1 + - endpoint : config mipi-csi2 port setting for each camera + - data-lanes : the number of the data lane + +Example: + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183_seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11C80000 0 0x6000>; + reg-names = "base_reg", "ana_reg"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = + <&camsys CLK_CAM_SENINF>, <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = + "CLK_CAM_SENINF", "CLK_TOP_MUX_SENINF"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + mipi_in_cam0: endpoint@0 { + reg = <0>; + data-lanes = <1 3>; + }; + }; + port@1 { + reg = <1>; + mipi_in_cam1: endpoint@0 { + reg = <1>; + data-lanes = <1 3>; + }; + }; + }; + } -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel