All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4] arm: dts: Stratix10: Add QSPI node
Date: Wed, 27 Mar 2019 16:43:19 +0800	[thread overview]
Message-ID: <1553676199-27126-1-git-send-email-ley.foon.tan@intel.com> (raw)

Add QSPI device tree to Stratix 10.
Sync from Linux Stratix 10 dts.

Tested on Stratix 10 SoC devkit.
SOCFPGA_STRATIX10 # sf probe 0:0
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

---
v3->v4:
- Add qspi node to dtsi based on alphabetical order
- Add spi-tx-bus-width and spi-rx-bus-width

v2->v3:
- Change flash compatible to "jedec,spi-nor"
- Change spi-max-frequency to 100MHz
---
 arch/arm/dts/socfpga_stratix10.dtsi      | 15 +++++++++++++++
 arch/arm/dts/socfpga_stratix10_socdk.dts | 23 +++++++++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi
index ee93725d648..fde76774047 100644
--- a/arch/arm/dts/socfpga_stratix10.dtsi
+++ b/arch/arm/dts/socfpga_stratix10.dtsi
@@ -237,6 +237,21 @@
 			reg = <0xffe00000 0x100000>;
 		};
 
+		qspi: spi at ff8d2000 {
+			compatible = "cdns,qspi-nor";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xff8d2000 0x100>,
+			      <0xff900000 0x100000>;
+			interrupts = <0 3 4>;
+			cdns,fifo-depth = <128>;
+			cdns,fifo-width = <4>;
+			cdns,trigger-address = <0x00000000>;
+			bus-num = <0>;
+			status = "disabled";
+			u-boot,dm-pre-reloc;
+		};
+
 		rst: rstmgr at ffd11000 {
 			#reset-cells = <1>;
 			compatible = "altr,rst-mgr";
diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts
index c59b77d8298..438b43fef6b 100644
--- a/arch/arm/dts/socfpga_stratix10_socdk.dts
+++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
@@ -10,6 +10,7 @@
 
 	aliases {
 		serial0 = &uart0;
+		spi0 = &qspi;
 	};
 
 	chosen {
@@ -87,6 +88,28 @@
 	smplsel = <0>;
 };
 
+&qspi {
+	status = "okay";
+
+	flash at 0 {
+		u-boot,dm-pre-reloc;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;      /* chip select */
+		spi-max-frequency = <100000000>;
+
+		page-size = <256>;
+		block-size = <16>; /* 2^16, 64KB */
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
+		spi-tx-bus-width = <4>;
+		spi-rx-bus-width = <4>;
+	};
+};
+
 &uart0 {
 	status = "okay";
 };
-- 
2.19.0

             reply	other threads:[~2019-03-27  8:43 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-27  8:43 Ley Foon Tan [this message]
2019-03-27 11:31 ` [U-Boot] [PATCH v4] arm: dts: Stratix10: Add QSPI node Simon Goldschmidt
2019-03-29  6:39   ` Ley Foon Tan
2019-03-29  6:57     ` Simon Goldschmidt
2019-03-29  8:04       ` Ley Foon Tan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1553676199-27126-1-git-send-email-ley.foon.tan@intel.com \
    --to=ley.foon.tan@intel.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.