From: Liu Xiang <liu.xiang6@zte.com.cn>
To: linux-mtd@lists.infradead.org
Cc: bbrezillon@kernel.org, richard@nod.at,
Liu Xiang <liu.xiang6@zte.com.cn>,
linux-kernel@vger.kernel.org, marek.vasut@gmail.com,
liuxiang_1999@126.com, computersforpeace@gmail.com,
dwmw2@infradead.org
Subject: [PATCH v3] mtd: spi-nor: fix nor->addr_width when its value configured from SFDP does not match the actual width
Date: Sun, 31 Mar 2019 15:42:37 +0800 [thread overview]
Message-ID: <1554018157-10860-1-git-send-email-liu.xiang6@zte.com.cn> (raw)
Some is25lp256 get BFPT_DWORD1_ADDRESS_BYTES_3_ONLY from BFPT table for
address width. But in actual fact the flash can support 4-byte address.
So we should fix it.
Suggested-by: Boris Brezillon <bbrezillon@kernel.org>
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Liu Xiang <liu.xiang6@zte.com.cn>
---
Changes in v3:
add a fixup for is25lp256 to solve the address width problem.
drivers/mtd/spi-nor/spi-nor.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6e13bbd..d252a66 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1682,6 +1682,28 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
.flags = SPI_NOR_NO_FR | SPI_S3AN,
static int
+is25lp256_post_bfpt_fixups(struct spi_nor *nor,
+ const struct sfdp_parameter_header *bfpt_header,
+ const struct sfdp_bfpt *bfpt,
+ struct spi_nor_flash_parameter *params)
+{
+ /*
+ * IS25LP256 supports 4B opcodes.
+ * Unfortunately, some devices get BFPT_DWORD1_ADDRESS_BYTES_3_ONLY
+ * from BFPT table for address width. We should fix it.
+ */
+ if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
+ BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
+ nor->addr_width = 4;
+
+ return 0;
+}
+
+static struct spi_nor_fixups is25lp256_fixups = {
+ .post_bfpt = is25lp256_post_bfpt_fixups,
+};
+
+static int
mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
const struct sfdp_parameter_header *bfpt_header,
const struct sfdp_bfpt *bfpt,
@@ -1818,7 +1840,8 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor)
SECT_4K | SPI_NOR_DUAL_READ) },
{ "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
- SPI_NOR_4B_OPCODES) },
+ SPI_NOR_4B_OPCODES)
+ .fixups = &is25lp256_fixups },
{ "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128,
--
1.9.1
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next reply other threads:[~2019-03-31 7:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-31 7:42 Liu Xiang [this message]
2019-06-22 11:49 ` [PATCH v3] mtd: spi-nor: fix nor->addr_width when its value configured from SFDP does not match the actual width Tudor.Ambarus
2019-06-22 11:49 ` Tudor.Ambarus
2019-06-24 10:59 ` Vignesh Raghavendra
2019-06-24 10:59 ` Vignesh Raghavendra
2019-06-24 14:38 ` Liu Xiang
2019-06-24 14:38 ` Liu Xiang
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