From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753282AbbL2Nva (ORCPT ); Tue, 29 Dec 2015 08:51:30 -0500 Received: from mout.kundenserver.de ([212.227.17.24]:53913 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752663AbbL2Nv1 (ORCPT ); Tue, 29 Dec 2015 08:51:27 -0500 From: Arnd Bergmann To: Rongrong Zou Cc: catalin.marinas@arm.com, will.deacon@arm.com, benh@kernel.crashing.org, lijianhua@huawei.com, lixiancai@huawei.com, linuxarm@huawei.com, linux-kernel@vger.kernel.org, minyard@acm.org, gregkh@linuxfoundation.org Subject: Re: [PATCH v1 2/3] ARM64 LPC: LPC driver implementation Date: Tue, 29 Dec 2015 14:51:01 +0100 Message-ID: <1557466.ZWCBjbTVg8@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <1451396032-23708-3-git-send-email-zourongrong@gmail.com> References: <1451396032-23708-1-git-send-email-zourongrong@gmail.com> <1451396032-23708-3-git-send-email-zourongrong@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:ZHgNiKl/0fCrEeL2Dicgvfmp/DYV9jN432JI1sYU1olmt2I5lM9 ZdRU6bulwdhwguJg+lesVssCk4mZd93IoSfl2mth148b7gqeA51kw5HwdZaSKaA5jP//n4W 9IHTM4vgmaDrjDTx6F9vRBdsDhJ8VxgX5uBFksneqCiCN0OGmL42LBSHbEKOwlu9WrsK4xa 2bPzBpGlvV027Fe8g7JEQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:lsJCNBTg3ds=:xUdF6bDSFjaJIuQZzIFtlU RvOly5os+G+5Y06sYh4bsyJpvAz/WqQnKquI2VkS10onwte2bGEZneQV047RZjj5X7sDPurVO qntGhbNK/WjZxvu5aTG4m3WOMTvxNvKldcMSQz1w8R66vtt5g5leklz8jIKNs+WBEWGrly+QS wURJAl28ldWvfkjR5IyKQgnxDdb82fRtO5qUc1OuSU4cVAwJqzTxgmIGOCYycsm+FyTsG7kFb vj2lzqrXSu8zFJbdvbKWaxMm/Fi2//xZ7/RPnbVMiMVWPt5py5tmsTmw2wMO3Rrfi7zPXiHlf /CHNO0qWmPa2M5KfGXzC3ukQc7ED1c9y6MGE2omwuAV0OlCtbUflmqKohu588HF8dxVAFTjPn DxskZOlYuQPQeEdXPcOC08RK6tY5r6G+rNQpxEsBNKFlMOTs/qR1OVSBbzYO3uw3X1d2GCAw6 s4hBva9ZkDfFZKi+z4gVd450ntf6yeojy13sLnmpzOMJSteCaAIQFssm4Fxv8pRi4MHWxCUEp B3FlusSM2tz7vuUUdSNl7YrRJ8Y1I1+ZweKAm2Ojd/GAkLjo2UXAwbXdZzjWwJZirWdKp1Sz/ 6VmtIwvKPLqk4zH+vI1r4i4EQmNDjgufGGaEA7+ek+CE1MXOyAzcnf6rWo/KYT6phduV9bXFq o+9WGYD2rXmJBaUuv+R8LSsKQTuG05jpQnWq9Kcm5eB90XvMmzXi7Noh6s6wlymi0WFP8vrGb WxC8HNr1bJAmomY9 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 29 December 2015 21:33:51 Rongrong Zou wrote: > We only implement io cycles here, we hook the lpc_io_write_byte > and lpc_io_read_byte to inb/outb. So the drivers(ipmi/uart) which access > the legacy ISA I/O port need no modification. > > The low pin count specification is at > http://www.intel.com/design/chipsets/industry/lpc.htm > > Signed-off-by: Rongrong Zou I'm slightly confused here: I thought this driver was hisilicon specific. Is the MMIO register layout that is used in this hardware actually standardized in a way that the driver also works for all other implementations? > + > +static struct lpc_dev *lpc_dev; > + > +int lpc_master_write(unsigned int slv_access_mode, unsigned int cycle_type, > + unsigned int addr, unsigned char *buf, unsigned int len) > +{ Please make all function definitions 'static' so we don't accidentally get other users that bypass the proper interface. Arnd