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From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 05/14] arm: socfpga: Move Stratix10 and Agilex system manager common code
Date: Fri, 10 May 2019 13:54:39 +0800	[thread overview]
Message-ID: <1557467688-73706-6-git-send-email-ley.foon.tan@intel.com> (raw)
In-Reply-To: <1557467688-73706-1-git-send-email-ley.foon.tan@intel.com>

Move Stratix10 and Agilex system manager common code to system_manager.h.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 .../include/mach/system_manager.h             | 47 +++++++++++++++++++
 .../include/mach/system_manager_s10.h         | 46 ------------------
 2 files changed, 47 insertions(+), 46 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h
index 7e76df74b7..171b79e238 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -8,6 +8,53 @@
 
 #if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
 #include <asm/arch/system_manager_s10.h>
+
+void sysmgr_pinmux_init(void);
+void populate_sysmgr_fpgaintf_module(void);
+void populate_sysmgr_pinmux(void);
+void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len);
+void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len);
+void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len);
+void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
+
+#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX	BIT(0)
+#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO	BIT(1)
+#define SYSMGR_ECC_OCRAM_EN	BIT(0)
+#define SYSMGR_ECC_OCRAM_SERR	BIT(3)
+#define SYSMGR_ECC_OCRAM_DERR	BIT(4)
+#define SYSMGR_FPGAINTF_USEFPGA	0x1
+
+#define SYSMGR_FPGAINTF_NAND	BIT(4)
+#define SYSMGR_FPGAINTF_SDMMC	BIT(8)
+#define SYSMGR_FPGAINTF_SPIM0	BIT(16)
+#define SYSMGR_FPGAINTF_SPIM1	BIT(24)
+#define SYSMGR_FPGAINTF_EMAC0	BIT(0)
+#define SYSMGR_FPGAINTF_EMAC1	BIT(8)
+#define SYSMGR_FPGAINTF_EMAC2	BIT(16)
+
+#define SYSMGR_SDMMC_SMPLSEL_SHIFT	4
+#define SYSMGR_SDMMC_DRVSEL_SHIFT	0
+
+/* EMAC Group Bit definitions */
+#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII	0x0
+#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII		0x1
+#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII		0x2
+
+#define SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB			0
+#define SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB			2
+#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK			0x3
+
+#define SYSMGR_NOC_H2F_MSK		0x00000001
+#define SYSMGR_NOC_LWH2F_MSK		0x00000010
+#define SYSMGR_HMC_CLK_STATUS_MSK	0x00000001
+
+#define SYSMGR_DMA_IRQ_NS		0xFF000000
+#define SYSMGR_DMA_MGR_NS		0x00010000
+
+#define SYSMGR_DMAPERIPH_ALL_NS		0xFFFFFFFF
+
+#define SYSMGR_WDDBG_PAUSE_ALL_CPU	0x0F0F0F0F
+
 #else
 #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX	BIT(0)
 #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO	BIT(1)
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h
index 297f9e1999..e80cb7aa7b 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h
@@ -7,14 +7,6 @@
 #ifndef	_SYSTEM_MANAGER_S10_
 #define	_SYSTEM_MANAGER_S10_
 
-void sysmgr_pinmux_init(void);
-void populate_sysmgr_fpgaintf_module(void);
-void populate_sysmgr_pinmux(void);
-void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
-
 struct socfpga_system_manager {
 	/* System Manager Module */
 	u32	siliconid1;			/* 0x00 */
@@ -135,42 +127,4 @@ struct socfpga_system_manager {
 
 };
 
-#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX	BIT(0)
-#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO	BIT(1)
-#define SYSMGR_ECC_OCRAM_EN	BIT(0)
-#define SYSMGR_ECC_OCRAM_SERR	BIT(3)
-#define SYSMGR_ECC_OCRAM_DERR	BIT(4)
-#define SYSMGR_FPGAINTF_USEFPGA	0x1
-
-#define SYSMGR_FPGAINTF_NAND	BIT(4)
-#define SYSMGR_FPGAINTF_SDMMC	BIT(8)
-#define SYSMGR_FPGAINTF_SPIM0	BIT(16)
-#define SYSMGR_FPGAINTF_SPIM1	BIT(24)
-#define SYSMGR_FPGAINTF_EMAC0	BIT(0)
-#define SYSMGR_FPGAINTF_EMAC1	BIT(8)
-#define SYSMGR_FPGAINTF_EMAC2	BIT(16)
-
-#define SYSMGR_SDMMC_SMPLSEL_SHIFT	4
-#define SYSMGR_SDMMC_DRVSEL_SHIFT	0
-
-/* EMAC Group Bit definitions */
-#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII	0x0
-#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII		0x1
-#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII		0x2
-
-#define SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB			0
-#define SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB			2
-#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK			0x3
-
-#define SYSMGR_NOC_H2F_MSK		0x00000001
-#define SYSMGR_NOC_LWH2F_MSK		0x00000010
-#define SYSMGR_HMC_CLK_STATUS_MSK	0x00000001
-
-#define SYSMGR_DMA_IRQ_NS		0xFF000000
-#define SYSMGR_DMA_MGR_NS		0x00010000
-
-#define SYSMGR_DMAPERIPH_ALL_NS		0xFFFFFFFF
-
-#define SYSMGR_WDDBG_PAUSE_ALL_CPU	0x0F0F0F0F
-
 #endif /* _SYSTEM_MANAGER_S10_ */
-- 
2.19.0

  parent reply	other threads:[~2019-05-10  5:54 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-10  5:54 [U-Boot] [PATCH 00/14] Add Intel Agilex SoC support Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 01/14] arm: socfpga: agilex: Add base address for Intel Agilex SoC Ley Foon Tan
2019-05-10 14:59   ` Dinh Nguyen
2019-05-10 18:10     ` Simon Goldschmidt
2019-05-14  5:53       ` Ley Foon Tan
2019-05-14  8:36         ` Simon Goldschmidt
2019-05-14  5:50     ` Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 02/14] arm: socfpga: Move firewall code to firewall file Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 03/14] arm: socfpga: Move Stratix10 and Agilex reset manager common code Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 04/14] arm: socfpga: agilex: Add reset manager support Ley Foon Tan
2019-05-10 15:26   ` Dinh Nguyen
2019-05-14  5:54     ` Ley Foon Tan
2019-05-10 18:27   ` Simon Goldschmidt
2019-05-14  6:07     ` Ley Foon Tan
2019-05-14  8:35       ` Simon Goldschmidt
2019-05-14 13:44         ` Ley Foon Tan
2019-05-10  5:54 ` Ley Foon Tan [this message]
2019-05-10 11:59   ` [U-Boot] [PATCH 05/14] arm: socfpga: Move Stratix10 and Agilex system manager common code Marek Vasut
2019-05-14  5:47     ` Ley Foon Tan
2019-05-14 12:00       ` Marek Vasut
2019-05-14 13:52         ` Ley Foon Tan
2019-05-14 13:55           ` Marek Vasut
2019-05-14 13:56             ` Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 06/14] arm: socfpga: agilex: Add system manager support Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 07/14] arm: socfpga: agilex: Add clock " Ley Foon Tan
2019-05-10 11:59   ` Marek Vasut
2019-05-14  5:42     ` Ley Foon Tan
2019-05-14  8:40       ` Simon Goldschmidt
2019-05-10  5:54 ` [U-Boot] [PATCH 08/14] arm: socfpga: agilex: Add CCU support for Agilex Ley Foon Tan
2019-05-10 18:40   ` Simon Goldschmidt
2019-05-14  5:40     ` Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 09/14] ddr: altera: Restructure Stratix 10 SDRAM driver Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 10/14] ddr: altera: agilex: Add SDRAM driver for Agilex Ley Foon Tan
2019-05-10 12:01   ` Marek Vasut
2019-05-14  5:39     ` Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 11/14] board: intel: agilex: Add socdk board support for Intel Agilex SoC Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 12/14] arm: socfpga: agilex: Add SPL for " Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 13/14] arm: dts: agilex: Add base dtsi and devkit dts Ley Foon Tan
2019-05-10 12:02   ` Marek Vasut
2019-05-14  5:38     ` Ley Foon Tan
2019-05-10  5:54 ` [U-Boot] [PATCH 14/14] arm: socfpga: agilex: Enable Agilex SoC build Ley Foon Tan

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