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From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com
Subject: [Qemu-devel] [PULL 10/10] mips: Decide to map PAGE_EXEC in map_address
Date: Sun, 19 May 2019 12:52:24 +0200	[thread overview]
Message-ID: <1558263144-8776-11-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1558263144-8776-1-git-send-email-aleksandar.markovic@rt-rk.com>

From: Jakub Jermář <jakub.jermar@kernkonzept.com>

This commit addresses QEMU Bug #1825311:

  mips_cpu_handle_mmu_fault renders all accessed pages executable

It allows finer-grained control over whether the accessed page should
be executable by moving the decision to the underlying map_address
function, which has more information for this.

As a result, pages that have the XI bit set in the TLB and are accessed
for read/write, don't suddenly end up being executable.

Fixes: https://bugs.launchpad.net/qemu/+bug/1825311
Fixes: 2fb58b73746e ('target-mips: add RI and XI fields to TLB entry')

Signed-off-by: Jakub Jermář <jakub.jermar@kernkonzept.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190517123533.868479-1-jakub.jermar@kernkonzept.com>
---
 target/mips/helper.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/target/mips/helper.c b/target/mips/helper.c
index 9799f2e..68e44df 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -43,7 +43,7 @@ int no_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
                         target_ulong address, int rw, int access_type)
 {
     *physical = address;
-    *prot = PAGE_READ | PAGE_WRITE;
+    *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
     return TLBRET_MATCH;
 }
 
@@ -61,7 +61,7 @@ int fixed_mmu_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
     else
         *physical = address;
 
-    *prot = PAGE_READ | PAGE_WRITE;
+    *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
     return TLBRET_MATCH;
 }
 
@@ -101,6 +101,9 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
                 *prot = PAGE_READ;
                 if (n ? tlb->D1 : tlb->D0)
                     *prot |= PAGE_WRITE;
+                if (!(n ? tlb->XI1 : tlb->XI0)) {
+                    *prot |= PAGE_EXEC;
+                }
                 return TLBRET_MATCH;
             }
             return TLBRET_DIRTY;
@@ -182,7 +185,7 @@ static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical,
     } else {
         /* The segment is unmapped */
         *physical = physical_base | (real_address & segmask);
-        *prot = PAGE_READ | PAGE_WRITE;
+        *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
         return TLBRET_MATCH;
     }
 }
@@ -907,7 +910,7 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     }
     if (ret == TLBRET_MATCH) {
         tlb_set_page(cs, address & TARGET_PAGE_MASK,
-                     physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
+                     physical & TARGET_PAGE_MASK, prot,
                      mmu_idx, TARGET_PAGE_SIZE);
         return true;
     }
@@ -927,7 +930,7 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                                        access_type, mips_access_type, mmu_idx);
             if (ret == TLBRET_MATCH) {
                 tlb_set_page(cs, address & TARGET_PAGE_MASK,
-                             physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
+                             physical & TARGET_PAGE_MASK, prot,
                              mmu_idx, TARGET_PAGE_SIZE);
                 return true;
             }
-- 
2.7.4



  parent reply	other threads:[~2019-05-19 10:55 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-19 10:52 [Qemu-devel] [PULL 00/10] MIPS queue for May 19th, 2019 Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 01/10] target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on hardware Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 02/10] target/mips: Make the results of MOD_<U|S>.<B|H|W|D> " Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 03/10] target/mips: Fix MSA instructions LD.<B|H|W|D> on big endian host Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 04/10] target/mips: Fix MSA instructions ST.<B|H|W|D> " Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 05/10] target/mips: Refactor and fix COPY_S.<B|H|W|D> instructions Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 06/10] target/mips: Refactor and fix COPY_U.<B|H|W> instructions Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 07/10] target/mips: Refactor and fix INSERT.<B|H|W|D> instructions Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 08/10] hw/mips: Use object_initialize() on MIPSCPSState Aleksandar Markovic
2019-05-19 10:52 ` [Qemu-devel] [PULL 09/10] hw/mips: Use object_initialize_child for correct reference counting Aleksandar Markovic
2019-05-19 10:52 ` Aleksandar Markovic [this message]
2019-05-19 11:33 ` [Qemu-devel] [PULL 00/10] MIPS queue for May 19th, 2019 Jakub Jermar
2019-05-19 12:00   ` Aleksandar Markovic
2019-05-19 14:46     ` Jakub Jermar
2019-05-19 15:10       ` Philippe Mathieu-Daudé
2019-05-19 15:16       ` Aleksandar Markovic
2019-05-19 16:03         ` Jakub Jermar
2019-05-20 12:11 ` Peter Maydell
2019-05-20 12:35   ` Aleksandar Markovic
2019-05-20 17:29     ` Philippe Mathieu-Daudé
2019-05-20 19:09       ` Aleksandar Markovic

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