From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E71D0C282CE for ; Sat, 25 May 2019 11:37:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A64612175B for ; Sat, 25 May 2019 11:37:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=xilinx.onmicrosoft.com header.i=@xilinx.onmicrosoft.com header.b="imAFbrIT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726830AbfEYLhn (ORCPT ); Sat, 25 May 2019 07:37:43 -0400 Received: from mail-eopbgr760078.outbound.protection.outlook.com ([40.107.76.78]:62784 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726723AbfEYLhm (ORCPT ); Sat, 25 May 2019 07:37:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector1-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Fpg4Njla/xBdpRsCM3B/g0kGnZsxEycXpWDuC7/E0Wk=; b=imAFbrITMxOx3g8rknPox5EKb2fC1AY0dMwRed3BYDlYRvM54q/K0WJgONwCItkPsAmDegEu5injYzHo6dysHg26zo5I2hkQerD/9TmcgBoMX0qgWtUxu9tQfRso+W1BGPhVePJKks2J1LKWKlvPKx0q97/6WC+7P/57E/M7qHU= Received: from BL0PR02CA0042.namprd02.prod.outlook.com (2603:10b6:207:3d::19) by CY4PR02MB2680.namprd02.prod.outlook.com (2603:10b6:903:120::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1922.18; Sat, 25 May 2019 11:37:37 +0000 Received: from SN1NAM02FT064.eop-nam02.prod.protection.outlook.com (2a01:111:f400:7e44::204) by BL0PR02CA0042.outlook.office365.com (2603:10b6:207:3d::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.1922.17 via Frontend Transport; Sat, 25 May 2019 11:37:36 +0000 Authentication-Results: spf=pass (sender IP is 149.199.80.198) smtp.mailfrom=xilinx.com; arndb.de; dkim=none (message not signed) header.d=none;arndb.de; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.80.198 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.80.198; helo=xir-pvapexch02.xlnx.xilinx.com; Received: from xir-pvapexch02.xlnx.xilinx.com (149.199.80.198) by SN1NAM02FT064.mail.protection.outlook.com (10.152.72.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.1922.16 via Frontend Transport; Sat, 25 May 2019 11:37:35 +0000 Received: from xir-pvapexch01.xlnx.xilinx.com (172.21.17.15) by xir-pvapexch02.xlnx.xilinx.com (172.21.17.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1531.3; Sat, 25 May 2019 12:37:34 +0100 Received: from smtp.xilinx.com (172.21.105.198) by xir-pvapexch01.xlnx.xilinx.com (172.21.17.15) with Microsoft SMTP Server id 15.1.1531.3 via Frontend Transport; Sat, 25 May 2019 12:37:34 +0100 Envelope-to: arnd@arndb.de, gregkh@linuxfoundation.org, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dragan.cvetic@xilinx.com, derek.kiernan@xilinx.com Received: from [149.199.110.15] (port=57194 helo=xirdraganc40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1hUUzW-00058U-Mv; Sat, 25 May 2019 12:37:34 +0100 From: Dragan Cvetic To: , , , , , , CC: , Dragan Cvetic , Derek Kiernan Subject: [PATCH V4 06/12] misc: xilinx_sdfec: Add ability to configure turbo Date: Sat, 25 May 2019 12:37:19 +0100 Message-ID: <1558784245-108751-7-git-send-email-dragan.cvetic@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> References: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.80.198;IPV:CAL;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(396003)(39860400002)(376002)(136003)(346002)(2980300002)(189003)(199004)(2201001)(47776003)(356004)(7636002)(126002)(6666004)(71366001)(2906002)(186003)(5660300002)(478600001)(486006)(14444005)(28376004)(11346002)(305945005)(48376002)(60926002)(446003)(426003)(44832011)(26826003)(336012)(956004)(50466002)(2616005)(476003)(70206006)(9786002)(107886003)(76130400001)(26005)(70586007)(246002)(50226002)(4326008)(106002)(8936002)(36756003)(51416003)(54906003)(8676002)(16586007)(76176011)(316002)(7696005)(36906005)(110136005)(102446001)(461764006);DIR:OUT;SFP:1101;SCL:1;SRVR:CY4PR02MB2680;H:xir-pvapexch02.xlnx.xilinx.com;FPR:;SPF:Pass;LANG:en;PTR:unknown-80-198.xilinx.com;MX:1;A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c2ba9916-6613-4430-747c-08d6e1056282 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(5600148)(711020)(4605104)(4709054)(1401327)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328);SRVR:CY4PR02MB2680; X-MS-TrafficTypeDiagnostic: CY4PR02MB2680: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; X-Forefront-PRVS: 0048BCF4DA X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: iVFLYOF1nfkApwVJ3YcQlSWL0U3UgkTzp0EAsRt4ChadwFc8gj7julO/ZfvginCyQxgCMa36fmLSta4Atkd33HX8w4CobU+KXBvUmN5dVPfhRtQcRRMphiWg6TDv0/sqgnyAojCBSP+NUJJ0SgejDa5M8w3Asd0S7QqLLTseig6UBwAGOP5n/bQtrcJSx7SuGcRXPHzLM40dmVQ9SaYQfhLiZl9ZKX6usNoREhCHYjXph/85KsIWzhmm+bF58kw2AiLxJsnDAjqYF2Ay4SUx9u8HK3Ka1cJB3doEc++VpAur5Mz04fqJs242UI0HTfNN4Ti6LVvgAYrPrONQTM29ri44NCoWtTI6GcImkekajZxtOehy1lRDI9NWzToizZ4JFPsiQiF7mDtjptU0DpfTYyGSG1o74GKDL3ccy8hOOIw= X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2019 11:37:35.9545 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c2ba9916-6613-4430-747c-08d6e1056282 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.80.198];Helo=[xir-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR02MB2680 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org mode Add the capability to configure and retrieve turbo mode via the ioctls XSDFEC_SET_TURBO and XSDFEC_GET_TURBO. Tested-by: Dragan Cvetic Signed-off-by: Derek Kiernan Signed-off-by: Dragan Cvetic --- drivers/misc/xilinx_sdfec.c | 61 ++++++++++++++++++++++++++++++++++ include/uapi/misc/xilinx_sdfec.h | 71 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 132 insertions(+) diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c index c19df6b..1f02109 100644 --- a/drivers/misc/xilinx_sdfec.c +++ b/drivers/misc/xilinx_sdfec.c @@ -103,6 +103,12 @@ static atomic_t xsdfec_ndevs = ATOMIC_INIT(0); /* BYPASS Register */ #define XSDFEC_BYPASS_ADDR (0x3C) +/* Turbo Code Register */ +#define XSDFEC_TURBO_ADDR (0x100) +#define XSDFEC_TURBO_SCALE_MASK (0xFFF) +#define XSDFEC_TURBO_SCALE_BIT_POS (8) +#define XSDFEC_TURBO_SCALE_MAX (15) + /** * struct xsdfec_clks - For managing SD-FEC clocks * @core_clk: Main processing clock for core @@ -217,6 +223,55 @@ static int xsdfec_dev_release(struct inode *iptr, struct file *fptr) return 0; } +static int xsdfec_set_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + struct xsdfec_turbo turbo; + int err; + u32 turbo_write; + + err = copy_from_user(&turbo, arg, sizeof(turbo)); + if (err) + return -EFAULT; + + if (turbo.alg >= XSDFEC_TURBO_ALG_MAX) + return -EINVAL; + + if (turbo.scale > XSDFEC_TURBO_SCALE_MAX) + return -EINVAL; + + /* Check to see what device tree says about the FEC codes */ + if (xsdfec->config.code == XSDFEC_LDPC_CODE) + return -EIO; + + turbo_write = ((turbo.scale & XSDFEC_TURBO_SCALE_MASK) + << XSDFEC_TURBO_SCALE_BIT_POS) | + turbo.alg; + xsdfec_regwrite(xsdfec, XSDFEC_TURBO_ADDR, turbo_write); + return err; +} + +static int xsdfec_get_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + u32 reg_value; + struct xsdfec_turbo turbo_params; + int err; + + if (xsdfec->config.code == XSDFEC_LDPC_CODE) + return -EIO; + + reg_value = xsdfec_regread(xsdfec, XSDFEC_TURBO_ADDR); + + turbo_params.scale = (reg_value & XSDFEC_TURBO_SCALE_MASK) >> + XSDFEC_TURBO_SCALE_BIT_POS; + turbo_params.alg = reg_value & 0x1; + + err = copy_to_user(arg, &turbo_params, sizeof(turbo_params)); + if (err) + err = -EFAULT; + + return err; +} + static u32 xsdfec_translate_axis_width_cfg_val(enum xsdfec_axis_width axis_width_cfg) { @@ -302,6 +357,12 @@ static long xsdfec_dev_ioctl(struct file *fptr, unsigned int cmd, } switch (cmd) { + case XSDFEC_SET_TURBO: + rval = xsdfec_set_turbo(xsdfec, arg); + break; + case XSDFEC_GET_TURBO: + rval = xsdfec_get_turbo(xsdfec, arg); + break; default: /* Should not get here */ dev_warn(xsdfec->dev, "Undefined SDFEC IOCTL"); diff --git a/include/uapi/misc/xilinx_sdfec.h b/include/uapi/misc/xilinx_sdfec.h index 15647ef..756d788 100644 --- a/include/uapi/misc/xilinx_sdfec.h +++ b/include/uapi/misc/xilinx_sdfec.h @@ -41,6 +41,22 @@ enum xsdfec_order { }; /** + * enum xsdfec_turbo_alg - Turbo Algorithm Type. + * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When + * scaling is set to this is equivalent to the Max Log-Map + * algorithm. + * @XSDFEC_MAX_STAR: Log-Map algorithm. + * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms. + * + * This enum specifies which Turbo Decode algorithm is in use. + */ +enum xsdfec_turbo_alg { + XSDFEC_MAX_SCALE = 0, + XSDFEC_MAX_STAR, + XSDFEC_TURBO_ALG_MAX, +}; + +/** * enum xsdfec_state - State. * @XSDFEC_INIT: Driver is initialized. * @XSDFEC_STARTED: Driver is started. @@ -98,6 +114,33 @@ enum xsdfec_axis_word_include { }; /** + * struct xsdfec_turbo - User data for Turbo codes. + * @alg: Specifies which Turbo decode algorithm to use + * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm + * has been selected + * + * Turbo code structure to communicate parameters to XSDFEC driver. + */ +struct xsdfec_turbo { + enum xsdfec_turbo_alg alg; + __u8 scale; +}; + +/** + * struct xsdfec_status - Status of SD-FEC core. + * @fec_id: ID of SD-FEC instance. ID is limited to the number of active + * SD-FEC's in the FPGA and is related to the driver instance + * Minor number. + * @state: State of the SD-FEC core + * @activity: Describes if the SD-FEC instance is Active + */ +struct xsdfec_status { + __s32 fec_id; + enum xsdfec_state state; + __s8 activity; +}; + +/** * struct xsdfec_irq - Enabling or Disabling Interrupts. * @enable_isr: If true enables the ISR * @enable_ecc_isr: If true enables the ECC ISR @@ -139,4 +182,32 @@ struct xsdfec_config { * XSDFEC IOCTL List */ #define XSDFEC_MAGIC 'f' +/** + * DOC: XSDFEC_SET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the Turbo decode + * settings for the SD-FEC core + * + * @Description + * + * ioctl that sets the SD-FEC Turbo parameter values + * + * This can only be used when the driver is in the XSDFEC_STOPPED state + */ +#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo) +/** + * DOC: XSDFEC_GET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the current Turbo + * decode settings of the SD-FEC Block + * + * @Description + * + * ioctl that returns SD-FEC turbo param values + */ +#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo) #endif /* __XILINX_SDFEC_H__ */ -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dragan Cvetic Subject: [PATCH V4 06/12] misc: xilinx_sdfec: Add ability to configure turbo Date: Sat, 25 May 2019 12:37:19 +0100 Message-ID: <1558784245-108751-7-git-send-email-dragan.cvetic@xilinx.com> References: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> Sender: linux-kernel-owner@vger.kernel.org To: arnd@arndb.de, gregkh@linuxfoundation.org, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Dragan Cvetic , Derek Kiernan List-Id: devicetree@vger.kernel.org mode Add the capability to configure and retrieve turbo mode via the ioctls XSDFEC_SET_TURBO and XSDFEC_GET_TURBO. Tested-by: Dragan Cvetic Signed-off-by: Derek Kiernan Signed-off-by: Dragan Cvetic --- drivers/misc/xilinx_sdfec.c | 61 ++++++++++++++++++++++++++++++++++ include/uapi/misc/xilinx_sdfec.h | 71 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 132 insertions(+) diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c index c19df6b..1f02109 100644 --- a/drivers/misc/xilinx_sdfec.c +++ b/drivers/misc/xilinx_sdfec.c @@ -103,6 +103,12 @@ static atomic_t xsdfec_ndevs = ATOMIC_INIT(0); /* BYPASS Register */ #define XSDFEC_BYPASS_ADDR (0x3C) +/* Turbo Code Register */ +#define XSDFEC_TURBO_ADDR (0x100) +#define XSDFEC_TURBO_SCALE_MASK (0xFFF) +#define XSDFEC_TURBO_SCALE_BIT_POS (8) +#define XSDFEC_TURBO_SCALE_MAX (15) + /** * struct xsdfec_clks - For managing SD-FEC clocks * @core_clk: Main processing clock for core @@ -217,6 +223,55 @@ static int xsdfec_dev_release(struct inode *iptr, struct file *fptr) return 0; } +static int xsdfec_set_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + struct xsdfec_turbo turbo; + int err; + u32 turbo_write; + + err = copy_from_user(&turbo, arg, sizeof(turbo)); + if (err) + return -EFAULT; + + if (turbo.alg >= XSDFEC_TURBO_ALG_MAX) + return -EINVAL; + + if (turbo.scale > XSDFEC_TURBO_SCALE_MAX) + return -EINVAL; + + /* Check to see what device tree says about the FEC codes */ + if (xsdfec->config.code == XSDFEC_LDPC_CODE) + return -EIO; + + turbo_write = ((turbo.scale & XSDFEC_TURBO_SCALE_MASK) + << XSDFEC_TURBO_SCALE_BIT_POS) | + turbo.alg; + xsdfec_regwrite(xsdfec, XSDFEC_TURBO_ADDR, turbo_write); + return err; +} + +static int xsdfec_get_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + u32 reg_value; + struct xsdfec_turbo turbo_params; + int err; + + if (xsdfec->config.code == XSDFEC_LDPC_CODE) + return -EIO; + + reg_value = xsdfec_regread(xsdfec, XSDFEC_TURBO_ADDR); + + turbo_params.scale = (reg_value & XSDFEC_TURBO_SCALE_MASK) >> + XSDFEC_TURBO_SCALE_BIT_POS; + turbo_params.alg = reg_value & 0x1; + + err = copy_to_user(arg, &turbo_params, sizeof(turbo_params)); + if (err) + err = -EFAULT; + + return err; +} + static u32 xsdfec_translate_axis_width_cfg_val(enum xsdfec_axis_width axis_width_cfg) { @@ -302,6 +357,12 @@ static long xsdfec_dev_ioctl(struct file *fptr, unsigned int cmd, } switch (cmd) { + case XSDFEC_SET_TURBO: + rval = xsdfec_set_turbo(xsdfec, arg); + break; + case XSDFEC_GET_TURBO: + rval = xsdfec_get_turbo(xsdfec, arg); + break; default: /* Should not get here */ dev_warn(xsdfec->dev, "Undefined SDFEC IOCTL"); diff --git a/include/uapi/misc/xilinx_sdfec.h b/include/uapi/misc/xilinx_sdfec.h index 15647ef..756d788 100644 --- a/include/uapi/misc/xilinx_sdfec.h +++ b/include/uapi/misc/xilinx_sdfec.h @@ -41,6 +41,22 @@ enum xsdfec_order { }; /** + * enum xsdfec_turbo_alg - Turbo Algorithm Type. + * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When + * scaling is set to this is equivalent to the Max Log-Map + * algorithm. + * @XSDFEC_MAX_STAR: Log-Map algorithm. + * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms. + * + * This enum specifies which Turbo Decode algorithm is in use. + */ +enum xsdfec_turbo_alg { + XSDFEC_MAX_SCALE = 0, + XSDFEC_MAX_STAR, + XSDFEC_TURBO_ALG_MAX, +}; + +/** * enum xsdfec_state - State. * @XSDFEC_INIT: Driver is initialized. * @XSDFEC_STARTED: Driver is started. @@ -98,6 +114,33 @@ enum xsdfec_axis_word_include { }; /** + * struct xsdfec_turbo - User data for Turbo codes. + * @alg: Specifies which Turbo decode algorithm to use + * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm + * has been selected + * + * Turbo code structure to communicate parameters to XSDFEC driver. + */ +struct xsdfec_turbo { + enum xsdfec_turbo_alg alg; + __u8 scale; +}; + +/** + * struct xsdfec_status - Status of SD-FEC core. + * @fec_id: ID of SD-FEC instance. ID is limited to the number of active + * SD-FEC's in the FPGA and is related to the driver instance + * Minor number. + * @state: State of the SD-FEC core + * @activity: Describes if the SD-FEC instance is Active + */ +struct xsdfec_status { + __s32 fec_id; + enum xsdfec_state state; + __s8 activity; +}; + +/** * struct xsdfec_irq - Enabling or Disabling Interrupts. * @enable_isr: If true enables the ISR * @enable_ecc_isr: If true enables the ECC ISR @@ -139,4 +182,32 @@ struct xsdfec_config { * XSDFEC IOCTL List */ #define XSDFEC_MAGIC 'f' +/** + * DOC: XSDFEC_SET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the Turbo decode + * settings for the SD-FEC core + * + * @Description + * + * ioctl that sets the SD-FEC Turbo parameter values + * + * This can only be used when the driver is in the XSDFEC_STOPPED state + */ +#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo) +/** + * DOC: XSDFEC_GET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the current Turbo + * decode settings of the SD-FEC Block + * + * @Description + * + * ioctl that returns SD-FEC turbo param values + */ +#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo) #endif /* __XILINX_SDFEC_H__ */ -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5902C282CE for ; Sat, 25 May 2019 11:37:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AAE832168B for ; Sat, 25 May 2019 11:37:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="hUp4I6+0"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=xilinx.onmicrosoft.com header.i=@xilinx.onmicrosoft.com header.b="imAFbrIT" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AAE832168B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gUE5vEAbrdaIMWCyzzFcjPATkV9bW+qflhxOwYCkDrs=; b=hUp4I6+0ef4Amo K2Y3i1DCTV56Av/LyJhT1yWq72LC6DVIk9+5hc5jEVpwznjxSaiL0HLITcQ06ieoNAgFF+MoE83jn fg+ZW3nMI2WpT2tP5kbooR12znK0EXiDKdF436FEG5cKBIqookMLy3IFHMsDi1Pv5I5mx927sfwYt cgFTL9WB2iG8K7XcdXjO98cgllSecKf0zg8s9l70l3VlKzmoxy21hSsaDjzTAllN0YUtY07ZbPJZV h2xh/+WsG+zhwl+yFyQw1y9APHoY/GVbCH0qRJ6qa9ZHZ2VWCuF1I6cAfEe20qaoV4TEJud2HeJEA zjZ4OGtOhyYE30q8vW2w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hUUzh-0001Ud-Mg; Sat, 25 May 2019 11:37:45 +0000 Received: from mail-eopbgr760070.outbound.protection.outlook.com ([40.107.76.70] helo=NAM02-CY1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hUUzd-0001Ru-If for linux-arm-kernel@lists.infradead.org; Sat, 25 May 2019 11:37:43 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xilinx.onmicrosoft.com; s=selector1-xilinx-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Fpg4Njla/xBdpRsCM3B/g0kGnZsxEycXpWDuC7/E0Wk=; b=imAFbrITMxOx3g8rknPox5EKb2fC1AY0dMwRed3BYDlYRvM54q/K0WJgONwCItkPsAmDegEu5injYzHo6dysHg26zo5I2hkQerD/9TmcgBoMX0qgWtUxu9tQfRso+W1BGPhVePJKks2J1LKWKlvPKx0q97/6WC+7P/57E/M7qHU= Received: from BL0PR02CA0042.namprd02.prod.outlook.com (2603:10b6:207:3d::19) by CY4PR02MB2680.namprd02.prod.outlook.com (2603:10b6:903:120::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1922.18; Sat, 25 May 2019 11:37:37 +0000 Received: from SN1NAM02FT064.eop-nam02.prod.protection.outlook.com (2a01:111:f400:7e44::204) by BL0PR02CA0042.outlook.office365.com (2603:10b6:207:3d::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.1922.17 via Frontend Transport; Sat, 25 May 2019 11:37:36 +0000 Authentication-Results: spf=pass (sender IP is 149.199.80.198) smtp.mailfrom=xilinx.com; arndb.de; dkim=none (message not signed) header.d=none;arndb.de; dmarc=bestguesspass action=none header.from=xilinx.com; Received-SPF: Pass (protection.outlook.com: domain of xilinx.com designates 149.199.80.198 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.80.198; helo=xir-pvapexch02.xlnx.xilinx.com; Received: from xir-pvapexch02.xlnx.xilinx.com (149.199.80.198) by SN1NAM02FT064.mail.protection.outlook.com (10.152.72.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.1922.16 via Frontend Transport; Sat, 25 May 2019 11:37:35 +0000 Received: from xir-pvapexch01.xlnx.xilinx.com (172.21.17.15) by xir-pvapexch02.xlnx.xilinx.com (172.21.17.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1531.3; Sat, 25 May 2019 12:37:34 +0100 Received: from smtp.xilinx.com (172.21.105.198) by xir-pvapexch01.xlnx.xilinx.com (172.21.17.15) with Microsoft SMTP Server id 15.1.1531.3 via Frontend Transport; Sat, 25 May 2019 12:37:34 +0100 Received: from [149.199.110.15] (port=57194 helo=xirdraganc40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1hUUzW-00058U-Mv; Sat, 25 May 2019 12:37:34 +0100 From: Dragan Cvetic To: , , , , , , Subject: [PATCH V4 06/12] misc: xilinx_sdfec: Add ability to configure turbo Date: Sat, 25 May 2019 12:37:19 +0100 Message-ID: <1558784245-108751-7-git-send-email-dragan.cvetic@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> References: <1558784245-108751-1-git-send-email-dragan.cvetic@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.80.198; IPV:CAL; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(396003)(39860400002)(376002)(136003)(346002)(2980300002)(189003)(199004)(2201001)(47776003)(356004)(7636002)(126002)(6666004)(71366001)(2906002)(186003)(5660300002)(478600001)(486006)(14444005)(28376004)(11346002)(305945005)(48376002)(60926002)(446003)(426003)(44832011)(26826003)(336012)(956004)(50466002)(2616005)(476003)(70206006)(9786002)(107886003)(76130400001)(26005)(70586007)(246002)(50226002)(4326008)(106002)(8936002)(36756003)(51416003)(54906003)(8676002)(16586007)(76176011)(316002)(7696005)(36906005)(110136005)(102446001)(461764006); DIR:OUT; SFP:1101; SCL:1; SRVR:CY4PR02MB2680; H:xir-pvapexch02.xlnx.xilinx.com; FPR:; SPF:Pass; LANG:en; PTR:unknown-80-198.xilinx.com; MX:1; A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c2ba9916-6613-4430-747c-08d6e1056282 X-Microsoft-Antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(5600148)(711020)(4605104)(4709054)(1401327)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328); SRVR:CY4PR02MB2680; X-MS-TrafficTypeDiagnostic: CY4PR02MB2680: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6430; X-Forefront-PRVS: 0048BCF4DA X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: iVFLYOF1nfkApwVJ3YcQlSWL0U3UgkTzp0EAsRt4ChadwFc8gj7julO/ZfvginCyQxgCMa36fmLSta4Atkd33HX8w4CobU+KXBvUmN5dVPfhRtQcRRMphiWg6TDv0/sqgnyAojCBSP+NUJJ0SgejDa5M8w3Asd0S7QqLLTseig6UBwAGOP5n/bQtrcJSx7SuGcRXPHzLM40dmVQ9SaYQfhLiZl9ZKX6usNoREhCHYjXph/85KsIWzhmm+bF58kw2AiLxJsnDAjqYF2Ay4SUx9u8HK3Ka1cJB3doEc++VpAur5Mz04fqJs242UI0HTfNN4Ti6LVvgAYrPrONQTM29ri44NCoWtTI6GcImkekajZxtOehy1lRDI9NWzToizZ4JFPsiQiF7mDtjptU0DpfTYyGSG1o74GKDL3ccy8hOOIw= X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2019 11:37:35.9545 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c2ba9916-6613-4430-747c-08d6e1056282 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.80.198]; Helo=[xir-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR02MB2680 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190525_043741_616024_895B2805 X-CRM114-Status: GOOD ( 14.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dragan Cvetic , Derek Kiernan , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org mode Add the capability to configure and retrieve turbo mode via the ioctls XSDFEC_SET_TURBO and XSDFEC_GET_TURBO. Tested-by: Dragan Cvetic Signed-off-by: Derek Kiernan Signed-off-by: Dragan Cvetic --- drivers/misc/xilinx_sdfec.c | 61 ++++++++++++++++++++++++++++++++++ include/uapi/misc/xilinx_sdfec.h | 71 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 132 insertions(+) diff --git a/drivers/misc/xilinx_sdfec.c b/drivers/misc/xilinx_sdfec.c index c19df6b..1f02109 100644 --- a/drivers/misc/xilinx_sdfec.c +++ b/drivers/misc/xilinx_sdfec.c @@ -103,6 +103,12 @@ static atomic_t xsdfec_ndevs = ATOMIC_INIT(0); /* BYPASS Register */ #define XSDFEC_BYPASS_ADDR (0x3C) +/* Turbo Code Register */ +#define XSDFEC_TURBO_ADDR (0x100) +#define XSDFEC_TURBO_SCALE_MASK (0xFFF) +#define XSDFEC_TURBO_SCALE_BIT_POS (8) +#define XSDFEC_TURBO_SCALE_MAX (15) + /** * struct xsdfec_clks - For managing SD-FEC clocks * @core_clk: Main processing clock for core @@ -217,6 +223,55 @@ static int xsdfec_dev_release(struct inode *iptr, struct file *fptr) return 0; } +static int xsdfec_set_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + struct xsdfec_turbo turbo; + int err; + u32 turbo_write; + + err = copy_from_user(&turbo, arg, sizeof(turbo)); + if (err) + return -EFAULT; + + if (turbo.alg >= XSDFEC_TURBO_ALG_MAX) + return -EINVAL; + + if (turbo.scale > XSDFEC_TURBO_SCALE_MAX) + return -EINVAL; + + /* Check to see what device tree says about the FEC codes */ + if (xsdfec->config.code == XSDFEC_LDPC_CODE) + return -EIO; + + turbo_write = ((turbo.scale & XSDFEC_TURBO_SCALE_MASK) + << XSDFEC_TURBO_SCALE_BIT_POS) | + turbo.alg; + xsdfec_regwrite(xsdfec, XSDFEC_TURBO_ADDR, turbo_write); + return err; +} + +static int xsdfec_get_turbo(struct xsdfec_dev *xsdfec, void __user *arg) +{ + u32 reg_value; + struct xsdfec_turbo turbo_params; + int err; + + if (xsdfec->config.code == XSDFEC_LDPC_CODE) + return -EIO; + + reg_value = xsdfec_regread(xsdfec, XSDFEC_TURBO_ADDR); + + turbo_params.scale = (reg_value & XSDFEC_TURBO_SCALE_MASK) >> + XSDFEC_TURBO_SCALE_BIT_POS; + turbo_params.alg = reg_value & 0x1; + + err = copy_to_user(arg, &turbo_params, sizeof(turbo_params)); + if (err) + err = -EFAULT; + + return err; +} + static u32 xsdfec_translate_axis_width_cfg_val(enum xsdfec_axis_width axis_width_cfg) { @@ -302,6 +357,12 @@ static long xsdfec_dev_ioctl(struct file *fptr, unsigned int cmd, } switch (cmd) { + case XSDFEC_SET_TURBO: + rval = xsdfec_set_turbo(xsdfec, arg); + break; + case XSDFEC_GET_TURBO: + rval = xsdfec_get_turbo(xsdfec, arg); + break; default: /* Should not get here */ dev_warn(xsdfec->dev, "Undefined SDFEC IOCTL"); diff --git a/include/uapi/misc/xilinx_sdfec.h b/include/uapi/misc/xilinx_sdfec.h index 15647ef..756d788 100644 --- a/include/uapi/misc/xilinx_sdfec.h +++ b/include/uapi/misc/xilinx_sdfec.h @@ -41,6 +41,22 @@ enum xsdfec_order { }; /** + * enum xsdfec_turbo_alg - Turbo Algorithm Type. + * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When + * scaling is set to this is equivalent to the Max Log-Map + * algorithm. + * @XSDFEC_MAX_STAR: Log-Map algorithm. + * @XSDFEC_TURBO_ALG_MAX: Used to indicate out of bound Turbo algorithms. + * + * This enum specifies which Turbo Decode algorithm is in use. + */ +enum xsdfec_turbo_alg { + XSDFEC_MAX_SCALE = 0, + XSDFEC_MAX_STAR, + XSDFEC_TURBO_ALG_MAX, +}; + +/** * enum xsdfec_state - State. * @XSDFEC_INIT: Driver is initialized. * @XSDFEC_STARTED: Driver is started. @@ -98,6 +114,33 @@ enum xsdfec_axis_word_include { }; /** + * struct xsdfec_turbo - User data for Turbo codes. + * @alg: Specifies which Turbo decode algorithm to use + * @scale: Specifies the extrinsic scaling to apply when the Max Scale algorithm + * has been selected + * + * Turbo code structure to communicate parameters to XSDFEC driver. + */ +struct xsdfec_turbo { + enum xsdfec_turbo_alg alg; + __u8 scale; +}; + +/** + * struct xsdfec_status - Status of SD-FEC core. + * @fec_id: ID of SD-FEC instance. ID is limited to the number of active + * SD-FEC's in the FPGA and is related to the driver instance + * Minor number. + * @state: State of the SD-FEC core + * @activity: Describes if the SD-FEC instance is Active + */ +struct xsdfec_status { + __s32 fec_id; + enum xsdfec_state state; + __s8 activity; +}; + +/** * struct xsdfec_irq - Enabling or Disabling Interrupts. * @enable_isr: If true enables the ISR * @enable_ecc_isr: If true enables the ECC ISR @@ -139,4 +182,32 @@ struct xsdfec_config { * XSDFEC IOCTL List */ #define XSDFEC_MAGIC 'f' +/** + * DOC: XSDFEC_SET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the Turbo decode + * settings for the SD-FEC core + * + * @Description + * + * ioctl that sets the SD-FEC Turbo parameter values + * + * This can only be used when the driver is in the XSDFEC_STOPPED state + */ +#define XSDFEC_SET_TURBO _IOW(XSDFEC_MAGIC, 4, struct xsdfec_turbo) +/** + * DOC: XSDFEC_GET_TURBO + * @Parameters + * + * @struct xsdfec_turbo * + * Pointer to the &struct xsdfec_turbo that contains the current Turbo + * decode settings of the SD-FEC Block + * + * @Description + * + * ioctl that returns SD-FEC turbo param values + */ +#define XSDFEC_GET_TURBO _IOR(XSDFEC_MAGIC, 7, struct xsdfec_turbo) #endif /* __XILINX_SDFEC_H__ */ -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel