From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D5E6C468BE for ; Mon, 10 Jun 2019 03:45:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1B49420820 for ; Mon, 10 Jun 2019 03:45:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387560AbfFJDpO (ORCPT ); Sun, 9 Jun 2019 23:45:14 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:24926 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2387457AbfFJDpN (ORCPT ); Sun, 9 Jun 2019 23:45:13 -0400 X-UUID: b2bb53f8932f442ca9a3f478ae319eea-20190610 X-UUID: b2bb53f8932f442ca9a3f478ae319eea-20190610 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 740195698; Mon, 10 Jun 2019 11:44:56 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 10 Jun 2019 11:44:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 10 Jun 2019 11:44:55 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd CC: James Liao , Fan Chen , , , , , , , Weiyi Lu , Biao Huang Subject: [RFC v1] clk: core: support clocks that need to be enabled during re-parent Date: Mon, 10 Jun 2019 11:44:53 +0800 Message-ID: <1560138293-4163-1-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When using property assigned-clock-parents to assign parent clocks, core clocks might still be disabled during re-parent. Add flag 'CLK_OPS_CORE_ENABLE' for those clocks must be enabled during re-parent. Signed-off-by: Weiyi Lu --- drivers/clk/clk.c | 9 +++++++++ include/linux/clk-provider.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 443711f..b2e6fe3 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1717,6 +1717,10 @@ static struct clk_core *__clk_set_parent_before(struct clk_core *core, clk_core_prepare_enable(parent); } + /* enable core if CLK_OPS_CORE_ENABLE is set */ + if (core->flags & CLK_OPS_CORE_ENABLE) + clk_core_prepare_enable(core); + /* migrate prepare count if > 0 */ if (core->prepare_count) { clk_core_prepare_enable(parent); @@ -1744,6 +1748,10 @@ static void __clk_set_parent_after(struct clk_core *core, clk_core_disable_unprepare(old_parent); } + /* re-balance ref counting if CLK_OPS_CORE_ENABLE is set */ + if (core->flags & CLK_OPS_CORE_ENABLE) + clk_core_disable_unprepare(core); + /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ if (core->flags & CLK_OPS_PARENT_ENABLE) { clk_core_disable_unprepare(parent); @@ -2973,6 +2981,7 @@ static int clk_dump_show(struct seq_file *s, void *data) ENTRY(CLK_IS_CRITICAL), ENTRY(CLK_OPS_PARENT_ENABLE), ENTRY(CLK_DUTY_CYCLE_PARENT), + ENTRY(CLK_OPS_CORE_ENABLE), #undef ENTRY }; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index bb6118f..39a1fed 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -34,6 +34,7 @@ #define CLK_OPS_PARENT_ENABLE BIT(12) /* duty cycle call may be forwarded to the parent clock */ #define CLK_DUTY_CYCLE_PARENT BIT(13) +#define CLK_OPS_CORE_ENABLE BIT(14) /* core need enable during re-parent */ struct clk; struct clk_hw; -- 1.8.1.1.dirty From mboxrd@z Thu Jan 1 00:00:00 1970 From: Weiyi Lu Subject: [RFC v1] clk: core: support clocks that need to be enabled during re-parent Date: Mon, 10 Jun 2019 11:44:53 +0800 Message-ID: <1560138293-4163-1-git-send-email-weiyi.lu@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-kernel-owner@vger.kernel.org To: Matthias Brugger , Stephen Boyd Cc: James Liao , Fan Chen , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, srv_heupstream@mediatek.com, stable@vger.kernel.org, Weiyi Lu , Biao Huang List-Id: linux-mediatek@lists.infradead.org When using property assigned-clock-parents to assign parent clocks, core clocks might still be disabled during re-parent. Add flag 'CLK_OPS_CORE_ENABLE' for those clocks must be enabled during re-parent. Signed-off-by: Weiyi Lu --- drivers/clk/clk.c | 9 +++++++++ include/linux/clk-provider.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 443711f..b2e6fe3 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1717,6 +1717,10 @@ static struct clk_core *__clk_set_parent_before(struct clk_core *core, clk_core_prepare_enable(parent); } + /* enable core if CLK_OPS_CORE_ENABLE is set */ + if (core->flags & CLK_OPS_CORE_ENABLE) + clk_core_prepare_enable(core); + /* migrate prepare count if > 0 */ if (core->prepare_count) { clk_core_prepare_enable(parent); @@ -1744,6 +1748,10 @@ static void __clk_set_parent_after(struct clk_core *core, clk_core_disable_unprepare(old_parent); } + /* re-balance ref counting if CLK_OPS_CORE_ENABLE is set */ + if (core->flags & CLK_OPS_CORE_ENABLE) + clk_core_disable_unprepare(core); + /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ if (core->flags & CLK_OPS_PARENT_ENABLE) { clk_core_disable_unprepare(parent); @@ -2973,6 +2981,7 @@ static int clk_dump_show(struct seq_file *s, void *data) ENTRY(CLK_IS_CRITICAL), ENTRY(CLK_OPS_PARENT_ENABLE), ENTRY(CLK_DUTY_CYCLE_PARENT), + ENTRY(CLK_OPS_CORE_ENABLE), #undef ENTRY }; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index bb6118f..39a1fed 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -34,6 +34,7 @@ #define CLK_OPS_PARENT_ENABLE BIT(12) /* duty cycle call may be forwarded to the parent clock */ #define CLK_DUTY_CYCLE_PARENT BIT(13) +#define CLK_OPS_CORE_ENABLE BIT(14) /* core need enable during re-parent */ struct clk; struct clk_hw; -- 1.8.1.1.dirty From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,T_DKIMWL_WL_HIGH,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50296C468BE for ; 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Sun, 09 Jun 2019 19:45:04 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 9 Jun 2019 20:45:02 -0700 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 10 Jun 2019 11:44:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 10 Jun 2019 11:44:55 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd Subject: [RFC v1] clk: core: support clocks that need to be enabled during re-parent Date: Mon, 10 Jun 2019 11:44:53 +0800 Message-ID: <1560138293-4163-1-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190609_204518_647667_A87737AA X-CRM114-Status: UNSURE ( 9.93 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: James Liao , Weiyi Lu , srv_heupstream@mediatek.com, Biao Huang , linux-kernel@vger.kernel.org, stable@vger.kernel.org, Fan Chen , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org When using property assigned-clock-parents to assign parent clocks, core clocks might still be disabled during re-parent. Add flag 'CLK_OPS_CORE_ENABLE' for those clocks must be enabled during re-parent. Signed-off-by: Weiyi Lu --- drivers/clk/clk.c | 9 +++++++++ include/linux/clk-provider.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 443711f..b2e6fe3 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1717,6 +1717,10 @@ static struct clk_core *__clk_set_parent_before(struct clk_core *core, clk_core_prepare_enable(parent); } + /* enable core if CLK_OPS_CORE_ENABLE is set */ + if (core->flags & CLK_OPS_CORE_ENABLE) + clk_core_prepare_enable(core); + /* migrate prepare count if > 0 */ if (core->prepare_count) { clk_core_prepare_enable(parent); @@ -1744,6 +1748,10 @@ static void __clk_set_parent_after(struct clk_core *core, clk_core_disable_unprepare(old_parent); } + /* re-balance ref counting if CLK_OPS_CORE_ENABLE is set */ + if (core->flags & CLK_OPS_CORE_ENABLE) + clk_core_disable_unprepare(core); + /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ if (core->flags & CLK_OPS_PARENT_ENABLE) { clk_core_disable_unprepare(parent); @@ -2973,6 +2981,7 @@ static int clk_dump_show(struct seq_file *s, void *data) ENTRY(CLK_IS_CRITICAL), ENTRY(CLK_OPS_PARENT_ENABLE), ENTRY(CLK_DUTY_CYCLE_PARENT), + ENTRY(CLK_OPS_CORE_ENABLE), #undef ENTRY }; diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index bb6118f..39a1fed 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -34,6 +34,7 @@ #define CLK_OPS_PARENT_ENABLE BIT(12) /* duty cycle call may be forwarded to the parent clock */ #define CLK_DUTY_CYCLE_PARENT BIT(13) +#define CLK_OPS_CORE_ENABLE BIT(14) /* core need enable during re-parent */ struct clk; struct clk_hw; -- 1.8.1.1.dirty _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel