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[46.193.13.130]) by smtp.googlemail.com with ESMTPSA id u18sm9412034wrr.11.2019.06.17.12.29.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Jun 2019 12:29:55 -0700 (PDT) From: Loys Ollivier To: Palmer Dabbelt , Paul Walmsley Cc: Loys Ollivier , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Kevin Hilman Subject: [PATCH 1/3] arch: riscv: add config option for building SiFive's SoC resource Date: Mon, 17 Jun 2019 21:29:48 +0200 Message-Id: <1560799790-20287-2-git-send-email-lollivier@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1560799790-20287-1-git-send-email-lollivier@baylibre.com> References: <1560799790-20287-1-git-send-email-lollivier@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Create a config option for building SiFive SoC specific resources e.g. SiFive device tree, platform drivers... Signed-off-by: Loys Ollivier Cc: Paul Walmsley Cc: Palmer Dabbelt --- arch/riscv/Kconfig | 2 ++ arch/riscv/Kconfig.socs | 8 ++++++++ arch/riscv/boot/dts/sifive/Makefile | 2 +- 3 files changed, 11 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/Kconfig.socs diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ee32c66e1af3..eace5857c9e9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -94,6 +94,8 @@ config PGTABLE_LEVELS default 3 if 64BIT default 2 +source "arch/riscv/Kconfig.socs" + menu "Platform type" choice diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs new file mode 100644 index 000000000000..60dae1b5f276 --- /dev/null +++ b/arch/riscv/Kconfig.socs @@ -0,0 +1,8 @@ +menu "SoC selection" + +config SOC_SIFIVE + bool "SiFive SoCs" + help + This enables support for SiFive SoC platform hardware. + +endmenu diff --git a/arch/riscv/boot/dts/sifive/Makefile b/arch/riscv/boot/dts/sifive/Makefile index baaeef9efdcb..6d6189e6e4af 100644 --- a/arch/riscv/boot/dts/sifive/Makefile +++ b/arch/riscv/boot/dts/sifive/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-y += hifive-unleashed-a00.dtb +dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83323C31E5B for ; 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[46.193.13.130]) by smtp.googlemail.com with ESMTPSA id u18sm9412034wrr.11.2019.06.17.12.29.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Jun 2019 12:29:55 -0700 (PDT) From: Loys Ollivier To: Palmer Dabbelt , Paul Walmsley Subject: [PATCH 1/3] arch: riscv: add config option for building SiFive's SoC resource Date: Mon, 17 Jun 2019 21:29:48 +0200 Message-Id: <1560799790-20287-2-git-send-email-lollivier@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1560799790-20287-1-git-send-email-lollivier@baylibre.com> References: <1560799790-20287-1-git-send-email-lollivier@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190617_122959_980575_304AF6DA X-CRM114-Status: GOOD ( 12.51 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Loys Ollivier , linux-kernel@vger.kernel.org, Kevin Hilman MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+infradead-linux-riscv=archiver.kernel.org@lists.infradead.org Create a config option for building SiFive SoC specific resources e.g. SiFive device tree, platform drivers... Signed-off-by: Loys Ollivier Cc: Paul Walmsley Cc: Palmer Dabbelt --- arch/riscv/Kconfig | 2 ++ arch/riscv/Kconfig.socs | 8 ++++++++ arch/riscv/boot/dts/sifive/Makefile | 2 +- 3 files changed, 11 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/Kconfig.socs diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ee32c66e1af3..eace5857c9e9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -94,6 +94,8 @@ config PGTABLE_LEVELS default 3 if 64BIT default 2 +source "arch/riscv/Kconfig.socs" + menu "Platform type" choice diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs new file mode 100644 index 000000000000..60dae1b5f276 --- /dev/null +++ b/arch/riscv/Kconfig.socs @@ -0,0 +1,8 @@ +menu "SoC selection" + +config SOC_SIFIVE + bool "SiFive SoCs" + help + This enables support for SiFive SoC platform hardware. + +endmenu diff --git a/arch/riscv/boot/dts/sifive/Makefile b/arch/riscv/boot/dts/sifive/Makefile index baaeef9efdcb..6d6189e6e4af 100644 --- a/arch/riscv/boot/dts/sifive/Makefile +++ b/arch/riscv/boot/dts/sifive/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-y += hifive-unleashed-a00.dtb +dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb -- 2.7.4 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv