[RFC 0/2] arm64: dts: add the rpmsg support on imx8mq and imx8qxp

[RFC 0/2] arm64: dts: add the rpmsg support on imx8mq and imx8qxp

[Richard Zhu]

[RFC 1/2] arm64: dts: imx8mq: add the rpmsg support
[RFC 2/2] arm64: dts: imx8qxp: add the rpmsg support

arch/arm64/boot/dts/freescale/Makefile             |  2 +-
arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi          | 23 +++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts      | 36 ++++++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi         | 23 +++++++++++++++++++++++
5 files changed, 150 insertions(+), 1 deletion(-)

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[RFC 1/2] arm64: dts: imx8mq: add the rpmsg support

[Richard Zhu]

Add the iMX8MQ RPMSG support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/Makefile             |  2 +-
 arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts | 67 ++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8mq.dtsi          | 23 ++++++++
 3 files changed, 91 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index c043aca..478f448 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -21,7 +21,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
 
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
new file mode 100644
index 0000000..185a5c4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2019 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8mq-evk.dts"
+
+/ {
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		m4_reserved: m4@0x80000000 {
+			no-map;
+			reg = <0 0x80000000 0 0x1000000>;
+		};
+		rpmsg_reserved: rpmsg@0xb8000000 {
+			no-map;
+			reg = <0 0xb8000000 0 0x400000>;
+		};
+		rpmsg_dma_reserved:rpmsg_dma@0xb8400000 {
+			compatible = "shared-dma-pool";
+			no-map;
+			reg = <0 0xb8400000 0 0x100000>;
+		};
+	};
+};
+
+/*
+ * Regarding to the HW conflications, the following module should be disabled
+ * when M4 is running on evk board.
+ * gpt1, i2c2, pwm4, tmu, uart2, wdog3
+ */
+
+&i2c2 {
+	status = "disabled";
+};
+
+&pwm4 {
+	status = "disabled";
+};
+
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 * --0xb8000000~0xb800ffff: pingpong
+	 */
+	vdev-nums = <1>;
+	reg = <0x0 0xb8000000 0x0 0x10000>;
+	memory-region = <&rpmsg_dma_reserved>;
+	status = "okay";
+};
+
+&tmu {
+	status = "disabled";
+};
+
+&uart2 {
+	status = "disabled";
+};
+
+&wdog3{
+	status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 85008dc..93d90e2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -777,6 +777,15 @@
 				status = "disabled";
 			};
 
+			mu: mu@30aa0000 {
+				compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+				reg = <0x30aa0000 0x10000>;
+				interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
+				clock-names = "mu";
+				#mbox-cells = <2>;
+			};
+
 			usdhc1: mmc@30b40000 {
 				compatible = "fsl,imx8mq-usdhc",
 				             "fsl,imx7d-usdhc";
@@ -1032,4 +1041,18 @@
 			interrupt-parent = <&gic>;
 		};
 	};
+
+	rpmsg: rpmsg{
+		compatible = "fsl,imx8mq-rpmsg";
+		/* up to now, the following channels are used in imx rpmsg
+		 * - tx1/rx1: messages channel.
+		 * - general interrupt1: remote proc finish re-init rpmsg stack
+		 *   when A core is partition reset.
+		 */
+		mbox-names = "tx", "rx", "rxdb";
+		mboxes = <&mu 0 1
+			  &mu 1 1
+			  &mu 3 1>;
+		status = "disabled";
+	};
 };
-- 
2.7.4


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[RFC 2/2] arm64: dts: imx8qxp: add the rpmsg support

[Richard Zhu]

Add the rpmsg support.
- Setup the rpmsg reserved memory, one is used for vring, the other one
is used for shared buffers.
- The mailbox of the lsio mu5a is used by rpmsg on imx8qxp platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 36 +++++++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi    | 23 +++++++++++++++++
 2 files changed, 59 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index bfdada2..83cf611b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -20,6 +20,32 @@
 		reg = <0x00000000 0x80000000 0 0x40000000>;
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/*
+		 * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4
+		 * Shouldn't be used at A core and Linux side.
+		 *
+		 */
+		m4_reserved: m4@0x88000000 {
+			no-map;
+			reg = <0 0x88000000 0 0x8000000>;
+		};
+
+		rpmsg_reserved: rpmsg@0x90000000 {
+			no-map;
+			reg = <0 0x90000000 0 0x400000>;
+		};
+		rpmsg_dma_reserved:rpmsg_dma@0x90400000 {
+			compatible = "shared-dma-pool";
+			no-map;
+			reg = <0 0x90400000 0 0x100000>;
+		};
+	};
+
 	reg_usdhc2_vmmc: usdhc2-vmmc {
 		compatible = "regulator-fixed";
 		regulator-name = "SD1_SPWR";
@@ -136,6 +162,16 @@
 	};
 };
 
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 */
+	vdev-nums = <2>;
+	reg = <0x0 0x90000000 0x0 0x20000>;
+	memory-region = <&rpmsg_dma_reserved>;
+	status = "okay";
+};
+
 &usdhc1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 05fa0b7..e211fff 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -544,6 +544,14 @@
 			status = "disabled";
 		};
 
+		lsio_mu5: mailbox@5d200000 {
+			compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
+			reg = <0x5d200000 0x10000>;
+			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+			power-domains = <&pd IMX_SC_R_MU_5A>;
+		};
+
 		lsio_mu13: mailbox@5d280000 {
 			compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
 			reg = <0x5d280000 0x10000>;
@@ -558,4 +566,19 @@
 			#clock-cells = <1>;
 		};
 	};
+
+	rpmsg: rpmsg{
+		compatible = "fsl,imx8qxp-rpmsg";
+		/* up to now, the following channels are used in imx rpmsg
+		 * - tx1/rx1: messages channel.
+		 * - general interrupt1: remote proc finish re-init rpmsg stack
+		 *   when A core is partition reset.
+		 */
+		mbox-names = "tx", "rx", "rxdb";
+		mboxes = <&lsio_mu5 0 1
+			  &lsio_mu5 1 1
+			  &lsio_mu5 3 1>;
+		mub-partition = <3>;
+		status = "disabled";
+	};
 };
-- 
2.7.4


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Re: [RFC 1/2] arm64: dts: imx8mq: add the rpmsg support

[Oleksij Rempel]

Hi Richard,

this patch is mixing SoC and application specific parts.
Adding mu: mu@30aa0000  is SoC specific and should go to separate patch.
Every thing else is application specific and needed for demonstration only.
Correct?

On 04.07.19 08:36, Richard Zhu wrote:
> Add the iMX8MQ RPMSG support.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>   arch/arm64/boot/dts/freescale/Makefile             |  2 +-
>   arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts | 67 ++++++++++++++++++++++
>   arch/arm64/boot/dts/freescale/imx8mq.dtsi          | 23 ++++++++
>   3 files changed, 91 insertions(+), 1 deletion(-)
>   create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index c043aca..478f448 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -21,7 +21,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
>   dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
>   
>   dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> -dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb
>   dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
>   dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
>   dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> new file mode 100644
> index 0000000..185a5c4
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2019 NXP
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mq-evk.dts"
> +
> +/ {
> +	reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		m4_reserved: m4@0x80000000 {
> +			no-map;
> +			reg = <0 0x80000000 0 0x1000000>;
> +		};
> +		rpmsg_reserved: rpmsg@0xb8000000 {
> +			no-map;
> +			reg = <0 0xb8000000 0 0x400000>;
> +		};
> +		rpmsg_dma_reserved:rpmsg_dma@0xb8400000 {
> +			compatible = "shared-dma-pool";
> +			no-map;
> +			reg = <0 0xb8400000 0 0x100000>;
> +		};
> +	};
> +};
> +
> +/*
> + * Regarding to the HW conflications, the following module should be disabled
> + * when M4 is running on evk board.
> + * gpt1, i2c2, pwm4, tmu, uart2, wdog3
> + */
> +
> +&i2c2 {
> +	status = "disabled";
> +};
> +
> +&pwm4 {
> +	status = "disabled";
> +};
> +
> +&rpmsg{
> +	/*
> +	 * 64K for one rpmsg instance:
> +	 * --0xb8000000~0xb800ffff: pingpong
> +	 */
> +	vdev-nums = <1>;
> +	reg = <0x0 0xb8000000 0x0 0x10000>;
> +	memory-region = <&rpmsg_dma_reserved>;
> +	status = "okay";
> +};
> +
> +&tmu {
> +	status = "disabled";
> +};
> +
> +&uart2 {
> +	status = "disabled";
> +};
> +
> +&wdog3{
> +	status = "disabled";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 85008dc..93d90e2 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -777,6 +777,15 @@
>   				status = "disabled";
>   			};
>   
> +			mu: mu@30aa0000 {
> +				compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
> +				reg = <0x30aa0000 0x10000>;
> +				interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
> +				clock-names = "mu";
> +				#mbox-cells = <2>;
> +			};
> +
>   			usdhc1: mmc@30b40000 {
>   				compatible = "fsl,imx8mq-usdhc",
>   				             "fsl,imx7d-usdhc";
> @@ -1032,4 +1041,18 @@
>   			interrupt-parent = <&gic>;
>   		};
>   	};
> +
> +	rpmsg: rpmsg{
> +		compatible = "fsl,imx8mq-rpmsg";
> +		/* up to now, the following channels are used in imx rpmsg
> +		 * - tx1/rx1: messages channel.
> +		 * - general interrupt1: remote proc finish re-init rpmsg stack
> +		 *   when A core is partition reset.
> +		 */
> +		mbox-names = "tx", "rx", "rxdb";
> +		mboxes = <&mu 0 1
> +			  &mu 1 1
> +			  &mu 3 1>;
> +		status = "disabled";
> +	};
>   };
> 

Kind regards,
Oleksij Rempel

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RE: [EXT] Re: [RFC 1/2] arm64: dts: imx8mq: add the rpmsg support

[Richard Zhu]

Hi Oleksij:
Thank your for your comments.

> -----Original Message-----
> From: Oleksij Rempel [mailto:o.rempel@pengutronix.de]
> Sent: 2019年7月4日 17:18
> To: Richard Zhu <hongxing.zhu@nxp.com>; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [RFC 1/2] arm64: dts: imx8mq: add the rpmsg support
> 
> Hi Richard,
> 
> this patch is mixing SoC and application specific parts.
> Adding mu: mu@30aa0000  is SoC specific and should go to separate patch.
> Every thing else is application specific and needed for demonstration only.
> Correct?
> 
[Richard Zhu] Yes, correct. The mu is SoC specific part. I would split it to a standalone patch later.

Best Regards
Richard Zhu

> On 04.07.19 08:36, Richard Zhu wrote:
> > Add the iMX8MQ RPMSG support.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >   arch/arm64/boot/dts/freescale/Makefile             |  2 +-
> >   arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts | 67
> ++++++++++++++++++++++
> >   arch/arm64/boot/dts/freescale/imx8mq.dtsi          | 23 ++++++++
> >   3 files changed, 91 insertions(+), 1 deletion(-)
> >   create mode 100644
> > arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index c043aca..478f448 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -21,7 +21,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) +=
> fsl-lx2160a-qds.dtb
> >   dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> >
> >   dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
> > -dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb
> >   dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
> >   dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
> >   dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb diff --git
> > a/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> > b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> > new file mode 100644
> > index 0000000..185a5c4
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts
> > @@ -0,0 +1,67 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright 2019 NXP
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "imx8mq-evk.dts"
> > +
> > +/ {
> > +     reserved-memory {
> > +             #address-cells = <2>;
> > +             #size-cells = <2>;
> > +             ranges;
> > +
> > +             m4_reserved: m4@0x80000000 {
> > +                     no-map;
> > +                     reg = <0 0x80000000 0 0x1000000>;
> > +             };
> > +             rpmsg_reserved: rpmsg@0xb8000000 {
> > +                     no-map;
> > +                     reg = <0 0xb8000000 0 0x400000>;
> > +             };
> > +             rpmsg_dma_reserved:rpmsg_dma@0xb8400000 {
> > +                     compatible = "shared-dma-pool";
> > +                     no-map;
> > +                     reg = <0 0xb8400000 0 0x100000>;
> > +             };
> > +     };
> > +};
> > +
> > +/*
> > + * Regarding to the HW conflications, the following module should be
> > +disabled
> > + * when M4 is running on evk board.
> > + * gpt1, i2c2, pwm4, tmu, uart2, wdog3  */
> > +
> > +&i2c2 {
> > +     status = "disabled";
> > +};
> > +
> > +&pwm4 {
> > +     status = "disabled";
> > +};
> > +
> > +&rpmsg{
> > +     /*
> > +      * 64K for one rpmsg instance:
> > +      * --0xb8000000~0xb800ffff: pingpong
> > +      */
> > +     vdev-nums = <1>;
> > +     reg = <0x0 0xb8000000 0x0 0x10000>;
> > +     memory-region = <&rpmsg_dma_reserved>;
> > +     status = "okay";
> > +};
> > +
> > +&tmu {
> > +     status = "disabled";
> > +};
> > +
> > +&uart2 {
> > +     status = "disabled";
> > +};
> > +
> > +&wdog3{
> > +     status = "disabled";
> > +};
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 85008dc..93d90e2 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -777,6 +777,15 @@
> >                               status = "disabled";
> >                       };
> >
> > +                     mu: mu@30aa0000 {
> > +                             compatible = "fsl,imx8mq-mu",
> "fsl,imx6sx-mu";
> > +                             reg = <0x30aa0000 0x10000>;
> > +                             interrupts = <GIC_SPI 88
> IRQ_TYPE_LEVEL_HIGH>;
> > +                             clocks = <&clk
> IMX8MQ_CLK_MU_ROOT>;
> > +                             clock-names = "mu";
> > +                             #mbox-cells = <2>;
> > +                     };
> > +
> >                       usdhc1: mmc@30b40000 {
> >                               compatible = "fsl,imx8mq-usdhc",
> >                                            "fsl,imx7d-usdhc";
> @@
> > -1032,4 +1041,18 @@
> >                       interrupt-parent = <&gic>;
> >               };
> >       };
> > +
> > +     rpmsg: rpmsg{
> > +             compatible = "fsl,imx8mq-rpmsg";
> > +             /* up to now, the following channels are used in imx rpmsg
> > +              * - tx1/rx1: messages channel.
> > +              * - general interrupt1: remote proc finish re-init rpmsg
> stack
> > +              *   when A core is partition reset.
> > +              */
> > +             mbox-names = "tx", "rx", "rxdb";
> > +             mboxes = <&mu 0 1
> > +                       &mu 1 1
> > +                       &mu 3 1>;
> > +             status = "disabled";
> > +     };
> >   };
> >
> 
> Kind regards,
> Oleksij Rempel
> 
> --
> Pengutronix e.K.                           |
> |
> Industrial Linux Solutions                 |
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