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From: Zhang Rui <rui.zhang@intel.com>
To: rjw@rjwysocki.net
Cc: linux-pm@vger.kernel.org, srinivas.pandruvada@intel.com,
	rui.zhang@intel.com
Subject: [PATCH V3 08/17] intel_rapl: cleanup hardcoded MSR access
Date: Wed, 10 Jul 2019 21:44:29 +0800	[thread overview]
Message-ID: <1562766278-7099-9-git-send-email-rui.zhang@intel.com> (raw)
In-Reply-To: <1562766278-7099-1-git-send-email-rui.zhang@intel.com>

There are still some places in the common code that have hardcoded
MSR access, convert them to follow the abstracted register access.

Reviewed-and-tested-by: Pandruvada, Srinivas <srinivas.pandruvada@intel.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
---
 drivers/powercap/intel_rapl.c | 38 ++++++++++++++++++++++----------------
 1 file changed, 22 insertions(+), 16 deletions(-)

diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
index 7a97d33..aa54c06 100644
--- a/drivers/powercap/intel_rapl.c
+++ b/drivers/powercap/intel_rapl.c
@@ -767,22 +767,24 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
  */
 static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
 {
-	u64 msr_val;
+	struct reg_action ra;
 	u32 value;
 
-	if (rdmsrl_safe_on_cpu(cpu, rp->priv->reg_unit, &msr_val)) {
-		pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
+	ra.reg = rp->priv->reg_unit;
+	ra.mask = ~0;
+	if (rp->priv->read_raw(cpu, &ra)) {
+		pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
 			rp->priv->reg_unit, cpu);
 		return -ENODEV;
 	}
 
-	value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
+	value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
 	rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
 
-	value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
+	value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
 	rp->power_unit = 1000000 / (1 << value);
 
-	value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
+	value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
 	rp->time_unit = 1000000 / (1 << value);
 
 	pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n",
@@ -793,21 +795,24 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
 
 static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
 {
-	u64 msr_val;
+	struct reg_action ra;
 	u32 value;
 
-	if (rdmsrl_safe_on_cpu(cpu, rp->priv->reg_unit, &msr_val)) {
-		pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
+	ra.reg = rp->priv->reg_unit;
+	ra.mask = ~0;
+	if (rp->priv->read_raw(cpu, &ra)) {
+		pr_err("Failed to read power unit REG 0x%x on CPU %d, exit.\n",
 			rp->priv->reg_unit, cpu);
 		return -ENODEV;
 	}
-	value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
+
+	value = (ra.value & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
 	rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
 
-	value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
+	value = (ra.value & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
 	rp->power_unit = (1 << value) * 1000;
 
-	value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
+	value = (ra.value & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
 	rp->time_unit = 1000000 / (1 << value);
 
 	pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n",
@@ -1180,15 +1185,14 @@ static void rapl_remove_platform_domain(struct rapl_if_priv *priv)
 
 static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp)
 {
-	u32 reg;
-	u64 val = 0;
+	struct reg_action ra;
 
 	switch (domain) {
 	case RAPL_DOMAIN_PACKAGE:
 	case RAPL_DOMAIN_PP0:
 	case RAPL_DOMAIN_PP1:
 	case RAPL_DOMAIN_DRAM:
-		reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS];
+		ra.reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS];
 		break;
 	case RAPL_DOMAIN_PLATFORM:
 		/* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */
@@ -1200,7 +1204,9 @@ static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp)
 	/* make sure domain counters are available and contains non-zero
 	 * values, otherwise skip it.
 	 */
-	if (rdmsrl_safe_on_cpu(cpu, reg, &val) || !val)
+
+	ra.mask = ~0;
+	if (rp->priv->read_raw(cpu, &ra) || !ra.value)
 		return -ENODEV;
 
 	return 0;
-- 
2.7.4


  parent reply	other threads:[~2019-07-10 13:44 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-10 13:44 [PATCH V3 00/17] intel_rapl: RAPL changes for 5.3 Zhang Rui
2019-07-10 13:44 ` [PATCH V3 01/17] intel_rapl: use reg instead of msr Zhang Rui
2019-07-10 13:44 ` [PATCH V3 02/17] intel_rapl: remove hardcoded register index Zhang Rui
2019-07-10 13:44 ` [PATCH V3 03/17] intel_rapl: introduce intel_rapl.h Zhang Rui
2019-07-10 13:44 ` [PATCH V3 04/17] intel_rapl: introduce struct rapl_if_private Zhang Rui
2019-07-10 13:44 ` [PATCH V3 05/17] intel_rapl: abstract register address Zhang Rui
2019-07-10 13:44 ` [PATCH V3 06/17] intel_rapl: abstract register access operations Zhang Rui
2019-07-10 13:44 ` [PATCH V3 07/17] intel_rapl: cleanup some functions Zhang Rui
2019-07-10 13:44 ` Zhang Rui [this message]
2019-07-10 13:44 ` [PATCH V3 09/17] intel_rapl: abstract RAPL common code Zhang Rui
2019-07-10 13:44 ` [PATCH V3 10/17] intel_rapl: support 64 bit register Zhang Rui
2019-07-10 13:44 ` [PATCH V3 11/17] intel_rapl: support two power limits for every RAPL domain Zhang Rui
2019-07-10 13:44 ` [PATCH V3 12/17] int340X/processor_thermal_device: add support for MMIO RAPL Zhang Rui
2019-07-10 13:44 ` [PATCH V3 13/17] intel_rapl: Fix module autoloading issue Zhang Rui
2019-07-10 13:44 ` [PATCH V3 14/17] powercap/intel_rapl: add support for IceLake desktop Zhang Rui
2019-07-10 13:44 ` [PATCH V3 15/17] powercap/intel_rapl: add support for ICX Zhang Rui
2019-07-10 13:44 ` [PATCH V3 16/17] powercap/intel_rapl: add support for ICX-D Zhang Rui
2019-07-10 13:44 ` [PATCH V3 17/17] powercap/rapl: Add Ice Lake NNPI support to RAPL driver Zhang Rui

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