From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B356C76188 for ; Mon, 22 Jul 2019 09:17:22 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 08DEC2229A for ; Mon, 22 Jul 2019 09:17:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 08DEC2229A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mellanox.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A638D1BE91; Mon, 22 Jul 2019 11:14:25 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id E88BE1BDFC for ; Mon, 22 Jul 2019 11:13:30 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE2 (envelope-from matan@mellanox.com) with ESMTPS (AES256-SHA encrypted); 22 Jul 2019 12:13:24 +0300 Received: from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx [10.210.16.112]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6M9DMjq010084; Mon, 22 Jul 2019 12:13:24 +0300 From: Matan Azrad To: Shahaf Shuler , Yongseok Koh , Viacheslav Ovsiienko Cc: dev@dpdk.org, Dekel Peled Date: Mon, 22 Jul 2019 09:13:14 +0000 Message-Id: <1563786795-14027-28-git-send-email-matan@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1563786795-14027-1-git-send-email-matan@mellanox.com> References: <1563786795-14027-1-git-send-email-matan@mellanox.com> Subject: [dpdk-dev] [PATCH 27/28] net/mlx5: adjust the maximum LRO message size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" LRO message is contained in the MPRQ strides. While the LRO message size cannot be bigger than 65280 according to the PRM, the strides which contain it may be bigger than the maximum buffer size allowed in dpdk mbuf - 0xFFFF. Adjust the maximum LRO message size to avoid buffer length overflow. Signed-off-by: Matan Azrad --- drivers/net/mlx5/mlx5.h | 1 + drivers/net/mlx5/mlx5_rxq.c | 37 ++++++++++++++++++++++++++++++++++++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 1dc8b7c..24fe817 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -624,6 +624,7 @@ struct mlx5_priv { struct ibv_flow_action *verbs_action; /**< Verbs modify header action object. */ uint8_t ft_type; /**< Flow table type, Rx or Tx. */ + uint8_t max_lro_msg_size; /* Tags resources cache. */ uint32_t link_speed_capa; /* Link speed capabilities. */ struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */ diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 7c252e3..51b2f00 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1544,6 +1544,39 @@ struct mlx5_rxq_obj * } /** + * Adjust the maximum LRO massage size. + * LRO massage is contained in the MPRQ strides. + * While the LRO massage size cannot be bigger than 65280 according to the + * PRM, the strides which contain it may be bigger. + * Adjust the maximum LRO massage size to avoid the above option. + * + * @param dev + * Pointer to Ethernet device. + * @param strd_n + * Number of strides per WQE.. + * @param strd_sz + * The stride size. + */ +static void +mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint32_t strd_n, + uint32_t strd_sz) +{ + struct mlx5_priv *priv = dev->data->dev_private; + uint32_t max_buf_len = strd_sz * strd_n; + + if (max_buf_len > (uint64_t)UINT16_MAX) + max_buf_len = RTE_ALIGN_FLOOR((uint32_t)UINT16_MAX, strd_sz); + max_buf_len /= 256; + max_buf_len = RTE_MIN(max_buf_len, (uint32_t)UINT8_MAX); + assert(max_buf_len); + if (priv->max_lro_msg_size) + priv->max_lro_msg_size = + RTE_MIN((uint32_t)priv->max_lro_msg_size, max_buf_len); + else + priv->max_lro_msg_size = max_buf_len; +} + +/** * Create a DPDK Rx queue. * * @param dev @@ -1626,6 +1659,8 @@ struct mlx5_rxq_ctrl * tmpl->rxq.strd_headroom_en = strd_headroom_en; tmpl->rxq.mprq_max_memcpy_len = RTE_MIN(mb_len - RTE_PKTMBUF_HEADROOM, config->mprq.max_memcpy_len); + mlx5_max_lro_msg_size_adjust(dev, (1 << tmpl->rxq.strd_num_n), + (1 << tmpl->rxq.strd_sz_n)); DRV_LOG(DEBUG, "port %u Rx queue %u: Multi-Packet RQ is enabled" " strd_num_n = %u, strd_sz_n = %u", @@ -2168,7 +2203,7 @@ struct mlx5_hrxq * if (lro) { tir_attr.lro_timeout_period_usecs = priv->config.lro.timeout; - tir_attr.lro_max_msg_sz = 0xff; + tir_attr.lro_max_msg_sz = priv->max_lro_msg_size; tir_attr.lro_enable_mask = lro; } tir = mlx5_devx_cmd_create_tir(priv->sh->ctx, &tir_attr); -- 1.8.3.1