* [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner
@ 2019-07-30 15:48 Chris Wilson
2019-07-30 16:24 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (8 more replies)
0 siblings, 9 replies; 14+ messages in thread
From: Chris Wilson @ 2019-07-30 15:48 UTC (permalink / raw)
To: intel-gfx
Teach igt_spinner to only use our internal structs, decoupling the
interface from the GEM contexts. This makes it easier to avoid
requiring ce->gem_context back references for kernel_context that may
have them in future.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
.../drm/i915/gem/selftests/i915_gem_context.c | 43 +++----
drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++--------
.../gpu/drm/i915/gt/selftest_workarounds.c | 23 +++-
drivers/gpu/drm/i915/selftests/igt_spinner.c | 32 +++--
drivers/gpu/drm/i915/selftests/igt_spinner.h | 6 +-
5 files changed, 119 insertions(+), 100 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 7f9f6701b32c..c24430352a38 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -821,8 +821,7 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
#define TEST_RESET BIT(2)
static int
-__sseu_prepare(struct drm_i915_private *i915,
- const char *name,
+__sseu_prepare(const char *name,
unsigned int flags,
struct intel_context *ce,
struct igt_spinner **spin)
@@ -838,14 +837,11 @@ __sseu_prepare(struct drm_i915_private *i915,
if (!*spin)
return -ENOMEM;
- ret = igt_spinner_init(*spin, i915);
+ ret = igt_spinner_init(*spin, ce->engine->gt);
if (ret)
goto err_free;
- rq = igt_spinner_create_request(*spin,
- ce->gem_context,
- ce->engine,
- MI_NOOP);
+ rq = igt_spinner_create_request(*spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
goto err_fini;
@@ -871,8 +867,7 @@ __sseu_prepare(struct drm_i915_private *i915,
}
static int
-__read_slice_count(struct drm_i915_private *i915,
- struct intel_context *ce,
+__read_slice_count(struct intel_context *ce,
struct drm_i915_gem_object *obj,
struct igt_spinner *spin,
u32 *rpcs)
@@ -901,7 +896,7 @@ __read_slice_count(struct drm_i915_private *i915,
return ret;
}
- if (INTEL_GEN(i915) >= 11) {
+ if (INTEL_GEN(ce->engine->i915) >= 11) {
s_mask = GEN11_RPCS_S_CNT_MASK;
s_shift = GEN11_RPCS_S_CNT_SHIFT;
} else {
@@ -944,8 +939,7 @@ __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
}
static int
-__sseu_finish(struct drm_i915_private *i915,
- const char *name,
+__sseu_finish(const char *name,
unsigned int flags,
struct intel_context *ce,
struct drm_i915_gem_object *obj,
@@ -962,14 +956,13 @@ __sseu_finish(struct drm_i915_private *i915,
goto out;
}
- ret = __read_slice_count(i915, ce, obj,
+ ret = __read_slice_count(ce, obj,
flags & TEST_RESET ? NULL : spin, &rpcs);
ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
if (ret)
goto out;
- ret = __read_slice_count(i915, ce->engine->kernel_context, obj,
- NULL, &rpcs);
+ ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
out:
@@ -977,11 +970,12 @@ __sseu_finish(struct drm_i915_private *i915,
igt_spinner_end(spin);
if ((flags & TEST_IDLE) && ret == 0) {
- ret = i915_gem_wait_for_idle(i915, 0, MAX_SCHEDULE_TIMEOUT);
+ ret = i915_gem_wait_for_idle(ce->engine->i915,
+ 0, MAX_SCHEDULE_TIMEOUT);
if (ret)
return ret;
- ret = __read_slice_count(i915, ce, obj, NULL, &rpcs);
+ ret = __read_slice_count(ce, obj, NULL, &rpcs);
ret = __check_rpcs(name, rpcs, ret, expected,
"Context", " after idle!");
}
@@ -990,8 +984,7 @@ __sseu_finish(struct drm_i915_private *i915,
}
static int
-__sseu_test(struct drm_i915_private *i915,
- const char *name,
+__sseu_test(const char *name,
unsigned int flags,
struct intel_context *ce,
struct drm_i915_gem_object *obj,
@@ -1000,7 +993,7 @@ __sseu_test(struct drm_i915_private *i915,
struct igt_spinner *spin = NULL;
int ret;
- ret = __sseu_prepare(i915, name, flags, ce, &spin);
+ ret = __sseu_prepare(name, flags, ce, &spin);
if (ret)
return ret;
@@ -1008,7 +1001,7 @@ __sseu_test(struct drm_i915_private *i915,
if (ret)
goto out_spin;
- ret = __sseu_finish(i915, name, flags, ce, obj,
+ ret = __sseu_finish(name, flags, ce, obj,
hweight32(sseu.slice_mask), spin);
out_spin:
@@ -1088,22 +1081,22 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
goto out_context;
/* First set the default mask. */
- ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
+ ret = __sseu_test(name, flags, ce, obj, engine->sseu);
if (ret)
goto out_fail;
/* Then set a power-gated configuration. */
- ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
+ ret = __sseu_test(name, flags, ce, obj, pg_sseu);
if (ret)
goto out_fail;
/* Back to defaults. */
- ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
+ ret = __sseu_test(name, flags, ce, obj, engine->sseu);
if (ret)
goto out_fail;
/* One last power-gated configuration for the road. */
- ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
+ ret = __sseu_test(name, flags, ce, obj, pg_sseu);
if (ret)
goto out_fail;
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 60f27e52d267..b40b57d2daae 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -22,9 +22,9 @@
static int live_sanitycheck(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct intel_engine_cs *engine;
+ struct i915_gem_engines_iter it;
struct i915_gem_context *ctx;
- enum intel_engine_id id;
+ struct intel_context *ce;
struct igt_spinner spin;
intel_wakeref_t wakeref;
int err = -ENOMEM;
@@ -35,17 +35,17 @@ static int live_sanitycheck(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin, i915))
+ if (igt_spinner_init(&spin, &i915->gt))
goto err_unlock;
ctx = kernel_context(i915);
if (!ctx)
goto err_spin;
- for_each_engine(engine, i915, id) {
+ for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
struct i915_request *rq;
- rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx;
@@ -69,6 +69,7 @@ static int live_sanitycheck(void *arg)
err = 0;
err_ctx:
+ i915_gem_context_unlock_engines(ctx);
kernel_context_close(ctx);
err_spin:
igt_spinner_fini(&spin);
@@ -480,6 +481,24 @@ static int live_busywait_preempt(void *arg)
return err;
}
+static struct i915_request *
+spinner_create_request(struct igt_spinner *spin,
+ struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ u32 arb)
+{
+ struct intel_context *ce;
+ struct i915_request *rq;
+
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ if (IS_ERR(ce))
+ return ERR_CAST(ce);
+
+ rq = igt_spinner_create_request(spin, ce, arb);
+ intel_context_put(ce);
+ return rq;
+}
+
static int live_preempt(void *arg)
{
struct drm_i915_private *i915 = arg;
@@ -499,10 +518,10 @@ static int live_preempt(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -529,8 +548,8 @@ static int live_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -545,8 +564,8 @@ static int live_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
@@ -603,10 +622,10 @@ static int live_late_preempt(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -632,8 +651,8 @@ static int live_late_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -645,8 +664,8 @@ static int live_late_preempt(void *arg)
goto err_wedged;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_NOOP);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_NOOP);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
@@ -711,7 +730,7 @@ static int preempt_client_init(struct drm_i915_private *i915,
if (!c->ctx)
return -ENOMEM;
- if (igt_spinner_init(&c->spin, i915))
+ if (igt_spinner_init(&c->spin, &i915->gt))
goto err_ctx;
return 0;
@@ -761,9 +780,9 @@ static int live_nopreempt(void *arg)
engine->execlists.preempt_hang.count = 0;
- rq_a = igt_spinner_create_request(&a.spin,
- a.ctx, engine,
- MI_ARB_CHECK);
+ rq_a = spinner_create_request(&a.spin,
+ a.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq_a)) {
err = PTR_ERR(rq_a);
goto err_client_b;
@@ -778,9 +797,9 @@ static int live_nopreempt(void *arg)
goto err_wedged;
}
- rq_b = igt_spinner_create_request(&b.spin,
- b.ctx, engine,
- MI_ARB_CHECK);
+ rq_b = spinner_create_request(&b.spin,
+ b.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq_b)) {
err = PTR_ERR(rq_b);
goto err_client_b;
@@ -880,9 +899,9 @@ static int live_suppress_self_preempt(void *arg)
engine->execlists.preempt_hang.count = 0;
- rq_a = igt_spinner_create_request(&a.spin,
- a.ctx, engine,
- MI_NOOP);
+ rq_a = spinner_create_request(&a.spin,
+ a.ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq_a)) {
err = PTR_ERR(rq_a);
goto err_client_b;
@@ -895,9 +914,9 @@ static int live_suppress_self_preempt(void *arg)
}
for (depth = 0; depth < 8; depth++) {
- rq_b = igt_spinner_create_request(&b.spin,
- b.ctx, engine,
- MI_NOOP);
+ rq_b = spinner_create_request(&b.spin,
+ b.ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq_b)) {
err = PTR_ERR(rq_b);
goto err_client_b;
@@ -1048,9 +1067,9 @@ static int live_suppress_wait_preempt(void *arg)
goto err_client_3;
for (i = 0; i < ARRAY_SIZE(client); i++) {
- rq[i] = igt_spinner_create_request(&client[i].spin,
- client[i].ctx, engine,
- MI_NOOP);
+ rq[i] = spinner_create_request(&client[i].spin,
+ client[i].ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq[i])) {
err = PTR_ERR(rq[i]);
goto err_wedged;
@@ -1157,9 +1176,9 @@ static int live_chain_preempt(void *arg)
if (!intel_engine_has_preemption(engine))
continue;
- rq = igt_spinner_create_request(&lo.spin,
- lo.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
@@ -1183,18 +1202,18 @@ static int live_chain_preempt(void *arg)
}
for_each_prime_number_from(count, 1, ring_size) {
- rq = igt_spinner_create_request(&hi.spin,
- hi.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&hi.spin,
+ hi.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
if (!igt_wait_for_spinner(&hi.spin, rq))
goto err_wedged;
- rq = igt_spinner_create_request(&lo.spin,
- lo.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
@@ -1284,10 +1303,10 @@ static int live_preempt_hang(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -1308,8 +1327,8 @@ static int live_preempt_hang(void *arg)
if (!intel_engine_has_preemption(engine))
continue;
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -1324,8 +1343,8 @@ static int live_preempt_hang(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ab147985fa74..fc059ab3d3f7 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -238,6 +238,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
struct igt_spinner *spin)
{
struct i915_gem_context *ctx;
+ struct intel_context *ce;
struct i915_request *rq;
intel_wakeref_t wakeref;
int err = 0;
@@ -248,10 +249,14 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ GEM_BUG_ON(IS_ERR(ce));
+
rq = ERR_PTR(-ENODEV);
with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)
- rq = igt_spinner_create_request(spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(spin, ce,MI_NOOP);
+ intel_context_put(ce);
kernel_context_close(ctx);
if (IS_ERR(rq)) {
@@ -291,7 +296,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
if (IS_ERR(ctx))
return PTR_ERR(ctx);
- err = igt_spinner_init(&spin, i915);
+ err = igt_spinner_init(&spin, engine->gt);
if (err)
goto out_ctx;
@@ -1165,6 +1170,7 @@ live_engine_reset_workarounds(void *arg)
reference_lists_init(i915, &lists);
for_each_engine(engine, i915, id) {
+ struct intel_context *ce;
bool ok;
pr_info("Verifying after %s reset...\n", engine->name);
@@ -1183,11 +1189,16 @@ live_engine_reset_workarounds(void *arg)
goto err;
}
- ret = igt_spinner_init(&spin, i915);
- if (ret)
- goto err;
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ if (IS_ERR(ce))
+ continue;
- rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
+ ret = igt_spinner_init(&spin, engine->gt);
+ if (!ret)
+ rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+ else
+ rq = ERR_PTR(ret);
+ intel_context_put(ce);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
igt_spinner_fini(&spin);
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 89b6552a6497..fe907ab2559f 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -9,25 +9,24 @@
#include "igt_spinner.h"
-int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
+int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
{
unsigned int mode;
void *vaddr;
int err;
- GEM_BUG_ON(INTEL_GEN(i915) < 8);
+ GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
memset(spin, 0, sizeof(*spin));
- spin->i915 = i915;
- spin->gt = &i915->gt;
+ spin->gt = gt;
- spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->hws)) {
err = PTR_ERR(spin->hws);
goto err;
}
- spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->obj)) {
err = PTR_ERR(spin->obj);
goto err_hws;
@@ -41,7 +40,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
}
spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
- mode = i915_coherent_map_type(i915);
+ mode = i915_coherent_map_type(gt->i915);
vaddr = i915_gem_object_pin_map(spin->obj, mode);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
@@ -87,8 +86,7 @@ static int move_to_active(struct i915_vma *vma,
struct i915_request *
igt_spinner_create_request(struct igt_spinner *spin,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
+ struct intel_context *ce,
u32 arbitration_command)
{
struct i915_request *rq = NULL;
@@ -96,13 +94,13 @@ igt_spinner_create_request(struct igt_spinner *spin,
u32 *batch;
int err;
- spin->gt = engine->gt;
+ GEM_BUG_ON(spin->gt != ce->vm->gt);
- vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
+ vma = i915_vma_instance(spin->obj, ce->vm, NULL);
if (IS_ERR(vma))
return ERR_CAST(vma);
- hws = i915_vma_instance(spin->hws, ctx->vm, NULL);
+ hws = i915_vma_instance(spin->hws, ce->vm, NULL);
if (IS_ERR(hws))
return ERR_CAST(hws);
@@ -114,7 +112,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
if (err)
goto unpin_vma;
- rq = igt_request_alloc(ctx, engine);
+ rq = intel_context_create_request(ce);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto unpin_hws;
@@ -142,16 +140,16 @@ igt_spinner_create_request(struct igt_spinner *spin,
*batch++ = upper_32_bits(vma->node.start);
*batch++ = MI_BATCH_BUFFER_END; /* not reached */
- intel_gt_chipset_flush(engine->gt);
+ intel_gt_chipset_flush(rq->engine->gt);
- if (engine->emit_init_breadcrumb &&
+ if (rq->engine->emit_init_breadcrumb &&
rq->timeline->has_initial_breadcrumb) {
- err = engine->emit_init_breadcrumb(rq);
+ err = rq->engine->emit_init_breadcrumb(rq);
if (err)
goto cancel_rq;
}
- err = engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0);
+ err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0);
cancel_rq:
if (err) {
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
index 1bfc39efa773..ec62c9ef320b 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
@@ -17,7 +17,6 @@
struct intel_gt;
struct igt_spinner {
- struct drm_i915_private *i915;
struct intel_gt *gt;
struct drm_i915_gem_object *hws;
struct drm_i915_gem_object *obj;
@@ -25,13 +24,12 @@ struct igt_spinner {
void *seqno;
};
-int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915);
+int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
void igt_spinner_fini(struct igt_spinner *spin);
struct i915_request *
igt_spinner_create_request(struct igt_spinner *spin,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
+ struct intel_context *ce,
u32 arbitration_command);
void igt_spinner_end(struct igt_spinner *spin);
--
2.22.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
@ 2019-07-30 16:24 ` Patchwork
2019-07-30 16:45 ` ✓ Fi.CI.BAT: success " Patchwork
` (7 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-07-30 16:24 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Pass intel_context to igt_spinner
URL : https://patchwork.freedesktop.org/series/64440/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b93d1639435b drm/i915/selftests: Pass intel_context to igt_spinner
-:469: ERROR:SPACING: space required after that ',' (ctx:VxV)
#469: FILE: drivers/gpu/drm/i915/gt/selftest_workarounds.c:257:
+ rq = igt_spinner_create_request(spin, ce,MI_NOOP);
^
total: 1 errors, 0 warnings, 0 checks, 564 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
2019-07-30 16:24 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2019-07-30 16:45 ` Patchwork
2019-07-31 4:23 ` ✓ Fi.CI.IGT: " Patchwork
` (6 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-07-30 16:45 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Pass intel_context to igt_spinner
URL : https://patchwork.freedesktop.org/series/64440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6582 -> Patchwork_13804
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/
Known issues
------------
Here are the changes found in Patchwork_13804 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#109100])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-icl-u3/igt@gem_ctx_create@basic-files.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-icl-u3/igt@gem_ctx_create@basic-files.html
- fi-cml-u: [PASS][3] -> [INCOMPLETE][4] ([fdo#110566])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-cml-u/igt@gem_ctx_create@basic-files.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-cml-u/igt@gem_ctx_create@basic-files.html
* igt@gem_exec_reloc@basic-gtt-noreloc:
- fi-icl-dsi: [PASS][5] -> [DMESG-WARN][6] ([fdo#106107])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-icl-dsi/igt@gem_exec_reloc@basic-gtt-noreloc.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-icl-dsi/igt@gem_exec_reloc@basic-gtt-noreloc.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [PASS][7] -> [INCOMPLETE][8] ([fdo#107718])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq: [PASS][9] -> [FAIL][10] ([fdo#108511])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
- fi-skl-6600u: [PASS][11] -> [INCOMPLETE][12] ([fdo#107807])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
* igt@kms_busy@basic-flip-a:
- fi-kbl-7567u: [PASS][13] -> [SKIP][14] ([fdo#109271] / [fdo#109278]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
#### Possible fixes ####
* igt@i915_selftest@live_blt:
- fi-icl-dsi: [INCOMPLETE][15] ([fdo#107713]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-icl-dsi/igt@i915_selftest@live_blt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-icl-dsi/igt@i915_selftest@live_blt.html
* igt@kms_busy@basic-flip-c:
- fi-kbl-7500u: [SKIP][17] ([fdo#109271] / [fdo#109278]) -> [PASS][18] +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][19] ([fdo#109485]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
Participating hosts (53 -> 44)
------------------------------
Additional (1): fi-icl-u2
Missing (10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6582 -> Patchwork_13804
CI-20190529: 20190529
CI_DRM_6582: baef11a342abaa746712654a99bd33a11f8f61a3 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5115: 21be7a02ac8a8ff46b561c36a69e4dd5a0c2938b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13804: b93d1639435b2e77b52e02b8637fa0a63c772b14 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b93d1639435b drm/i915/selftests: Pass intel_context to igt_spinner
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
2019-07-30 16:24 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-07-30 16:45 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-07-31 4:23 ` Patchwork
2019-07-31 5:55 ` [PATCH] " Tvrtko Ursulin
` (5 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-07-31 4:23 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Pass intel_context to igt_spinner
URL : https://patchwork.freedesktop.org/series/64440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6582_full -> Patchwork_13804_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13804_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +6 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-kbl6/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110854])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb4/igt@gem_exec_balancer@smoke.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb6/igt@gem_exec_balancer@smoke.html
* igt@gem_tiled_swapping@non-threaded:
- shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108686])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-apl2/igt@gem_tiled_swapping@non-threaded.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-apl1/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_pm_rpm@fences-dpms:
- shard-iclb: [PASS][7] -> [INCOMPLETE][8] ([fdo#107713] / [fdo#108840])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb4/igt@i915_pm_rpm@fences-dpms.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb2/igt@i915_pm_rpm@fences-dpms.html
* igt@kms_big_fb@linear-16bpp-rotate-0:
- shard-snb: [PASS][9] -> [SKIP][10] ([fdo#109271])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-snb7/igt@kms_big_fb@linear-16bpp-rotate-0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-snb7/igt@kms_big_fb@linear-16bpp-rotate-0.html
* igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque:
- shard-kbl: [PASS][11] -> [FAIL][12] ([fdo#103232])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-apl: [PASS][13] -> [FAIL][14] ([fdo#105363])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-apl1/igt@kms_flip@flip-vs-expired-vblank.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-apl3/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend:
- shard-hsw: [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-hsw6/igt@kms_flip@flip-vs-suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-hsw7/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#103167]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][21] -> [DMESG-WARN][22] ([fdo#108566]) +3 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb2/igt@kms_psr@psr2_basic.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb3/igt@kms_psr@psr2_basic.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][27] -> [FAIL][28] ([fdo#99912])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-apl1/igt@kms_setmode@basic.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-apl5/igt@kms_setmode@basic.html
* igt@perf@blocking:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#110728])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-skl3/igt@perf@blocking.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-skl5/igt@perf@blocking.html
#### Possible fixes ####
* igt@gem_exec_flush@basic-wb-set-default:
- shard-iclb: [INCOMPLETE][31] ([fdo#107713]) -> [PASS][32] +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb7/igt@gem_exec_flush@basic-wb-set-default.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb2/igt@gem_exec_flush@basic-wb-set-default.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-kbl: [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-kbl6/igt@gem_workarounds@suspend-resume-fd.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html
* igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-ytiled:
- shard-skl: [FAIL][35] ([fdo#103184] / [fdo#103232]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-skl8/igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-ytiled.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-pwrite-ytiled.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: [DMESG-WARN][37] ([fdo#108566]) -> [PASS][38] +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [FAIL][39] ([fdo#103167]) -> [PASS][40] +4 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][41] ([fdo#108145] / [fdo#110403]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][43] ([fdo#103166]) -> [PASS][44] +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@no_drrs:
- shard-iclb: [FAIL][45] ([fdo#108341]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb1/igt@kms_psr@no_drrs.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb8/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][47] ([fdo#109441]) -> [PASS][48] +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-kbl: [FAIL][49] ([fdo#99912]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-kbl1/igt@kms_setmode@basic.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-kbl4/igt@kms_setmode@basic.html
#### Warnings ####
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][51] ([fdo#107724]) -> [SKIP][52] ([fdo#109349])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6582/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/shard-iclb8/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6582 -> Patchwork_13804
CI-20190529: 20190529
CI_DRM_6582: baef11a342abaa746712654a99bd33a11f8f61a3 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5115: 21be7a02ac8a8ff46b561c36a69e4dd5a0c2938b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13804: b93d1639435b2e77b52e02b8637fa0a63c772b14 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13804/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (2 preceding siblings ...)
2019-07-31 4:23 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-07-31 5:55 ` Tvrtko Ursulin
2019-07-31 6:56 ` Chris Wilson
2019-07-31 7:00 ` [PATCH v2] " Chris Wilson
` (4 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Tvrtko Ursulin @ 2019-07-31 5:55 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 30/07/2019 16:48, Chris Wilson wrote:
> Teach igt_spinner to only use our internal structs, decoupling the
> interface from the GEM contexts. This makes it easier to avoid
> requiring ce->gem_context back references for kernel_context that may
> have them in future.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> .../drm/i915/gem/selftests/i915_gem_context.c | 43 +++----
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++--------
> .../gpu/drm/i915/gt/selftest_workarounds.c | 23 +++-
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 32 +++--
> drivers/gpu/drm/i915/selftests/igt_spinner.h | 6 +-
> 5 files changed, 119 insertions(+), 100 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> index 7f9f6701b32c..c24430352a38 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> @@ -821,8 +821,7 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
> #define TEST_RESET BIT(2)
>
> static int
> -__sseu_prepare(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_prepare(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct igt_spinner **spin)
> @@ -838,14 +837,11 @@ __sseu_prepare(struct drm_i915_private *i915,
> if (!*spin)
> return -ENOMEM;
>
> - ret = igt_spinner_init(*spin, i915);
> + ret = igt_spinner_init(*spin, ce->engine->gt);
> if (ret)
> goto err_free;
>
> - rq = igt_spinner_create_request(*spin,
> - ce->gem_context,
> - ce->engine,
> - MI_NOOP);
> + rq = igt_spinner_create_request(*spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> ret = PTR_ERR(rq);
> goto err_fini;
> @@ -871,8 +867,7 @@ __sseu_prepare(struct drm_i915_private *i915,
> }
>
> static int
> -__read_slice_count(struct drm_i915_private *i915,
> - struct intel_context *ce,
> +__read_slice_count(struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> struct igt_spinner *spin,
> u32 *rpcs)
> @@ -901,7 +896,7 @@ __read_slice_count(struct drm_i915_private *i915,
> return ret;
> }
>
> - if (INTEL_GEN(i915) >= 11) {
> + if (INTEL_GEN(ce->engine->i915) >= 11) {
> s_mask = GEN11_RPCS_S_CNT_MASK;
> s_shift = GEN11_RPCS_S_CNT_SHIFT;
> } else {
> @@ -944,8 +939,7 @@ __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
> }
>
> static int
> -__sseu_finish(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_finish(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> @@ -962,14 +956,13 @@ __sseu_finish(struct drm_i915_private *i915,
> goto out;
> }
>
> - ret = __read_slice_count(i915, ce, obj,
> + ret = __read_slice_count(ce, obj,
> flags & TEST_RESET ? NULL : spin, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
> if (ret)
> goto out;
>
> - ret = __read_slice_count(i915, ce->engine->kernel_context, obj,
> - NULL, &rpcs);
> + ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
>
> out:
> @@ -977,11 +970,12 @@ __sseu_finish(struct drm_i915_private *i915,
> igt_spinner_end(spin);
>
> if ((flags & TEST_IDLE) && ret == 0) {
> - ret = i915_gem_wait_for_idle(i915, 0, MAX_SCHEDULE_TIMEOUT);
> + ret = i915_gem_wait_for_idle(ce->engine->i915,
> + 0, MAX_SCHEDULE_TIMEOUT);
> if (ret)
> return ret;
>
> - ret = __read_slice_count(i915, ce, obj, NULL, &rpcs);
> + ret = __read_slice_count(ce, obj, NULL, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, expected,
> "Context", " after idle!");
> }
> @@ -990,8 +984,7 @@ __sseu_finish(struct drm_i915_private *i915,
> }
>
> static int
> -__sseu_test(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_test(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> @@ -1000,7 +993,7 @@ __sseu_test(struct drm_i915_private *i915,
> struct igt_spinner *spin = NULL;
> int ret;
>
> - ret = __sseu_prepare(i915, name, flags, ce, &spin);
> + ret = __sseu_prepare(name, flags, ce, &spin);
> if (ret)
> return ret;
>
> @@ -1008,7 +1001,7 @@ __sseu_test(struct drm_i915_private *i915,
> if (ret)
> goto out_spin;
>
> - ret = __sseu_finish(i915, name, flags, ce, obj,
> + ret = __sseu_finish(name, flags, ce, obj,
> hweight32(sseu.slice_mask), spin);
>
> out_spin:
> @@ -1088,22 +1081,22 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
> goto out_context;
>
> /* First set the default mask. */
> - ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
> + ret = __sseu_test(name, flags, ce, obj, engine->sseu);
> if (ret)
> goto out_fail;
>
> /* Then set a power-gated configuration. */
> - ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
> + ret = __sseu_test(name, flags, ce, obj, pg_sseu);
> if (ret)
> goto out_fail;
>
> /* Back to defaults. */
> - ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
> + ret = __sseu_test(name, flags, ce, obj, engine->sseu);
> if (ret)
> goto out_fail;
>
> /* One last power-gated configuration for the road. */
> - ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
> + ret = __sseu_test(name, flags, ce, obj, pg_sseu);
> if (ret)
> goto out_fail;
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 60f27e52d267..b40b57d2daae 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -22,9 +22,9 @@
> static int live_sanitycheck(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct intel_engine_cs *engine;
> + struct i915_gem_engines_iter it;
> struct i915_gem_context *ctx;
> - enum intel_engine_id id;
> + struct intel_context *ce;
> struct igt_spinner spin;
> intel_wakeref_t wakeref;
> int err = -ENOMEM;
> @@ -35,17 +35,17 @@ static int live_sanitycheck(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin, i915))
> + if (igt_spinner_init(&spin, &i915->gt))
> goto err_unlock;
>
> ctx = kernel_context(i915);
> if (!ctx)
> goto err_spin;
>
> - for_each_engine(engine, i915, id) {
> + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> struct i915_request *rq;
>
> - rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx;
> @@ -69,6 +69,7 @@ static int live_sanitycheck(void *arg)
>
> err = 0;
> err_ctx:
> + i915_gem_context_unlock_engines(ctx);
> kernel_context_close(ctx);
> err_spin:
> igt_spinner_fini(&spin);
> @@ -480,6 +481,24 @@ static int live_busywait_preempt(void *arg)
> return err;
> }
>
> +static struct i915_request *
> +spinner_create_request(struct igt_spinner *spin,
> + struct i915_gem_context *ctx,
> + struct intel_engine_cs *engine,
> + u32 arb)
> +{
> + struct intel_context *ce;
> + struct i915_request *rq;
> +
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + if (IS_ERR(ce))
> + return ERR_CAST(ce);
> +
> + rq = igt_spinner_create_request(spin, ce, arb);
> + intel_context_put(ce);
> + return rq;
> +}
> +
> static int live_preempt(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> @@ -499,10 +518,10 @@ static int live_preempt(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -529,8 +548,8 @@ static int live_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -545,8 +564,8 @@ static int live_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> @@ -603,10 +622,10 @@ static int live_late_preempt(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -632,8 +651,8 @@ static int live_late_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -645,8 +664,8 @@ static int live_late_preempt(void *arg)
> goto err_wedged;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_NOOP);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_NOOP);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> @@ -711,7 +730,7 @@ static int preempt_client_init(struct drm_i915_private *i915,
> if (!c->ctx)
> return -ENOMEM;
>
> - if (igt_spinner_init(&c->spin, i915))
> + if (igt_spinner_init(&c->spin, &i915->gt))
> goto err_ctx;
>
> return 0;
> @@ -761,9 +780,9 @@ static int live_nopreempt(void *arg)
>
> engine->execlists.preempt_hang.count = 0;
>
> - rq_a = igt_spinner_create_request(&a.spin,
> - a.ctx, engine,
> - MI_ARB_CHECK);
> + rq_a = spinner_create_request(&a.spin,
> + a.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq_a)) {
> err = PTR_ERR(rq_a);
> goto err_client_b;
> @@ -778,9 +797,9 @@ static int live_nopreempt(void *arg)
> goto err_wedged;
> }
>
> - rq_b = igt_spinner_create_request(&b.spin,
> - b.ctx, engine,
> - MI_ARB_CHECK);
> + rq_b = spinner_create_request(&b.spin,
> + b.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq_b)) {
> err = PTR_ERR(rq_b);
> goto err_client_b;
> @@ -880,9 +899,9 @@ static int live_suppress_self_preempt(void *arg)
>
> engine->execlists.preempt_hang.count = 0;
>
> - rq_a = igt_spinner_create_request(&a.spin,
> - a.ctx, engine,
> - MI_NOOP);
> + rq_a = spinner_create_request(&a.spin,
> + a.ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq_a)) {
> err = PTR_ERR(rq_a);
> goto err_client_b;
> @@ -895,9 +914,9 @@ static int live_suppress_self_preempt(void *arg)
> }
>
> for (depth = 0; depth < 8; depth++) {
> - rq_b = igt_spinner_create_request(&b.spin,
> - b.ctx, engine,
> - MI_NOOP);
> + rq_b = spinner_create_request(&b.spin,
> + b.ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq_b)) {
> err = PTR_ERR(rq_b);
> goto err_client_b;
> @@ -1048,9 +1067,9 @@ static int live_suppress_wait_preempt(void *arg)
> goto err_client_3;
>
> for (i = 0; i < ARRAY_SIZE(client); i++) {
> - rq[i] = igt_spinner_create_request(&client[i].spin,
> - client[i].ctx, engine,
> - MI_NOOP);
> + rq[i] = spinner_create_request(&client[i].spin,
> + client[i].ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq[i])) {
> err = PTR_ERR(rq[i]);
> goto err_wedged;
> @@ -1157,9 +1176,9 @@ static int live_chain_preempt(void *arg)
> if (!intel_engine_has_preemption(engine))
> continue;
>
> - rq = igt_spinner_create_request(&lo.spin,
> - lo.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&lo.spin,
> + lo.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> @@ -1183,18 +1202,18 @@ static int live_chain_preempt(void *arg)
> }
>
> for_each_prime_number_from(count, 1, ring_size) {
> - rq = igt_spinner_create_request(&hi.spin,
> - hi.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&hi.spin,
> + hi.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> if (!igt_wait_for_spinner(&hi.spin, rq))
> goto err_wedged;
>
> - rq = igt_spinner_create_request(&lo.spin,
> - lo.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&lo.spin,
> + lo.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> @@ -1284,10 +1303,10 @@ static int live_preempt_hang(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -1308,8 +1327,8 @@ static int live_preempt_hang(void *arg)
> if (!intel_engine_has_preemption(engine))
> continue;
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -1324,8 +1343,8 @@ static int live_preempt_hang(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index ab147985fa74..fc059ab3d3f7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -238,6 +238,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
> struct igt_spinner *spin)
> {
> struct i915_gem_context *ctx;
> + struct intel_context *ce;
> struct i915_request *rq;
> intel_wakeref_t wakeref;
> int err = 0;
> @@ -248,10 +249,14 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
>
> GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
>
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + GEM_BUG_ON(IS_ERR(ce));
> +
> rq = ERR_PTR(-ENODEV);
> with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)
> - rq = igt_spinner_create_request(spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(spin, ce,MI_NOOP);
Gasp, a mistake! ;D
>
> + intel_context_put(ce);
> kernel_context_close(ctx);
>
> if (IS_ERR(rq)) {
> @@ -291,7 +296,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
> if (IS_ERR(ctx))
> return PTR_ERR(ctx);
>
> - err = igt_spinner_init(&spin, i915);
> + err = igt_spinner_init(&spin, engine->gt);
> if (err)
> goto out_ctx;
>
> @@ -1165,6 +1170,7 @@ live_engine_reset_workarounds(void *arg)
> reference_lists_init(i915, &lists);
>
> for_each_engine(engine, i915, id) {
> + struct intel_context *ce;
> bool ok;
>
> pr_info("Verifying after %s reset...\n", engine->name);
> @@ -1183,11 +1189,16 @@ live_engine_reset_workarounds(void *arg)
> goto err;
> }
>
> - ret = igt_spinner_init(&spin, i915);
> - if (ret)
> - goto err;
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + if (IS_ERR(ce))
> + continue;
Can't instead use the for_each_gem_engine pattern as in live_sanitycheck?
>
> - rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
> + ret = igt_spinner_init(&spin, engine->gt);
> + if (!ret)
> + rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
> + else
> + rq = ERR_PTR(ret);
> + intel_context_put(ce);
> if (IS_ERR(rq)) {
> ret = PTR_ERR(rq);
> igt_spinner_fini(&spin);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 89b6552a6497..fe907ab2559f 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -9,25 +9,24 @@
>
> #include "igt_spinner.h"
>
> -int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
> +int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
> {
> unsigned int mode;
> void *vaddr;
> int err;
>
> - GEM_BUG_ON(INTEL_GEN(i915) < 8);
> + GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
>
> memset(spin, 0, sizeof(*spin));
> - spin->i915 = i915;
> - spin->gt = &i915->gt;
> + spin->gt = gt;
>
> - spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
> + spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
I'd add the i915 local.
> if (IS_ERR(spin->hws)) {
> err = PTR_ERR(spin->hws);
> goto err;
> }
>
> - spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
> + spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
> if (IS_ERR(spin->obj)) {
> err = PTR_ERR(spin->obj);
> goto err_hws;
> @@ -41,7 +40,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
> }
> spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> - mode = i915_coherent_map_type(i915);
> + mode = i915_coherent_map_type(gt->i915);
> vaddr = i915_gem_object_pin_map(spin->obj, mode);
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> @@ -87,8 +86,7 @@ static int move_to_active(struct i915_vma *vma,
>
> struct i915_request *
> igt_spinner_create_request(struct igt_spinner *spin,
> - struct i915_gem_context *ctx,
> - struct intel_engine_cs *engine,
> + struct intel_context *ce,
> u32 arbitration_command)
> {
> struct i915_request *rq = NULL;
> @@ -96,13 +94,13 @@ igt_spinner_create_request(struct igt_spinner *spin,
> u32 *batch;
> int err;
>
> - spin->gt = engine->gt;
> + GEM_BUG_ON(spin->gt != ce->vm->gt);
>
> - vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
> + vma = i915_vma_instance(spin->obj, ce->vm, NULL);
> if (IS_ERR(vma))
> return ERR_CAST(vma);
>
> - hws = i915_vma_instance(spin->hws, ctx->vm, NULL);
> + hws = i915_vma_instance(spin->hws, ce->vm, NULL);
> if (IS_ERR(hws))
> return ERR_CAST(hws);
>
> @@ -114,7 +112,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
> if (err)
> goto unpin_vma;
>
> - rq = igt_request_alloc(ctx, engine);
> + rq = intel_context_create_request(ce);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto unpin_hws;
> @@ -142,16 +140,16 @@ igt_spinner_create_request(struct igt_spinner *spin,
> *batch++ = upper_32_bits(vma->node.start);
> *batch++ = MI_BATCH_BUFFER_END; /* not reached */
>
> - intel_gt_chipset_flush(engine->gt);
> + intel_gt_chipset_flush(rq->engine->gt);
>
> - if (engine->emit_init_breadcrumb &&
> + if (rq->engine->emit_init_breadcrumb &&
> rq->timeline->has_initial_breadcrumb) {
> - err = engine->emit_init_breadcrumb(rq);
> + err = rq->engine->emit_init_breadcrumb(rq);
> if (err)
> goto cancel_rq;
> }
>
> - err = engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0);
> + err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0);
Equally engine local for less churn.
>
> cancel_rq:
> if (err) {
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
> index 1bfc39efa773..ec62c9ef320b 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
> @@ -17,7 +17,6 @@
> struct intel_gt;
>
> struct igt_spinner {
> - struct drm_i915_private *i915;
> struct intel_gt *gt;
> struct drm_i915_gem_object *hws;
> struct drm_i915_gem_object *obj;
> @@ -25,13 +24,12 @@ struct igt_spinner {
> void *seqno;
> };
>
> -int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915);
> +int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
> void igt_spinner_fini(struct igt_spinner *spin);
>
> struct i915_request *
> igt_spinner_create_request(struct igt_spinner *spin,
> - struct i915_gem_context *ctx,
> - struct intel_engine_cs *engine,
> + struct intel_context *ce,
> u32 arbitration_command);
> void igt_spinner_end(struct igt_spinner *spin);
>
>
Worksforme.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-31 5:55 ` [PATCH] " Tvrtko Ursulin
@ 2019-07-31 6:56 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-07-31 6:56 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx
Quoting Tvrtko Ursulin (2019-07-31 06:55:23)
>
> On 30/07/2019 16:48, Chris Wilson wrote:
> > @@ -1183,11 +1189,16 @@ live_engine_reset_workarounds(void *arg)
> > goto err;
> > }
> >
> > - ret = igt_spinner_init(&spin, i915);
> > - if (ret)
> > - goto err;
> > + ce = i915_gem_context_get_engine(ctx, engine->id);
> > + if (IS_ERR(ce))
> > + continue;
>
> Can't instead use the for_each_gem_engine pattern as in live_sanitycheck?
The problem here is that the verify_wa which then also uses
for_each_gem_engine. Just needs to rejiggle the other callers so that
the context is always locked.
> > - spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
> > + spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
>
> I'd add the i915 local.
Maybe, at some point we need to pass gt into [internal] object creation.
At the moment, I like gt->i915 for being an eyesore. When there are
enough of them, it indicates which API needs adjusting next :)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (3 preceding siblings ...)
2019-07-31 5:55 ` [PATCH] " Tvrtko Ursulin
@ 2019-07-31 7:00 ` Chris Wilson
2019-07-31 7:37 ` Tvrtko Ursulin
2019-07-31 7:42 ` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Pass intel_context to igt_spinner (rev2) Patchwork
` (3 subsequent siblings)
8 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-07-31 7:00 UTC (permalink / raw)
To: intel-gfx
Teach igt_spinner to only use our internal structs, decoupling the
interface from the GEM contexts. This makes it easier to avoid
requiring ce->gem_context back references for kernel_context that may
have them in future.
v2: Lift engine lock to verify_wa() caller.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
.../drm/i915/gem/selftests/i915_gem_context.c | 43 +++----
drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++--------
.../gpu/drm/i915/gt/selftest_workarounds.c | 37 ++++--
drivers/gpu/drm/i915/selftests/igt_spinner.c | 25 ++--
drivers/gpu/drm/i915/selftests/igt_spinner.h | 6 +-
5 files changed, 124 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 7f9f6701b32c..c24430352a38 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -821,8 +821,7 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
#define TEST_RESET BIT(2)
static int
-__sseu_prepare(struct drm_i915_private *i915,
- const char *name,
+__sseu_prepare(const char *name,
unsigned int flags,
struct intel_context *ce,
struct igt_spinner **spin)
@@ -838,14 +837,11 @@ __sseu_prepare(struct drm_i915_private *i915,
if (!*spin)
return -ENOMEM;
- ret = igt_spinner_init(*spin, i915);
+ ret = igt_spinner_init(*spin, ce->engine->gt);
if (ret)
goto err_free;
- rq = igt_spinner_create_request(*spin,
- ce->gem_context,
- ce->engine,
- MI_NOOP);
+ rq = igt_spinner_create_request(*spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
goto err_fini;
@@ -871,8 +867,7 @@ __sseu_prepare(struct drm_i915_private *i915,
}
static int
-__read_slice_count(struct drm_i915_private *i915,
- struct intel_context *ce,
+__read_slice_count(struct intel_context *ce,
struct drm_i915_gem_object *obj,
struct igt_spinner *spin,
u32 *rpcs)
@@ -901,7 +896,7 @@ __read_slice_count(struct drm_i915_private *i915,
return ret;
}
- if (INTEL_GEN(i915) >= 11) {
+ if (INTEL_GEN(ce->engine->i915) >= 11) {
s_mask = GEN11_RPCS_S_CNT_MASK;
s_shift = GEN11_RPCS_S_CNT_SHIFT;
} else {
@@ -944,8 +939,7 @@ __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
}
static int
-__sseu_finish(struct drm_i915_private *i915,
- const char *name,
+__sseu_finish(const char *name,
unsigned int flags,
struct intel_context *ce,
struct drm_i915_gem_object *obj,
@@ -962,14 +956,13 @@ __sseu_finish(struct drm_i915_private *i915,
goto out;
}
- ret = __read_slice_count(i915, ce, obj,
+ ret = __read_slice_count(ce, obj,
flags & TEST_RESET ? NULL : spin, &rpcs);
ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
if (ret)
goto out;
- ret = __read_slice_count(i915, ce->engine->kernel_context, obj,
- NULL, &rpcs);
+ ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
out:
@@ -977,11 +970,12 @@ __sseu_finish(struct drm_i915_private *i915,
igt_spinner_end(spin);
if ((flags & TEST_IDLE) && ret == 0) {
- ret = i915_gem_wait_for_idle(i915, 0, MAX_SCHEDULE_TIMEOUT);
+ ret = i915_gem_wait_for_idle(ce->engine->i915,
+ 0, MAX_SCHEDULE_TIMEOUT);
if (ret)
return ret;
- ret = __read_slice_count(i915, ce, obj, NULL, &rpcs);
+ ret = __read_slice_count(ce, obj, NULL, &rpcs);
ret = __check_rpcs(name, rpcs, ret, expected,
"Context", " after idle!");
}
@@ -990,8 +984,7 @@ __sseu_finish(struct drm_i915_private *i915,
}
static int
-__sseu_test(struct drm_i915_private *i915,
- const char *name,
+__sseu_test(const char *name,
unsigned int flags,
struct intel_context *ce,
struct drm_i915_gem_object *obj,
@@ -1000,7 +993,7 @@ __sseu_test(struct drm_i915_private *i915,
struct igt_spinner *spin = NULL;
int ret;
- ret = __sseu_prepare(i915, name, flags, ce, &spin);
+ ret = __sseu_prepare(name, flags, ce, &spin);
if (ret)
return ret;
@@ -1008,7 +1001,7 @@ __sseu_test(struct drm_i915_private *i915,
if (ret)
goto out_spin;
- ret = __sseu_finish(i915, name, flags, ce, obj,
+ ret = __sseu_finish(name, flags, ce, obj,
hweight32(sseu.slice_mask), spin);
out_spin:
@@ -1088,22 +1081,22 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
goto out_context;
/* First set the default mask. */
- ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
+ ret = __sseu_test(name, flags, ce, obj, engine->sseu);
if (ret)
goto out_fail;
/* Then set a power-gated configuration. */
- ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
+ ret = __sseu_test(name, flags, ce, obj, pg_sseu);
if (ret)
goto out_fail;
/* Back to defaults. */
- ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
+ ret = __sseu_test(name, flags, ce, obj, engine->sseu);
if (ret)
goto out_fail;
/* One last power-gated configuration for the road. */
- ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
+ ret = __sseu_test(name, flags, ce, obj, pg_sseu);
if (ret)
goto out_fail;
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 60f27e52d267..b40b57d2daae 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -22,9 +22,9 @@
static int live_sanitycheck(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct intel_engine_cs *engine;
+ struct i915_gem_engines_iter it;
struct i915_gem_context *ctx;
- enum intel_engine_id id;
+ struct intel_context *ce;
struct igt_spinner spin;
intel_wakeref_t wakeref;
int err = -ENOMEM;
@@ -35,17 +35,17 @@ static int live_sanitycheck(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin, i915))
+ if (igt_spinner_init(&spin, &i915->gt))
goto err_unlock;
ctx = kernel_context(i915);
if (!ctx)
goto err_spin;
- for_each_engine(engine, i915, id) {
+ for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
struct i915_request *rq;
- rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx;
@@ -69,6 +69,7 @@ static int live_sanitycheck(void *arg)
err = 0;
err_ctx:
+ i915_gem_context_unlock_engines(ctx);
kernel_context_close(ctx);
err_spin:
igt_spinner_fini(&spin);
@@ -480,6 +481,24 @@ static int live_busywait_preempt(void *arg)
return err;
}
+static struct i915_request *
+spinner_create_request(struct igt_spinner *spin,
+ struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ u32 arb)
+{
+ struct intel_context *ce;
+ struct i915_request *rq;
+
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ if (IS_ERR(ce))
+ return ERR_CAST(ce);
+
+ rq = igt_spinner_create_request(spin, ce, arb);
+ intel_context_put(ce);
+ return rq;
+}
+
static int live_preempt(void *arg)
{
struct drm_i915_private *i915 = arg;
@@ -499,10 +518,10 @@ static int live_preempt(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -529,8 +548,8 @@ static int live_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -545,8 +564,8 @@ static int live_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
@@ -603,10 +622,10 @@ static int live_late_preempt(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -632,8 +651,8 @@ static int live_late_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -645,8 +664,8 @@ static int live_late_preempt(void *arg)
goto err_wedged;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_NOOP);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_NOOP);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
@@ -711,7 +730,7 @@ static int preempt_client_init(struct drm_i915_private *i915,
if (!c->ctx)
return -ENOMEM;
- if (igt_spinner_init(&c->spin, i915))
+ if (igt_spinner_init(&c->spin, &i915->gt))
goto err_ctx;
return 0;
@@ -761,9 +780,9 @@ static int live_nopreempt(void *arg)
engine->execlists.preempt_hang.count = 0;
- rq_a = igt_spinner_create_request(&a.spin,
- a.ctx, engine,
- MI_ARB_CHECK);
+ rq_a = spinner_create_request(&a.spin,
+ a.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq_a)) {
err = PTR_ERR(rq_a);
goto err_client_b;
@@ -778,9 +797,9 @@ static int live_nopreempt(void *arg)
goto err_wedged;
}
- rq_b = igt_spinner_create_request(&b.spin,
- b.ctx, engine,
- MI_ARB_CHECK);
+ rq_b = spinner_create_request(&b.spin,
+ b.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq_b)) {
err = PTR_ERR(rq_b);
goto err_client_b;
@@ -880,9 +899,9 @@ static int live_suppress_self_preempt(void *arg)
engine->execlists.preempt_hang.count = 0;
- rq_a = igt_spinner_create_request(&a.spin,
- a.ctx, engine,
- MI_NOOP);
+ rq_a = spinner_create_request(&a.spin,
+ a.ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq_a)) {
err = PTR_ERR(rq_a);
goto err_client_b;
@@ -895,9 +914,9 @@ static int live_suppress_self_preempt(void *arg)
}
for (depth = 0; depth < 8; depth++) {
- rq_b = igt_spinner_create_request(&b.spin,
- b.ctx, engine,
- MI_NOOP);
+ rq_b = spinner_create_request(&b.spin,
+ b.ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq_b)) {
err = PTR_ERR(rq_b);
goto err_client_b;
@@ -1048,9 +1067,9 @@ static int live_suppress_wait_preempt(void *arg)
goto err_client_3;
for (i = 0; i < ARRAY_SIZE(client); i++) {
- rq[i] = igt_spinner_create_request(&client[i].spin,
- client[i].ctx, engine,
- MI_NOOP);
+ rq[i] = spinner_create_request(&client[i].spin,
+ client[i].ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq[i])) {
err = PTR_ERR(rq[i]);
goto err_wedged;
@@ -1157,9 +1176,9 @@ static int live_chain_preempt(void *arg)
if (!intel_engine_has_preemption(engine))
continue;
- rq = igt_spinner_create_request(&lo.spin,
- lo.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
@@ -1183,18 +1202,18 @@ static int live_chain_preempt(void *arg)
}
for_each_prime_number_from(count, 1, ring_size) {
- rq = igt_spinner_create_request(&hi.spin,
- hi.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&hi.spin,
+ hi.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
if (!igt_wait_for_spinner(&hi.spin, rq))
goto err_wedged;
- rq = igt_spinner_create_request(&lo.spin,
- lo.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
@@ -1284,10 +1303,10 @@ static int live_preempt_hang(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -1308,8 +1327,8 @@ static int live_preempt_hang(void *arg)
if (!intel_engine_has_preemption(engine))
continue;
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -1324,8 +1343,8 @@ static int live_preempt_hang(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ab147985fa74..dae9b1581d92 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -238,6 +238,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
struct igt_spinner *spin)
{
struct i915_gem_context *ctx;
+ struct intel_context *ce;
struct i915_request *rq;
intel_wakeref_t wakeref;
int err = 0;
@@ -248,10 +249,14 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ GEM_BUG_ON(IS_ERR(ce));
+
rq = ERR_PTR(-ENODEV);
with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)
- rq = igt_spinner_create_request(spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(spin, ce, MI_NOOP);
+ intel_context_put(ce);
kernel_context_close(ctx);
if (IS_ERR(rq)) {
@@ -291,7 +296,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
if (IS_ERR(ctx))
return PTR_ERR(ctx);
- err = igt_spinner_init(&spin, i915);
+ err = igt_spinner_init(&spin, engine->gt);
if (err)
goto out_ctx;
@@ -1083,7 +1088,7 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
- for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
+ for_each_gem_engine(ce, i915_gem_context_engines(ctx), it) {
enum intel_engine_id id = ce->engine->id;
ok &= engine_wa_list_verify(ce,
@@ -1094,7 +1099,6 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
&lists->engine[id].ctx_wa_list,
str) == 0;
}
- i915_gem_context_unlock_engines(ctx);
return ok;
}
@@ -1115,6 +1119,8 @@ live_gpu_reset_workarounds(void *arg)
if (IS_ERR(ctx))
return PTR_ERR(ctx);
+ i915_gem_context_lock_engines(ctx);
+
pr_info("Verifying after GPU reset...\n");
igt_global_reset_lock(&i915->gt);
@@ -1131,6 +1137,7 @@ live_gpu_reset_workarounds(void *arg)
ok = verify_wa_lists(ctx, &lists, "after reset");
out:
+ i915_gem_context_unlock_engines(ctx);
kernel_context_close(ctx);
reference_lists_fini(i915, &lists);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
@@ -1143,10 +1150,10 @@ static int
live_engine_reset_workarounds(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct intel_engine_cs *engine;
+ struct i915_gem_engines_iter it;
struct i915_gem_context *ctx;
+ struct intel_context *ce;
struct igt_spinner spin;
- enum intel_engine_id id;
struct i915_request *rq;
intel_wakeref_t wakeref;
struct wa_lists lists;
@@ -1164,7 +1171,8 @@ live_engine_reset_workarounds(void *arg)
reference_lists_init(i915, &lists);
- for_each_engine(engine, i915, id) {
+ for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
+ struct intel_engine_cs *engine = ce->engine;
bool ok;
pr_info("Verifying after %s reset...\n", engine->name);
@@ -1183,11 +1191,16 @@ live_engine_reset_workarounds(void *arg)
goto err;
}
- ret = igt_spinner_init(&spin, i915);
- if (ret)
- goto err;
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ if (IS_ERR(ce))
+ continue;
- rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
+ ret = igt_spinner_init(&spin, engine->gt);
+ if (!ret)
+ rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+ else
+ rq = ERR_PTR(ret);
+ intel_context_put(ce);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
igt_spinner_fini(&spin);
@@ -1214,8 +1227,8 @@ live_engine_reset_workarounds(void *arg)
goto err;
}
}
-
err:
+ i915_gem_context_unlock_engines(ctx);
reference_lists_fini(i915, &lists);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
igt_global_reset_unlock(&i915->gt);
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 89b6552a6497..41acf209ffdb 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -9,25 +9,24 @@
#include "igt_spinner.h"
-int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
+int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
{
unsigned int mode;
void *vaddr;
int err;
- GEM_BUG_ON(INTEL_GEN(i915) < 8);
+ GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
memset(spin, 0, sizeof(*spin));
- spin->i915 = i915;
- spin->gt = &i915->gt;
+ spin->gt = gt;
- spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->hws)) {
err = PTR_ERR(spin->hws);
goto err;
}
- spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->obj)) {
err = PTR_ERR(spin->obj);
goto err_hws;
@@ -41,7 +40,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
}
spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
- mode = i915_coherent_map_type(i915);
+ mode = i915_coherent_map_type(gt->i915);
vaddr = i915_gem_object_pin_map(spin->obj, mode);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
@@ -87,22 +86,22 @@ static int move_to_active(struct i915_vma *vma,
struct i915_request *
igt_spinner_create_request(struct igt_spinner *spin,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
+ struct intel_context *ce,
u32 arbitration_command)
{
+ struct intel_engine_cs *engine = ce->engine;
struct i915_request *rq = NULL;
struct i915_vma *hws, *vma;
u32 *batch;
int err;
- spin->gt = engine->gt;
+ GEM_BUG_ON(spin->gt != ce->vm->gt);
- vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
+ vma = i915_vma_instance(spin->obj, ce->vm, NULL);
if (IS_ERR(vma))
return ERR_CAST(vma);
- hws = i915_vma_instance(spin->hws, ctx->vm, NULL);
+ hws = i915_vma_instance(spin->hws, ce->vm, NULL);
if (IS_ERR(hws))
return ERR_CAST(hws);
@@ -114,7 +113,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
if (err)
goto unpin_vma;
- rq = igt_request_alloc(ctx, engine);
+ rq = intel_context_create_request(ce);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto unpin_hws;
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
index 1bfc39efa773..ec62c9ef320b 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
@@ -17,7 +17,6 @@
struct intel_gt;
struct igt_spinner {
- struct drm_i915_private *i915;
struct intel_gt *gt;
struct drm_i915_gem_object *hws;
struct drm_i915_gem_object *obj;
@@ -25,13 +24,12 @@ struct igt_spinner {
void *seqno;
};
-int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915);
+int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
void igt_spinner_fini(struct igt_spinner *spin);
struct i915_request *
igt_spinner_create_request(struct igt_spinner *spin,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
+ struct intel_context *ce,
u32 arbitration_command);
void igt_spinner_end(struct igt_spinner *spin);
--
2.23.0.rc0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-31 7:00 ` [PATCH v2] " Chris Wilson
@ 2019-07-31 7:37 ` Tvrtko Ursulin
2019-07-31 8:08 ` Chris Wilson
0 siblings, 1 reply; 14+ messages in thread
From: Tvrtko Ursulin @ 2019-07-31 7:37 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 31/07/2019 08:00, Chris Wilson wrote:
> Teach igt_spinner to only use our internal structs, decoupling the
> interface from the GEM contexts. This makes it easier to avoid
> requiring ce->gem_context back references for kernel_context that may
> have them in future.
>
> v2: Lift engine lock to verify_wa() caller.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> .../drm/i915/gem/selftests/i915_gem_context.c | 43 +++----
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++--------
> .../gpu/drm/i915/gt/selftest_workarounds.c | 37 ++++--
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 25 ++--
> drivers/gpu/drm/i915/selftests/igt_spinner.h | 6 +-
> 5 files changed, 124 insertions(+), 102 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> index 7f9f6701b32c..c24430352a38 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> @@ -821,8 +821,7 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
> #define TEST_RESET BIT(2)
>
> static int
> -__sseu_prepare(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_prepare(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct igt_spinner **spin)
> @@ -838,14 +837,11 @@ __sseu_prepare(struct drm_i915_private *i915,
> if (!*spin)
> return -ENOMEM;
>
> - ret = igt_spinner_init(*spin, i915);
> + ret = igt_spinner_init(*spin, ce->engine->gt);
> if (ret)
> goto err_free;
>
> - rq = igt_spinner_create_request(*spin,
> - ce->gem_context,
> - ce->engine,
> - MI_NOOP);
> + rq = igt_spinner_create_request(*spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> ret = PTR_ERR(rq);
> goto err_fini;
> @@ -871,8 +867,7 @@ __sseu_prepare(struct drm_i915_private *i915,
> }
>
> static int
> -__read_slice_count(struct drm_i915_private *i915,
> - struct intel_context *ce,
> +__read_slice_count(struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> struct igt_spinner *spin,
> u32 *rpcs)
> @@ -901,7 +896,7 @@ __read_slice_count(struct drm_i915_private *i915,
> return ret;
> }
>
> - if (INTEL_GEN(i915) >= 11) {
> + if (INTEL_GEN(ce->engine->i915) >= 11) {
> s_mask = GEN11_RPCS_S_CNT_MASK;
> s_shift = GEN11_RPCS_S_CNT_SHIFT;
> } else {
> @@ -944,8 +939,7 @@ __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
> }
>
> static int
> -__sseu_finish(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_finish(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> @@ -962,14 +956,13 @@ __sseu_finish(struct drm_i915_private *i915,
> goto out;
> }
>
> - ret = __read_slice_count(i915, ce, obj,
> + ret = __read_slice_count(ce, obj,
> flags & TEST_RESET ? NULL : spin, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
> if (ret)
> goto out;
>
> - ret = __read_slice_count(i915, ce->engine->kernel_context, obj,
> - NULL, &rpcs);
> + ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
>
> out:
> @@ -977,11 +970,12 @@ __sseu_finish(struct drm_i915_private *i915,
> igt_spinner_end(spin);
>
> if ((flags & TEST_IDLE) && ret == 0) {
> - ret = i915_gem_wait_for_idle(i915, 0, MAX_SCHEDULE_TIMEOUT);
> + ret = i915_gem_wait_for_idle(ce->engine->i915,
> + 0, MAX_SCHEDULE_TIMEOUT);
> if (ret)
> return ret;
>
> - ret = __read_slice_count(i915, ce, obj, NULL, &rpcs);
> + ret = __read_slice_count(ce, obj, NULL, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, expected,
> "Context", " after idle!");
> }
> @@ -990,8 +984,7 @@ __sseu_finish(struct drm_i915_private *i915,
> }
>
> static int
> -__sseu_test(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_test(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> @@ -1000,7 +993,7 @@ __sseu_test(struct drm_i915_private *i915,
> struct igt_spinner *spin = NULL;
> int ret;
>
> - ret = __sseu_prepare(i915, name, flags, ce, &spin);
> + ret = __sseu_prepare(name, flags, ce, &spin);
> if (ret)
> return ret;
>
> @@ -1008,7 +1001,7 @@ __sseu_test(struct drm_i915_private *i915,
> if (ret)
> goto out_spin;
>
> - ret = __sseu_finish(i915, name, flags, ce, obj,
> + ret = __sseu_finish(name, flags, ce, obj,
> hweight32(sseu.slice_mask), spin);
>
> out_spin:
> @@ -1088,22 +1081,22 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
> goto out_context;
>
> /* First set the default mask. */
> - ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
> + ret = __sseu_test(name, flags, ce, obj, engine->sseu);
> if (ret)
> goto out_fail;
>
> /* Then set a power-gated configuration. */
> - ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
> + ret = __sseu_test(name, flags, ce, obj, pg_sseu);
> if (ret)
> goto out_fail;
>
> /* Back to defaults. */
> - ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
> + ret = __sseu_test(name, flags, ce, obj, engine->sseu);
> if (ret)
> goto out_fail;
>
> /* One last power-gated configuration for the road. */
> - ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
> + ret = __sseu_test(name, flags, ce, obj, pg_sseu);
> if (ret)
> goto out_fail;
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 60f27e52d267..b40b57d2daae 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -22,9 +22,9 @@
> static int live_sanitycheck(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct intel_engine_cs *engine;
> + struct i915_gem_engines_iter it;
> struct i915_gem_context *ctx;
> - enum intel_engine_id id;
> + struct intel_context *ce;
> struct igt_spinner spin;
> intel_wakeref_t wakeref;
> int err = -ENOMEM;
> @@ -35,17 +35,17 @@ static int live_sanitycheck(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin, i915))
> + if (igt_spinner_init(&spin, &i915->gt))
> goto err_unlock;
>
> ctx = kernel_context(i915);
> if (!ctx)
> goto err_spin;
>
> - for_each_engine(engine, i915, id) {
> + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> struct i915_request *rq;
>
> - rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx;
> @@ -69,6 +69,7 @@ static int live_sanitycheck(void *arg)
>
> err = 0;
> err_ctx:
> + i915_gem_context_unlock_engines(ctx);
> kernel_context_close(ctx);
> err_spin:
> igt_spinner_fini(&spin);
> @@ -480,6 +481,24 @@ static int live_busywait_preempt(void *arg)
> return err;
> }
>
> +static struct i915_request *
> +spinner_create_request(struct igt_spinner *spin,
> + struct i915_gem_context *ctx,
> + struct intel_engine_cs *engine,
> + u32 arb)
> +{
> + struct intel_context *ce;
> + struct i915_request *rq;
> +
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + if (IS_ERR(ce))
> + return ERR_CAST(ce);
> +
> + rq = igt_spinner_create_request(spin, ce, arb);
> + intel_context_put(ce);
> + return rq;
> +}
> +
> static int live_preempt(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> @@ -499,10 +518,10 @@ static int live_preempt(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -529,8 +548,8 @@ static int live_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -545,8 +564,8 @@ static int live_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> @@ -603,10 +622,10 @@ static int live_late_preempt(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -632,8 +651,8 @@ static int live_late_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -645,8 +664,8 @@ static int live_late_preempt(void *arg)
> goto err_wedged;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_NOOP);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_NOOP);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> @@ -711,7 +730,7 @@ static int preempt_client_init(struct drm_i915_private *i915,
> if (!c->ctx)
> return -ENOMEM;
>
> - if (igt_spinner_init(&c->spin, i915))
> + if (igt_spinner_init(&c->spin, &i915->gt))
> goto err_ctx;
>
> return 0;
> @@ -761,9 +780,9 @@ static int live_nopreempt(void *arg)
>
> engine->execlists.preempt_hang.count = 0;
>
> - rq_a = igt_spinner_create_request(&a.spin,
> - a.ctx, engine,
> - MI_ARB_CHECK);
> + rq_a = spinner_create_request(&a.spin,
> + a.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq_a)) {
> err = PTR_ERR(rq_a);
> goto err_client_b;
> @@ -778,9 +797,9 @@ static int live_nopreempt(void *arg)
> goto err_wedged;
> }
>
> - rq_b = igt_spinner_create_request(&b.spin,
> - b.ctx, engine,
> - MI_ARB_CHECK);
> + rq_b = spinner_create_request(&b.spin,
> + b.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq_b)) {
> err = PTR_ERR(rq_b);
> goto err_client_b;
> @@ -880,9 +899,9 @@ static int live_suppress_self_preempt(void *arg)
>
> engine->execlists.preempt_hang.count = 0;
>
> - rq_a = igt_spinner_create_request(&a.spin,
> - a.ctx, engine,
> - MI_NOOP);
> + rq_a = spinner_create_request(&a.spin,
> + a.ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq_a)) {
> err = PTR_ERR(rq_a);
> goto err_client_b;
> @@ -895,9 +914,9 @@ static int live_suppress_self_preempt(void *arg)
> }
>
> for (depth = 0; depth < 8; depth++) {
> - rq_b = igt_spinner_create_request(&b.spin,
> - b.ctx, engine,
> - MI_NOOP);
> + rq_b = spinner_create_request(&b.spin,
> + b.ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq_b)) {
> err = PTR_ERR(rq_b);
> goto err_client_b;
> @@ -1048,9 +1067,9 @@ static int live_suppress_wait_preempt(void *arg)
> goto err_client_3;
>
> for (i = 0; i < ARRAY_SIZE(client); i++) {
> - rq[i] = igt_spinner_create_request(&client[i].spin,
> - client[i].ctx, engine,
> - MI_NOOP);
> + rq[i] = spinner_create_request(&client[i].spin,
> + client[i].ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq[i])) {
> err = PTR_ERR(rq[i]);
> goto err_wedged;
> @@ -1157,9 +1176,9 @@ static int live_chain_preempt(void *arg)
> if (!intel_engine_has_preemption(engine))
> continue;
>
> - rq = igt_spinner_create_request(&lo.spin,
> - lo.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&lo.spin,
> + lo.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> @@ -1183,18 +1202,18 @@ static int live_chain_preempt(void *arg)
> }
>
> for_each_prime_number_from(count, 1, ring_size) {
> - rq = igt_spinner_create_request(&hi.spin,
> - hi.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&hi.spin,
> + hi.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> if (!igt_wait_for_spinner(&hi.spin, rq))
> goto err_wedged;
>
> - rq = igt_spinner_create_request(&lo.spin,
> - lo.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&lo.spin,
> + lo.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> @@ -1284,10 +1303,10 @@ static int live_preempt_hang(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -1308,8 +1327,8 @@ static int live_preempt_hang(void *arg)
> if (!intel_engine_has_preemption(engine))
> continue;
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -1324,8 +1343,8 @@ static int live_preempt_hang(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index ab147985fa74..dae9b1581d92 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -238,6 +238,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
> struct igt_spinner *spin)
> {
> struct i915_gem_context *ctx;
> + struct intel_context *ce;
> struct i915_request *rq;
> intel_wakeref_t wakeref;
> int err = 0;
> @@ -248,10 +249,14 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
>
> GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
>
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + GEM_BUG_ON(IS_ERR(ce));
> +
> rq = ERR_PTR(-ENODEV);
> with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)
> - rq = igt_spinner_create_request(spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(spin, ce, MI_NOOP);
>
> + intel_context_put(ce);
> kernel_context_close(ctx);
>
> if (IS_ERR(rq)) {
> @@ -291,7 +296,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
> if (IS_ERR(ctx))
> return PTR_ERR(ctx);
>
> - err = igt_spinner_init(&spin, i915);
> + err = igt_spinner_init(&spin, engine->gt);
> if (err)
> goto out_ctx;
>
> @@ -1083,7 +1088,7 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
>
> ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
>
> - for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> + for_each_gem_engine(ce, i915_gem_context_engines(ctx), it) {
> enum intel_engine_id id = ce->engine->id;
>
> ok &= engine_wa_list_verify(ce,
> @@ -1094,7 +1099,6 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
> &lists->engine[id].ctx_wa_list,
> str) == 0;
> }
> - i915_gem_context_unlock_engines(ctx);
>
> return ok;
> }
> @@ -1115,6 +1119,8 @@ live_gpu_reset_workarounds(void *arg)
> if (IS_ERR(ctx))
> return PTR_ERR(ctx);
>
> + i915_gem_context_lock_engines(ctx);
> +
> pr_info("Verifying after GPU reset...\n");
>
> igt_global_reset_lock(&i915->gt);
> @@ -1131,6 +1137,7 @@ live_gpu_reset_workarounds(void *arg)
> ok = verify_wa_lists(ctx, &lists, "after reset");
>
> out:
> + i915_gem_context_unlock_engines(ctx);
> kernel_context_close(ctx);
> reference_lists_fini(i915, &lists);
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> @@ -1143,10 +1150,10 @@ static int
> live_engine_reset_workarounds(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct intel_engine_cs *engine;
> + struct i915_gem_engines_iter it;
> struct i915_gem_context *ctx;
> + struct intel_context *ce;
> struct igt_spinner spin;
> - enum intel_engine_id id;
> struct i915_request *rq;
> intel_wakeref_t wakeref;
> struct wa_lists lists;
> @@ -1164,7 +1171,8 @@ live_engine_reset_workarounds(void *arg)
>
> reference_lists_init(i915, &lists);
>
> - for_each_engine(engine, i915, id) {
> + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> + struct intel_engine_cs *engine = ce->engine;
> bool ok;
>
> pr_info("Verifying after %s reset...\n", engine->name);
> @@ -1183,11 +1191,16 @@ live_engine_reset_workarounds(void *arg)
> goto err;
> }
>
> - ret = igt_spinner_init(&spin, i915);
> - if (ret)
> - goto err;
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + if (IS_ERR(ce))
I thought with locked engines you would be able to drop the get/put in
the loop. Wrong? Request will take a reference..
Regards,
Tvrtko
> + continue;
>
> - rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
> + ret = igt_spinner_init(&spin, engine->gt);
> + if (!ret)
> + rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
> + else
> + rq = ERR_PTR(ret);
> + intel_context_put(ce);
> if (IS_ERR(rq)) {
> ret = PTR_ERR(rq);
> igt_spinner_fini(&spin);
> @@ -1214,8 +1227,8 @@ live_engine_reset_workarounds(void *arg)
> goto err;
> }
> }
> -
> err:
> + i915_gem_context_unlock_engines(ctx);
> reference_lists_fini(i915, &lists);
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> igt_global_reset_unlock(&i915->gt);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 89b6552a6497..41acf209ffdb 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -9,25 +9,24 @@
>
> #include "igt_spinner.h"
>
> -int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
> +int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
> {
> unsigned int mode;
> void *vaddr;
> int err;
>
> - GEM_BUG_ON(INTEL_GEN(i915) < 8);
> + GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
>
> memset(spin, 0, sizeof(*spin));
> - spin->i915 = i915;
> - spin->gt = &i915->gt;
> + spin->gt = gt;
>
> - spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
> + spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
> if (IS_ERR(spin->hws)) {
> err = PTR_ERR(spin->hws);
> goto err;
> }
>
> - spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
> + spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
> if (IS_ERR(spin->obj)) {
> err = PTR_ERR(spin->obj);
> goto err_hws;
> @@ -41,7 +40,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
> }
> spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> - mode = i915_coherent_map_type(i915);
> + mode = i915_coherent_map_type(gt->i915);
> vaddr = i915_gem_object_pin_map(spin->obj, mode);
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> @@ -87,22 +86,22 @@ static int move_to_active(struct i915_vma *vma,
>
> struct i915_request *
> igt_spinner_create_request(struct igt_spinner *spin,
> - struct i915_gem_context *ctx,
> - struct intel_engine_cs *engine,
> + struct intel_context *ce,
> u32 arbitration_command)
> {
> + struct intel_engine_cs *engine = ce->engine;
> struct i915_request *rq = NULL;
> struct i915_vma *hws, *vma;
> u32 *batch;
> int err;
>
> - spin->gt = engine->gt;
> + GEM_BUG_ON(spin->gt != ce->vm->gt);
>
> - vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
> + vma = i915_vma_instance(spin->obj, ce->vm, NULL);
> if (IS_ERR(vma))
> return ERR_CAST(vma);
>
> - hws = i915_vma_instance(spin->hws, ctx->vm, NULL);
> + hws = i915_vma_instance(spin->hws, ce->vm, NULL);
> if (IS_ERR(hws))
> return ERR_CAST(hws);
>
> @@ -114,7 +113,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
> if (err)
> goto unpin_vma;
>
> - rq = igt_request_alloc(ctx, engine);
> + rq = intel_context_create_request(ce);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto unpin_hws;
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
> index 1bfc39efa773..ec62c9ef320b 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
> @@ -17,7 +17,6 @@
> struct intel_gt;
>
> struct igt_spinner {
> - struct drm_i915_private *i915;
> struct intel_gt *gt;
> struct drm_i915_gem_object *hws;
> struct drm_i915_gem_object *obj;
> @@ -25,13 +24,12 @@ struct igt_spinner {
> void *seqno;
> };
>
> -int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915);
> +int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
> void igt_spinner_fini(struct igt_spinner *spin);
>
> struct i915_request *
> igt_spinner_create_request(struct igt_spinner *spin,
> - struct i915_gem_context *ctx,
> - struct intel_engine_cs *engine,
> + struct intel_context *ce,
> u32 arbitration_command);
> void igt_spinner_end(struct igt_spinner *spin);
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Pass intel_context to igt_spinner (rev2)
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (4 preceding siblings ...)
2019-07-31 7:00 ` [PATCH v2] " Chris Wilson
@ 2019-07-31 7:42 ` Patchwork
2019-07-31 8:11 ` [PATCH v3] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (2 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-07-31 7:42 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Pass intel_context to igt_spinner (rev2)
URL : https://patchwork.freedesktop.org/series/64440/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6586 -> Patchwork_13817
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_13817 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_13817, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_13817:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@reload-no-display:
- fi-skl-6260u: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-skl-6260u/igt@i915_module_load@reload-no-display.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-skl-6260u/igt@i915_module_load@reload-no-display.html
Known issues
------------
Here are the changes found in Patchwork_13817 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_busy@basic-flip-a:
- fi-kbl-7567u: [PASS][3] -> [SKIP][4] ([fdo#109271] / [fdo#109278]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
* igt@kms_busy@basic-flip-c:
- fi-kbl-7500u: [PASS][5] -> [SKIP][6] ([fdo#109271] / [fdo#109278]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: [PASS][7] -> [WARN][8] ([fdo#109380])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-kbl-7567u: [PASS][9] -> [SKIP][10] ([fdo#109271]) +23 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
#### Possible fixes ####
* igt@gem_ctx_create@basic-files:
- fi-icl-dsi: [INCOMPLETE][11] ([fdo#107713] / [fdo#109100]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-icl-dsi/igt@gem_ctx_create@basic-files.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-icl-dsi/igt@gem_ctx_create@basic-files.html
* igt@gem_exec_reloc@basic-write-gtt-noreloc:
- fi-icl-u3: [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-icl-u3/igt@gem_exec_reloc@basic-write-gtt-noreloc.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-icl-u3/igt@gem_exec_reloc@basic-write-gtt-noreloc.html
* igt@i915_module_load@reload-no-display:
- fi-bwr-2160: [INCOMPLETE][15] ([fdo#111174]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-bwr-2160/igt@i915_module_load@reload-no-display.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-bwr-2160/igt@i915_module_load@reload-no-display.html
* igt@kms_chamelium@hdmi-edid-read:
- {fi-icl-u4}: [FAIL][17] ([fdo#111045] / [fdo#111046 ]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][19] ([fdo#109485]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6586/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111046 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111046
[fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049
[fdo#111155]: https://bugs.freedesktop.org/show_bug.cgi?id=111155
[fdo#111174]: https://bugs.freedesktop.org/show_bug.cgi?id=111174
Participating hosts (54 -> 44)
------------------------------
Missing (10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6586 -> Patchwork_13817
CI-20190529: 20190529
CI_DRM_6586: 066993443a56467f54fdcf560e89378f8e93a15b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5116: d2e6dd2f789596da5bd06efc2e9448e3160583b6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13817: f3fa6f0f0381cc0960008feab7eb5b9d2de0b9be @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f3fa6f0f0381 drm/i915/selftests: Pass intel_context to igt_spinner
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13817/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-31 7:37 ` Tvrtko Ursulin
@ 2019-07-31 8:08 ` Chris Wilson
0 siblings, 0 replies; 14+ messages in thread
From: Chris Wilson @ 2019-07-31 8:08 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx
Quoting Tvrtko Ursulin (2019-07-31 08:37:44)
>
> On 31/07/2019 08:00, Chris Wilson wrote:
> > @@ -1183,11 +1191,16 @@ live_engine_reset_workarounds(void *arg)
> > goto err;
> > }
> >
> > - ret = igt_spinner_init(&spin, i915);
> > - if (ret)
> > - goto err;
> > + ce = i915_gem_context_get_engine(ctx, engine->id);
> > + if (IS_ERR(ce))
>
> I thought with locked engines you would be able to drop the get/put in
> the loop. Wrong? Request will take a reference..
Yeah... You mean it didn't automatically remove the old ce getter.
Stupid refactoring bot. I'll demote it to coffee maker.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (5 preceding siblings ...)
2019-07-31 7:42 ` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Pass intel_context to igt_spinner (rev2) Patchwork
@ 2019-07-31 8:11 ` Chris Wilson
2019-07-31 8:25 ` Tvrtko Ursulin
2019-07-31 9:04 ` ✓ Fi.CI.BAT: success for drm/i915/selftests: Pass intel_context to igt_spinner (rev3) Patchwork
2019-08-01 19:00 ` ✓ Fi.CI.IGT: " Patchwork
8 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2019-07-31 8:11 UTC (permalink / raw)
To: intel-gfx
Teach igt_spinner to only use our internal structs, decoupling the
interface from the GEM contexts. This makes it easier to avoid
requiring ce->gem_context back references for kernel_context that may
have them in future.
v2: Lift engine lock to verify_wa() caller.
v3: Less than v2, but more so
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
.../drm/i915/gem/selftests/i915_gem_context.c | 43 +++----
drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++--------
.../gpu/drm/i915/gt/selftest_workarounds.c | 28 +++--
drivers/gpu/drm/i915/selftests/igt_spinner.c | 25 ++--
drivers/gpu/drm/i915/selftests/igt_spinner.h | 6 +-
5 files changed, 117 insertions(+), 100 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 7f9f6701b32c..c24430352a38 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -821,8 +821,7 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
#define TEST_RESET BIT(2)
static int
-__sseu_prepare(struct drm_i915_private *i915,
- const char *name,
+__sseu_prepare(const char *name,
unsigned int flags,
struct intel_context *ce,
struct igt_spinner **spin)
@@ -838,14 +837,11 @@ __sseu_prepare(struct drm_i915_private *i915,
if (!*spin)
return -ENOMEM;
- ret = igt_spinner_init(*spin, i915);
+ ret = igt_spinner_init(*spin, ce->engine->gt);
if (ret)
goto err_free;
- rq = igt_spinner_create_request(*spin,
- ce->gem_context,
- ce->engine,
- MI_NOOP);
+ rq = igt_spinner_create_request(*spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
goto err_fini;
@@ -871,8 +867,7 @@ __sseu_prepare(struct drm_i915_private *i915,
}
static int
-__read_slice_count(struct drm_i915_private *i915,
- struct intel_context *ce,
+__read_slice_count(struct intel_context *ce,
struct drm_i915_gem_object *obj,
struct igt_spinner *spin,
u32 *rpcs)
@@ -901,7 +896,7 @@ __read_slice_count(struct drm_i915_private *i915,
return ret;
}
- if (INTEL_GEN(i915) >= 11) {
+ if (INTEL_GEN(ce->engine->i915) >= 11) {
s_mask = GEN11_RPCS_S_CNT_MASK;
s_shift = GEN11_RPCS_S_CNT_SHIFT;
} else {
@@ -944,8 +939,7 @@ __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
}
static int
-__sseu_finish(struct drm_i915_private *i915,
- const char *name,
+__sseu_finish(const char *name,
unsigned int flags,
struct intel_context *ce,
struct drm_i915_gem_object *obj,
@@ -962,14 +956,13 @@ __sseu_finish(struct drm_i915_private *i915,
goto out;
}
- ret = __read_slice_count(i915, ce, obj,
+ ret = __read_slice_count(ce, obj,
flags & TEST_RESET ? NULL : spin, &rpcs);
ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
if (ret)
goto out;
- ret = __read_slice_count(i915, ce->engine->kernel_context, obj,
- NULL, &rpcs);
+ ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
out:
@@ -977,11 +970,12 @@ __sseu_finish(struct drm_i915_private *i915,
igt_spinner_end(spin);
if ((flags & TEST_IDLE) && ret == 0) {
- ret = i915_gem_wait_for_idle(i915, 0, MAX_SCHEDULE_TIMEOUT);
+ ret = i915_gem_wait_for_idle(ce->engine->i915,
+ 0, MAX_SCHEDULE_TIMEOUT);
if (ret)
return ret;
- ret = __read_slice_count(i915, ce, obj, NULL, &rpcs);
+ ret = __read_slice_count(ce, obj, NULL, &rpcs);
ret = __check_rpcs(name, rpcs, ret, expected,
"Context", " after idle!");
}
@@ -990,8 +984,7 @@ __sseu_finish(struct drm_i915_private *i915,
}
static int
-__sseu_test(struct drm_i915_private *i915,
- const char *name,
+__sseu_test(const char *name,
unsigned int flags,
struct intel_context *ce,
struct drm_i915_gem_object *obj,
@@ -1000,7 +993,7 @@ __sseu_test(struct drm_i915_private *i915,
struct igt_spinner *spin = NULL;
int ret;
- ret = __sseu_prepare(i915, name, flags, ce, &spin);
+ ret = __sseu_prepare(name, flags, ce, &spin);
if (ret)
return ret;
@@ -1008,7 +1001,7 @@ __sseu_test(struct drm_i915_private *i915,
if (ret)
goto out_spin;
- ret = __sseu_finish(i915, name, flags, ce, obj,
+ ret = __sseu_finish(name, flags, ce, obj,
hweight32(sseu.slice_mask), spin);
out_spin:
@@ -1088,22 +1081,22 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
goto out_context;
/* First set the default mask. */
- ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
+ ret = __sseu_test(name, flags, ce, obj, engine->sseu);
if (ret)
goto out_fail;
/* Then set a power-gated configuration. */
- ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
+ ret = __sseu_test(name, flags, ce, obj, pg_sseu);
if (ret)
goto out_fail;
/* Back to defaults. */
- ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
+ ret = __sseu_test(name, flags, ce, obj, engine->sseu);
if (ret)
goto out_fail;
/* One last power-gated configuration for the road. */
- ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
+ ret = __sseu_test(name, flags, ce, obj, pg_sseu);
if (ret)
goto out_fail;
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 60f27e52d267..b40b57d2daae 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -22,9 +22,9 @@
static int live_sanitycheck(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct intel_engine_cs *engine;
+ struct i915_gem_engines_iter it;
struct i915_gem_context *ctx;
- enum intel_engine_id id;
+ struct intel_context *ce;
struct igt_spinner spin;
intel_wakeref_t wakeref;
int err = -ENOMEM;
@@ -35,17 +35,17 @@ static int live_sanitycheck(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin, i915))
+ if (igt_spinner_init(&spin, &i915->gt))
goto err_unlock;
ctx = kernel_context(i915);
if (!ctx)
goto err_spin;
- for_each_engine(engine, i915, id) {
+ for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
struct i915_request *rq;
- rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx;
@@ -69,6 +69,7 @@ static int live_sanitycheck(void *arg)
err = 0;
err_ctx:
+ i915_gem_context_unlock_engines(ctx);
kernel_context_close(ctx);
err_spin:
igt_spinner_fini(&spin);
@@ -480,6 +481,24 @@ static int live_busywait_preempt(void *arg)
return err;
}
+static struct i915_request *
+spinner_create_request(struct igt_spinner *spin,
+ struct i915_gem_context *ctx,
+ struct intel_engine_cs *engine,
+ u32 arb)
+{
+ struct intel_context *ce;
+ struct i915_request *rq;
+
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ if (IS_ERR(ce))
+ return ERR_CAST(ce);
+
+ rq = igt_spinner_create_request(spin, ce, arb);
+ intel_context_put(ce);
+ return rq;
+}
+
static int live_preempt(void *arg)
{
struct drm_i915_private *i915 = arg;
@@ -499,10 +518,10 @@ static int live_preempt(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -529,8 +548,8 @@ static int live_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -545,8 +564,8 @@ static int live_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
@@ -603,10 +622,10 @@ static int live_late_preempt(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -632,8 +651,8 @@ static int live_late_preempt(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -645,8 +664,8 @@ static int live_late_preempt(void *arg)
goto err_wedged;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_NOOP);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_NOOP);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
@@ -711,7 +730,7 @@ static int preempt_client_init(struct drm_i915_private *i915,
if (!c->ctx)
return -ENOMEM;
- if (igt_spinner_init(&c->spin, i915))
+ if (igt_spinner_init(&c->spin, &i915->gt))
goto err_ctx;
return 0;
@@ -761,9 +780,9 @@ static int live_nopreempt(void *arg)
engine->execlists.preempt_hang.count = 0;
- rq_a = igt_spinner_create_request(&a.spin,
- a.ctx, engine,
- MI_ARB_CHECK);
+ rq_a = spinner_create_request(&a.spin,
+ a.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq_a)) {
err = PTR_ERR(rq_a);
goto err_client_b;
@@ -778,9 +797,9 @@ static int live_nopreempt(void *arg)
goto err_wedged;
}
- rq_b = igt_spinner_create_request(&b.spin,
- b.ctx, engine,
- MI_ARB_CHECK);
+ rq_b = spinner_create_request(&b.spin,
+ b.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq_b)) {
err = PTR_ERR(rq_b);
goto err_client_b;
@@ -880,9 +899,9 @@ static int live_suppress_self_preempt(void *arg)
engine->execlists.preempt_hang.count = 0;
- rq_a = igt_spinner_create_request(&a.spin,
- a.ctx, engine,
- MI_NOOP);
+ rq_a = spinner_create_request(&a.spin,
+ a.ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq_a)) {
err = PTR_ERR(rq_a);
goto err_client_b;
@@ -895,9 +914,9 @@ static int live_suppress_self_preempt(void *arg)
}
for (depth = 0; depth < 8; depth++) {
- rq_b = igt_spinner_create_request(&b.spin,
- b.ctx, engine,
- MI_NOOP);
+ rq_b = spinner_create_request(&b.spin,
+ b.ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq_b)) {
err = PTR_ERR(rq_b);
goto err_client_b;
@@ -1048,9 +1067,9 @@ static int live_suppress_wait_preempt(void *arg)
goto err_client_3;
for (i = 0; i < ARRAY_SIZE(client); i++) {
- rq[i] = igt_spinner_create_request(&client[i].spin,
- client[i].ctx, engine,
- MI_NOOP);
+ rq[i] = spinner_create_request(&client[i].spin,
+ client[i].ctx, engine,
+ MI_NOOP);
if (IS_ERR(rq[i])) {
err = PTR_ERR(rq[i]);
goto err_wedged;
@@ -1157,9 +1176,9 @@ static int live_chain_preempt(void *arg)
if (!intel_engine_has_preemption(engine))
continue;
- rq = igt_spinner_create_request(&lo.spin,
- lo.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
@@ -1183,18 +1202,18 @@ static int live_chain_preempt(void *arg)
}
for_each_prime_number_from(count, 1, ring_size) {
- rq = igt_spinner_create_request(&hi.spin,
- hi.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&hi.spin,
+ hi.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
if (!igt_wait_for_spinner(&hi.spin, rq))
goto err_wedged;
- rq = igt_spinner_create_request(&lo.spin,
- lo.ctx, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq))
goto err_wedged;
i915_request_add(rq);
@@ -1284,10 +1303,10 @@ static int live_preempt_hang(void *arg)
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (igt_spinner_init(&spin_hi, i915))
+ if (igt_spinner_init(&spin_hi, &i915->gt))
goto err_unlock;
- if (igt_spinner_init(&spin_lo, i915))
+ if (igt_spinner_init(&spin_lo, &i915->gt))
goto err_spin_hi;
ctx_hi = kernel_context(i915);
@@ -1308,8 +1327,8 @@ static int live_preempt_hang(void *arg)
if (!intel_engine_has_preemption(engine))
continue;
- rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_lo, ctx_lo, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto err_ctx_lo;
@@ -1324,8 +1343,8 @@ static int live_preempt_hang(void *arg)
goto err_ctx_lo;
}
- rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
- MI_ARB_CHECK);
+ rq = spinner_create_request(&spin_hi, ctx_hi, engine,
+ MI_ARB_CHECK);
if (IS_ERR(rq)) {
igt_spinner_end(&spin_lo);
err = PTR_ERR(rq);
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ab147985fa74..997da94821d9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -238,6 +238,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
struct igt_spinner *spin)
{
struct i915_gem_context *ctx;
+ struct intel_context *ce;
struct i915_request *rq;
intel_wakeref_t wakeref;
int err = 0;
@@ -248,10 +249,14 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
+ ce = i915_gem_context_get_engine(ctx, engine->id);
+ GEM_BUG_ON(IS_ERR(ce));
+
rq = ERR_PTR(-ENODEV);
with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)
- rq = igt_spinner_create_request(spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(spin, ce, MI_NOOP);
+ intel_context_put(ce);
kernel_context_close(ctx);
if (IS_ERR(rq)) {
@@ -291,7 +296,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
if (IS_ERR(ctx))
return PTR_ERR(ctx);
- err = igt_spinner_init(&spin, i915);
+ err = igt_spinner_init(&spin, engine->gt);
if (err)
goto out_ctx;
@@ -1083,7 +1088,7 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
- for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
+ for_each_gem_engine(ce, i915_gem_context_engines(ctx), it) {
enum intel_engine_id id = ce->engine->id;
ok &= engine_wa_list_verify(ce,
@@ -1094,7 +1099,6 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
&lists->engine[id].ctx_wa_list,
str) == 0;
}
- i915_gem_context_unlock_engines(ctx);
return ok;
}
@@ -1115,6 +1119,8 @@ live_gpu_reset_workarounds(void *arg)
if (IS_ERR(ctx))
return PTR_ERR(ctx);
+ i915_gem_context_lock_engines(ctx);
+
pr_info("Verifying after GPU reset...\n");
igt_global_reset_lock(&i915->gt);
@@ -1131,6 +1137,7 @@ live_gpu_reset_workarounds(void *arg)
ok = verify_wa_lists(ctx, &lists, "after reset");
out:
+ i915_gem_context_unlock_engines(ctx);
kernel_context_close(ctx);
reference_lists_fini(i915, &lists);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
@@ -1143,10 +1150,10 @@ static int
live_engine_reset_workarounds(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct intel_engine_cs *engine;
+ struct i915_gem_engines_iter it;
struct i915_gem_context *ctx;
+ struct intel_context *ce;
struct igt_spinner spin;
- enum intel_engine_id id;
struct i915_request *rq;
intel_wakeref_t wakeref;
struct wa_lists lists;
@@ -1164,7 +1171,8 @@ live_engine_reset_workarounds(void *arg)
reference_lists_init(i915, &lists);
- for_each_engine(engine, i915, id) {
+ for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
+ struct intel_engine_cs *engine = ce->engine;
bool ok;
pr_info("Verifying after %s reset...\n", engine->name);
@@ -1183,11 +1191,11 @@ live_engine_reset_workarounds(void *arg)
goto err;
}
- ret = igt_spinner_init(&spin, i915);
+ ret = igt_spinner_init(&spin, engine->gt);
if (ret)
goto err;
- rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
+ rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
igt_spinner_fini(&spin);
@@ -1214,8 +1222,8 @@ live_engine_reset_workarounds(void *arg)
goto err;
}
}
-
err:
+ i915_gem_context_unlock_engines(ctx);
reference_lists_fini(i915, &lists);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
igt_global_reset_unlock(&i915->gt);
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 89b6552a6497..41acf209ffdb 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -9,25 +9,24 @@
#include "igt_spinner.h"
-int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
+int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
{
unsigned int mode;
void *vaddr;
int err;
- GEM_BUG_ON(INTEL_GEN(i915) < 8);
+ GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
memset(spin, 0, sizeof(*spin));
- spin->i915 = i915;
- spin->gt = &i915->gt;
+ spin->gt = gt;
- spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->hws)) {
err = PTR_ERR(spin->hws);
goto err;
}
- spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
if (IS_ERR(spin->obj)) {
err = PTR_ERR(spin->obj);
goto err_hws;
@@ -41,7 +40,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
}
spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
- mode = i915_coherent_map_type(i915);
+ mode = i915_coherent_map_type(gt->i915);
vaddr = i915_gem_object_pin_map(spin->obj, mode);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
@@ -87,22 +86,22 @@ static int move_to_active(struct i915_vma *vma,
struct i915_request *
igt_spinner_create_request(struct igt_spinner *spin,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
+ struct intel_context *ce,
u32 arbitration_command)
{
+ struct intel_engine_cs *engine = ce->engine;
struct i915_request *rq = NULL;
struct i915_vma *hws, *vma;
u32 *batch;
int err;
- spin->gt = engine->gt;
+ GEM_BUG_ON(spin->gt != ce->vm->gt);
- vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
+ vma = i915_vma_instance(spin->obj, ce->vm, NULL);
if (IS_ERR(vma))
return ERR_CAST(vma);
- hws = i915_vma_instance(spin->hws, ctx->vm, NULL);
+ hws = i915_vma_instance(spin->hws, ce->vm, NULL);
if (IS_ERR(hws))
return ERR_CAST(hws);
@@ -114,7 +113,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
if (err)
goto unpin_vma;
- rq = igt_request_alloc(ctx, engine);
+ rq = intel_context_create_request(ce);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
goto unpin_hws;
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
index 1bfc39efa773..ec62c9ef320b 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
@@ -17,7 +17,6 @@
struct intel_gt;
struct igt_spinner {
- struct drm_i915_private *i915;
struct intel_gt *gt;
struct drm_i915_gem_object *hws;
struct drm_i915_gem_object *obj;
@@ -25,13 +24,12 @@ struct igt_spinner {
void *seqno;
};
-int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915);
+int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
void igt_spinner_fini(struct igt_spinner *spin);
struct i915_request *
igt_spinner_create_request(struct igt_spinner *spin,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine,
+ struct intel_context *ce,
u32 arbitration_command);
void igt_spinner_end(struct igt_spinner *spin);
--
2.23.0.rc0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v3] drm/i915/selftests: Pass intel_context to igt_spinner
2019-07-31 8:11 ` [PATCH v3] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
@ 2019-07-31 8:25 ` Tvrtko Ursulin
0 siblings, 0 replies; 14+ messages in thread
From: Tvrtko Ursulin @ 2019-07-31 8:25 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 31/07/2019 09:11, Chris Wilson wrote:
> Teach igt_spinner to only use our internal structs, decoupling the
> interface from the GEM contexts. This makes it easier to avoid
> requiring ce->gem_context back references for kernel_context that may
> have them in future.
>
> v2: Lift engine lock to verify_wa() caller.
> v3: Less than v2, but more so
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> .../drm/i915/gem/selftests/i915_gem_context.c | 43 +++----
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 115 ++++++++++--------
> .../gpu/drm/i915/gt/selftest_workarounds.c | 28 +++--
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 25 ++--
> drivers/gpu/drm/i915/selftests/igt_spinner.h | 6 +-
> 5 files changed, 117 insertions(+), 100 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> index 7f9f6701b32c..c24430352a38 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
> @@ -821,8 +821,7 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
> #define TEST_RESET BIT(2)
>
> static int
> -__sseu_prepare(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_prepare(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct igt_spinner **spin)
> @@ -838,14 +837,11 @@ __sseu_prepare(struct drm_i915_private *i915,
> if (!*spin)
> return -ENOMEM;
>
> - ret = igt_spinner_init(*spin, i915);
> + ret = igt_spinner_init(*spin, ce->engine->gt);
> if (ret)
> goto err_free;
>
> - rq = igt_spinner_create_request(*spin,
> - ce->gem_context,
> - ce->engine,
> - MI_NOOP);
> + rq = igt_spinner_create_request(*spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> ret = PTR_ERR(rq);
> goto err_fini;
> @@ -871,8 +867,7 @@ __sseu_prepare(struct drm_i915_private *i915,
> }
>
> static int
> -__read_slice_count(struct drm_i915_private *i915,
> - struct intel_context *ce,
> +__read_slice_count(struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> struct igt_spinner *spin,
> u32 *rpcs)
> @@ -901,7 +896,7 @@ __read_slice_count(struct drm_i915_private *i915,
> return ret;
> }
>
> - if (INTEL_GEN(i915) >= 11) {
> + if (INTEL_GEN(ce->engine->i915) >= 11) {
> s_mask = GEN11_RPCS_S_CNT_MASK;
> s_shift = GEN11_RPCS_S_CNT_SHIFT;
> } else {
> @@ -944,8 +939,7 @@ __check_rpcs(const char *name, u32 rpcs, int slices, unsigned int expected,
> }
>
> static int
> -__sseu_finish(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_finish(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> @@ -962,14 +956,13 @@ __sseu_finish(struct drm_i915_private *i915,
> goto out;
> }
>
> - ret = __read_slice_count(i915, ce, obj,
> + ret = __read_slice_count(ce, obj,
> flags & TEST_RESET ? NULL : spin, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, expected, "Context", "!");
> if (ret)
> goto out;
>
> - ret = __read_slice_count(i915, ce->engine->kernel_context, obj,
> - NULL, &rpcs);
> + ret = __read_slice_count(ce->engine->kernel_context, obj, NULL, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, slices, "Kernel context", "!");
>
> out:
> @@ -977,11 +970,12 @@ __sseu_finish(struct drm_i915_private *i915,
> igt_spinner_end(spin);
>
> if ((flags & TEST_IDLE) && ret == 0) {
> - ret = i915_gem_wait_for_idle(i915, 0, MAX_SCHEDULE_TIMEOUT);
> + ret = i915_gem_wait_for_idle(ce->engine->i915,
> + 0, MAX_SCHEDULE_TIMEOUT);
> if (ret)
> return ret;
>
> - ret = __read_slice_count(i915, ce, obj, NULL, &rpcs);
> + ret = __read_slice_count(ce, obj, NULL, &rpcs);
> ret = __check_rpcs(name, rpcs, ret, expected,
> "Context", " after idle!");
> }
> @@ -990,8 +984,7 @@ __sseu_finish(struct drm_i915_private *i915,
> }
>
> static int
> -__sseu_test(struct drm_i915_private *i915,
> - const char *name,
> +__sseu_test(const char *name,
> unsigned int flags,
> struct intel_context *ce,
> struct drm_i915_gem_object *obj,
> @@ -1000,7 +993,7 @@ __sseu_test(struct drm_i915_private *i915,
> struct igt_spinner *spin = NULL;
> int ret;
>
> - ret = __sseu_prepare(i915, name, flags, ce, &spin);
> + ret = __sseu_prepare(name, flags, ce, &spin);
> if (ret)
> return ret;
>
> @@ -1008,7 +1001,7 @@ __sseu_test(struct drm_i915_private *i915,
> if (ret)
> goto out_spin;
>
> - ret = __sseu_finish(i915, name, flags, ce, obj,
> + ret = __sseu_finish(name, flags, ce, obj,
> hweight32(sseu.slice_mask), spin);
>
> out_spin:
> @@ -1088,22 +1081,22 @@ __igt_ctx_sseu(struct drm_i915_private *i915,
> goto out_context;
>
> /* First set the default mask. */
> - ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
> + ret = __sseu_test(name, flags, ce, obj, engine->sseu);
> if (ret)
> goto out_fail;
>
> /* Then set a power-gated configuration. */
> - ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
> + ret = __sseu_test(name, flags, ce, obj, pg_sseu);
> if (ret)
> goto out_fail;
>
> /* Back to defaults. */
> - ret = __sseu_test(i915, name, flags, ce, obj, engine->sseu);
> + ret = __sseu_test(name, flags, ce, obj, engine->sseu);
> if (ret)
> goto out_fail;
>
> /* One last power-gated configuration for the road. */
> - ret = __sseu_test(i915, name, flags, ce, obj, pg_sseu);
> + ret = __sseu_test(name, flags, ce, obj, pg_sseu);
> if (ret)
> goto out_fail;
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 60f27e52d267..b40b57d2daae 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -22,9 +22,9 @@
> static int live_sanitycheck(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct intel_engine_cs *engine;
> + struct i915_gem_engines_iter it;
> struct i915_gem_context *ctx;
> - enum intel_engine_id id;
> + struct intel_context *ce;
> struct igt_spinner spin;
> intel_wakeref_t wakeref;
> int err = -ENOMEM;
> @@ -35,17 +35,17 @@ static int live_sanitycheck(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin, i915))
> + if (igt_spinner_init(&spin, &i915->gt))
> goto err_unlock;
>
> ctx = kernel_context(i915);
> if (!ctx)
> goto err_spin;
>
> - for_each_engine(engine, i915, id) {
> + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> struct i915_request *rq;
>
> - rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx;
> @@ -69,6 +69,7 @@ static int live_sanitycheck(void *arg)
>
> err = 0;
> err_ctx:
> + i915_gem_context_unlock_engines(ctx);
> kernel_context_close(ctx);
> err_spin:
> igt_spinner_fini(&spin);
> @@ -480,6 +481,24 @@ static int live_busywait_preempt(void *arg)
> return err;
> }
>
> +static struct i915_request *
> +spinner_create_request(struct igt_spinner *spin,
> + struct i915_gem_context *ctx,
> + struct intel_engine_cs *engine,
> + u32 arb)
> +{
> + struct intel_context *ce;
> + struct i915_request *rq;
> +
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + if (IS_ERR(ce))
> + return ERR_CAST(ce);
> +
> + rq = igt_spinner_create_request(spin, ce, arb);
> + intel_context_put(ce);
> + return rq;
> +}
> +
> static int live_preempt(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> @@ -499,10 +518,10 @@ static int live_preempt(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -529,8 +548,8 @@ static int live_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -545,8 +564,8 @@ static int live_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> @@ -603,10 +622,10 @@ static int live_late_preempt(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -632,8 +651,8 @@ static int live_late_preempt(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -645,8 +664,8 @@ static int live_late_preempt(void *arg)
> goto err_wedged;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_NOOP);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_NOOP);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> @@ -711,7 +730,7 @@ static int preempt_client_init(struct drm_i915_private *i915,
> if (!c->ctx)
> return -ENOMEM;
>
> - if (igt_spinner_init(&c->spin, i915))
> + if (igt_spinner_init(&c->spin, &i915->gt))
> goto err_ctx;
>
> return 0;
> @@ -761,9 +780,9 @@ static int live_nopreempt(void *arg)
>
> engine->execlists.preempt_hang.count = 0;
>
> - rq_a = igt_spinner_create_request(&a.spin,
> - a.ctx, engine,
> - MI_ARB_CHECK);
> + rq_a = spinner_create_request(&a.spin,
> + a.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq_a)) {
> err = PTR_ERR(rq_a);
> goto err_client_b;
> @@ -778,9 +797,9 @@ static int live_nopreempt(void *arg)
> goto err_wedged;
> }
>
> - rq_b = igt_spinner_create_request(&b.spin,
> - b.ctx, engine,
> - MI_ARB_CHECK);
> + rq_b = spinner_create_request(&b.spin,
> + b.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq_b)) {
> err = PTR_ERR(rq_b);
> goto err_client_b;
> @@ -880,9 +899,9 @@ static int live_suppress_self_preempt(void *arg)
>
> engine->execlists.preempt_hang.count = 0;
>
> - rq_a = igt_spinner_create_request(&a.spin,
> - a.ctx, engine,
> - MI_NOOP);
> + rq_a = spinner_create_request(&a.spin,
> + a.ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq_a)) {
> err = PTR_ERR(rq_a);
> goto err_client_b;
> @@ -895,9 +914,9 @@ static int live_suppress_self_preempt(void *arg)
> }
>
> for (depth = 0; depth < 8; depth++) {
> - rq_b = igt_spinner_create_request(&b.spin,
> - b.ctx, engine,
> - MI_NOOP);
> + rq_b = spinner_create_request(&b.spin,
> + b.ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq_b)) {
> err = PTR_ERR(rq_b);
> goto err_client_b;
> @@ -1048,9 +1067,9 @@ static int live_suppress_wait_preempt(void *arg)
> goto err_client_3;
>
> for (i = 0; i < ARRAY_SIZE(client); i++) {
> - rq[i] = igt_spinner_create_request(&client[i].spin,
> - client[i].ctx, engine,
> - MI_NOOP);
> + rq[i] = spinner_create_request(&client[i].spin,
> + client[i].ctx, engine,
> + MI_NOOP);
> if (IS_ERR(rq[i])) {
> err = PTR_ERR(rq[i]);
> goto err_wedged;
> @@ -1157,9 +1176,9 @@ static int live_chain_preempt(void *arg)
> if (!intel_engine_has_preemption(engine))
> continue;
>
> - rq = igt_spinner_create_request(&lo.spin,
> - lo.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&lo.spin,
> + lo.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> @@ -1183,18 +1202,18 @@ static int live_chain_preempt(void *arg)
> }
>
> for_each_prime_number_from(count, 1, ring_size) {
> - rq = igt_spinner_create_request(&hi.spin,
> - hi.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&hi.spin,
> + hi.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> if (!igt_wait_for_spinner(&hi.spin, rq))
> goto err_wedged;
>
> - rq = igt_spinner_create_request(&lo.spin,
> - lo.ctx, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&lo.spin,
> + lo.ctx, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq))
> goto err_wedged;
> i915_request_add(rq);
> @@ -1284,10 +1303,10 @@ static int live_preempt_hang(void *arg)
> mutex_lock(&i915->drm.struct_mutex);
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> - if (igt_spinner_init(&spin_hi, i915))
> + if (igt_spinner_init(&spin_hi, &i915->gt))
> goto err_unlock;
>
> - if (igt_spinner_init(&spin_lo, i915))
> + if (igt_spinner_init(&spin_lo, &i915->gt))
> goto err_spin_hi;
>
> ctx_hi = kernel_context(i915);
> @@ -1308,8 +1327,8 @@ static int live_preempt_hang(void *arg)
> if (!intel_engine_has_preemption(engine))
> continue;
>
> - rq = igt_spinner_create_request(&spin_lo, ctx_lo, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_lo, ctx_lo, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto err_ctx_lo;
> @@ -1324,8 +1343,8 @@ static int live_preempt_hang(void *arg)
> goto err_ctx_lo;
> }
>
> - rq = igt_spinner_create_request(&spin_hi, ctx_hi, engine,
> - MI_ARB_CHECK);
> + rq = spinner_create_request(&spin_hi, ctx_hi, engine,
> + MI_ARB_CHECK);
> if (IS_ERR(rq)) {
> igt_spinner_end(&spin_lo);
> err = PTR_ERR(rq);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index ab147985fa74..997da94821d9 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -238,6 +238,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
> struct igt_spinner *spin)
> {
> struct i915_gem_context *ctx;
> + struct intel_context *ce;
> struct i915_request *rq;
> intel_wakeref_t wakeref;
> int err = 0;
> @@ -248,10 +249,14 @@ switch_to_scratch_context(struct intel_engine_cs *engine,
>
> GEM_BUG_ON(i915_gem_context_is_bannable(ctx));
>
> + ce = i915_gem_context_get_engine(ctx, engine->id);
> + GEM_BUG_ON(IS_ERR(ce));
> +
> rq = ERR_PTR(-ENODEV);
> with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)
> - rq = igt_spinner_create_request(spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(spin, ce, MI_NOOP);
>
> + intel_context_put(ce);
> kernel_context_close(ctx);
>
> if (IS_ERR(rq)) {
> @@ -291,7 +296,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine,
> if (IS_ERR(ctx))
> return PTR_ERR(ctx);
>
> - err = igt_spinner_init(&spin, i915);
> + err = igt_spinner_init(&spin, engine->gt);
> if (err)
> goto out_ctx;
>
> @@ -1083,7 +1088,7 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
>
> ok &= wa_list_verify(&i915->uncore, &lists->gt_wa_list, str);
>
> - for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> + for_each_gem_engine(ce, i915_gem_context_engines(ctx), it) {
> enum intel_engine_id id = ce->engine->id;
>
> ok &= engine_wa_list_verify(ce,
> @@ -1094,7 +1099,6 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists,
> &lists->engine[id].ctx_wa_list,
> str) == 0;
> }
> - i915_gem_context_unlock_engines(ctx);
>
> return ok;
> }
> @@ -1115,6 +1119,8 @@ live_gpu_reset_workarounds(void *arg)
> if (IS_ERR(ctx))
> return PTR_ERR(ctx);
>
> + i915_gem_context_lock_engines(ctx);
> +
> pr_info("Verifying after GPU reset...\n");
>
> igt_global_reset_lock(&i915->gt);
> @@ -1131,6 +1137,7 @@ live_gpu_reset_workarounds(void *arg)
> ok = verify_wa_lists(ctx, &lists, "after reset");
>
> out:
> + i915_gem_context_unlock_engines(ctx);
> kernel_context_close(ctx);
> reference_lists_fini(i915, &lists);
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> @@ -1143,10 +1150,10 @@ static int
> live_engine_reset_workarounds(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct intel_engine_cs *engine;
> + struct i915_gem_engines_iter it;
> struct i915_gem_context *ctx;
> + struct intel_context *ce;
> struct igt_spinner spin;
> - enum intel_engine_id id;
> struct i915_request *rq;
> intel_wakeref_t wakeref;
> struct wa_lists lists;
> @@ -1164,7 +1171,8 @@ live_engine_reset_workarounds(void *arg)
>
> reference_lists_init(i915, &lists);
>
> - for_each_engine(engine, i915, id) {
> + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
> + struct intel_engine_cs *engine = ce->engine;
> bool ok;
>
> pr_info("Verifying after %s reset...\n", engine->name);
> @@ -1183,11 +1191,11 @@ live_engine_reset_workarounds(void *arg)
> goto err;
> }
>
> - ret = igt_spinner_init(&spin, i915);
> + ret = igt_spinner_init(&spin, engine->gt);
> if (ret)
> goto err;
>
> - rq = igt_spinner_create_request(&spin, ctx, engine, MI_NOOP);
> + rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
> if (IS_ERR(rq)) {
> ret = PTR_ERR(rq);
> igt_spinner_fini(&spin);
> @@ -1214,8 +1222,8 @@ live_engine_reset_workarounds(void *arg)
> goto err;
> }
> }
> -
> err:
> + i915_gem_context_unlock_engines(ctx);
> reference_lists_fini(i915, &lists);
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> igt_global_reset_unlock(&i915->gt);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 89b6552a6497..41acf209ffdb 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -9,25 +9,24 @@
>
> #include "igt_spinner.h"
>
> -int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
> +int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
> {
> unsigned int mode;
> void *vaddr;
> int err;
>
> - GEM_BUG_ON(INTEL_GEN(i915) < 8);
> + GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
>
> memset(spin, 0, sizeof(*spin));
> - spin->i915 = i915;
> - spin->gt = &i915->gt;
> + spin->gt = gt;
>
> - spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
> + spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
> if (IS_ERR(spin->hws)) {
> err = PTR_ERR(spin->hws);
> goto err;
> }
>
> - spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
> + spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
> if (IS_ERR(spin->obj)) {
> err = PTR_ERR(spin->obj);
> goto err_hws;
> @@ -41,7 +40,7 @@ int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915)
> }
> spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> - mode = i915_coherent_map_type(i915);
> + mode = i915_coherent_map_type(gt->i915);
I don't think multiple gt->i915 are buying us anything apart from a
larger diff but okay.
> vaddr = i915_gem_object_pin_map(spin->obj, mode);
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> @@ -87,22 +86,22 @@ static int move_to_active(struct i915_vma *vma,
>
> struct i915_request *
> igt_spinner_create_request(struct igt_spinner *spin,
> - struct i915_gem_context *ctx,
> - struct intel_engine_cs *engine,
> + struct intel_context *ce,
> u32 arbitration_command)
> {
> + struct intel_engine_cs *engine = ce->engine;
> struct i915_request *rq = NULL;
> struct i915_vma *hws, *vma;
> u32 *batch;
> int err;
>
> - spin->gt = engine->gt;
> + GEM_BUG_ON(spin->gt != ce->vm->gt);
>
> - vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
> + vma = i915_vma_instance(spin->obj, ce->vm, NULL);
> if (IS_ERR(vma))
> return ERR_CAST(vma);
>
> - hws = i915_vma_instance(spin->hws, ctx->vm, NULL);
> + hws = i915_vma_instance(spin->hws, ce->vm, NULL);
> if (IS_ERR(hws))
> return ERR_CAST(hws);
>
> @@ -114,7 +113,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
> if (err)
> goto unpin_vma;
>
> - rq = igt_request_alloc(ctx, engine);
> + rq = intel_context_create_request(ce);
> if (IS_ERR(rq)) {
> err = PTR_ERR(rq);
> goto unpin_hws;
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
> index 1bfc39efa773..ec62c9ef320b 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
> @@ -17,7 +17,6 @@
> struct intel_gt;
>
> struct igt_spinner {
> - struct drm_i915_private *i915;
> struct intel_gt *gt;
> struct drm_i915_gem_object *hws;
> struct drm_i915_gem_object *obj;
> @@ -25,13 +24,12 @@ struct igt_spinner {
> void *seqno;
> };
>
> -int igt_spinner_init(struct igt_spinner *spin, struct drm_i915_private *i915);
> +int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
> void igt_spinner_fini(struct igt_spinner *spin);
>
> struct i915_request *
> igt_spinner_create_request(struct igt_spinner *spin,
> - struct i915_gem_context *ctx,
> - struct intel_engine_cs *engine,
> + struct intel_context *ce,
> u32 arbitration_command);
> void igt_spinner_end(struct igt_spinner *spin);
>
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/selftests: Pass intel_context to igt_spinner (rev3)
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (6 preceding siblings ...)
2019-07-31 8:11 ` [PATCH v3] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
@ 2019-07-31 9:04 ` Patchwork
2019-08-01 19:00 ` ✓ Fi.CI.IGT: " Patchwork
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-07-31 9:04 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Pass intel_context to igt_spinner (rev3)
URL : https://patchwork.freedesktop.org/series/64440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6587 -> Patchwork_13818
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/
Known issues
------------
Here are the changes found in Patchwork_13818 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-icl-u3/igt@i915_module_load@reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-icl-u3/igt@i915_module_load@reload.html
* igt@i915_selftest@live_blt:
- fi-kbl-guc: [PASS][3] -> [DMESG-WARN][4] ([fdo#110943])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-kbl-guc/igt@i915_selftest@live_blt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-kbl-guc/igt@i915_selftest@live_blt.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: [PASS][5] -> [WARN][6] ([fdo#109380])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-kbl-7567u: [PASS][7] -> [SKIP][8] ([fdo#109271]) +23 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
#### Possible fixes ####
* igt@gem_ctx_create@basic-files:
- fi-icl-dsi: [INCOMPLETE][9] ([fdo#107713] / [fdo#109100]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-icl-dsi/igt@gem_ctx_create@basic-files.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-icl-dsi/igt@gem_ctx_create@basic-files.html
* igt@gem_exec_reloc@basic-write-gtt-noreloc:
- fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-icl-u3/igt@gem_exec_reloc@basic-write-gtt-noreloc.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-icl-u3/igt@gem_exec_reloc@basic-write-gtt-noreloc.html
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][13] ([fdo#107718]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live_hangcheck:
- {fi-icl-u4}: [INCOMPLETE][15] ([fdo#107713] / [fdo#108569]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-icl-u4/igt@i915_selftest@live_hangcheck.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-icl-u4/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][17] ([fdo#109485]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Warnings ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [SKIP][19] ([fdo#109271]) -> [FAIL][20] ([fdo#110829])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829
[fdo#110943]: https://bugs.freedesktop.org/show_bug.cgi?id=110943
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
Participating hosts (51 -> 46)
------------------------------
Missing (5): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6587 -> Patchwork_13818
CI-20190529: 20190529
CI_DRM_6587: 236e2e302b28be808e52adc861c5394633d4384e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5116: d2e6dd2f789596da5bd06efc2e9448e3160583b6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13818: e72a3a66eb09d984491bd63562b5988c1955f4a4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e72a3a66eb09 drm/i915/selftests: Pass intel_context to igt_spinner
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/selftests: Pass intel_context to igt_spinner (rev3)
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
` (7 preceding siblings ...)
2019-07-31 9:04 ` ✓ Fi.CI.BAT: success for drm/i915/selftests: Pass intel_context to igt_spinner (rev3) Patchwork
@ 2019-08-01 19:00 ` Patchwork
8 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2019-08-01 19:00 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Pass intel_context to igt_spinner (rev3)
URL : https://patchwork.freedesktop.org/series/64440/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6587_full -> Patchwork_13818_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13818_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_eio@unwedge-stress:
- shard-snb: ([PASS][1], [PASS][2]) -> ([PASS][3], [FAIL][4]) ([fdo#109661]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-snb7/igt@gem_eio@unwedge-stress.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-snb4/igt@gem_eio@unwedge-stress.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-snb1/igt@gem_eio@unwedge-stress.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-snb2/igt@gem_eio@unwedge-stress.html
* igt@gem_fence_thrash@bo-write-verify-threaded-y:
- shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] / [fdo#109100])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-iclb1/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-iclb7/igt@gem_fence_thrash@bo-write-verify-threaded-y.html
* igt@gem_fence_thrash@bo-write-verify-y:
- shard-apl: ([PASS][7], [PASS][8]) -> ([PASS][9], [INCOMPLETE][10]) ([fdo#103927])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl6/igt@gem_fence_thrash@bo-write-verify-y.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl7/igt@gem_fence_thrash@bo-write-verify-y.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl3/igt@gem_fence_thrash@bo-write-verify-y.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl5/igt@gem_fence_thrash@bo-write-verify-y.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-skl1/igt@gem_softpin@noreloc-s3.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-skl5/igt@gem_softpin@noreloc-s3.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-skl: [PASS][13] -> [INCOMPLETE][14] ([fdo#110741])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_legacy@all-pipes-torture-bo:
- shard-glk: ([PASS][15], [PASS][16]) -> ([DMESG-WARN][17], [PASS][18]) ([fdo#107122])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk4/igt@kms_cursor_legacy@all-pipes-torture-bo.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk8/igt@kms_cursor_legacy@all-pipes-torture-bo.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk1/igt@kms_cursor_legacy@all-pipes-torture-bo.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk7/igt@kms_cursor_legacy@all-pipes-torture-bo.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: ([PASS][19], [PASS][20]) -> ([FAIL][21], [FAIL][22]) ([fdo#105363])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@modeset-vs-vblank-race:
- shard-apl: ([PASS][23], [PASS][24]) -> ([FAIL][25], [PASS][26]) ([fdo#103060])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl4/igt@kms_flip@modeset-vs-vblank-race.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl6/igt@kms_flip@modeset-vs-vblank-race.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl6/igt@kms_flip@modeset-vs-vblank-race.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl7/igt@kms_flip@modeset-vs-vblank-race.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff:
- shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#103167]) +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-kbl: [PASS][29] -> [DMESG-WARN][30] ([fdo#108566]) +2 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@perf@polling:
- shard-skl: [PASS][33] -> [FAIL][34] ([fdo#110728])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-skl3/igt@perf@polling.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-skl7/igt@perf@polling.html
#### Possible fixes ####
* igt@gem_tiled_swapping@non-threaded:
- shard-glk: ([DMESG-WARN][35], [PASS][36]) ([fdo#108686]) -> ([PASS][37], [PASS][38])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk8/igt@gem_tiled_swapping@non-threaded.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk1/igt@gem_tiled_swapping@non-threaded.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk7/igt@gem_tiled_swapping@non-threaded.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk1/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: ([PASS][39], [DMESG-WARN][40]) ([fdo#108566]) -> [PASS][41] +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl3/igt@i915_suspend@fence-restore-tiled2untiled.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl5/igt@i915_suspend@fence-restore-tiled2untiled.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
- shard-glk: ([FAIL][42], [PASS][43]) ([fdo#103060]) -> ([PASS][44], [PASS][45])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk9/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-glk1/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk3/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-glk7/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-apl: ([DMESG-WARN][46], [DMESG-WARN][47]) ([fdo#108566]) -> [PASS][48]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl5/igt@kms_flip@flip-vs-suspend-interruptible.html
- shard-kbl: [DMESG-WARN][49] ([fdo#108566]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt:
- shard-skl: [FAIL][51] ([fdo#108040]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-skl3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-skl7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [FAIL][53] ([fdo#103167]) -> [PASS][54] +4 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: ([DMESG-WARN][55], [PASS][56]) ([fdo#108566]) -> ([PASS][57], [PASS][58]) +3 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][59] ([fdo#108145]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][61] ([fdo#109441]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-iclb4/igt@kms_psr@psr2_sprite_render.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
#### Warnings ####
* igt@gem_softpin@noreloc-s3:
- shard-apl: ([DMESG-WARN][63], [DMESG-WARN][64]) ([fdo#108566]) -> ([PASS][65], [DMESG-WARN][66]) ([fdo#108566])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl3/igt@gem_softpin@noreloc-s3.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl6/igt@gem_softpin@noreloc-s3.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl8/igt@gem_softpin@noreloc-s3.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl4/igt@gem_softpin@noreloc-s3.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-apl: ([PASS][67], [DMESG-WARN][68]) ([fdo#108566]) -> ([DMESG-WARN][69], [DMESG-WARN][70]) ([fdo#108566])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6587/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107122]: https://bugs.freedesktop.org/show_bug.cgi?id=107122
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108040]: https://bugs.freedesktop.org/show_bug.cgi?id=108040
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#110741]: https://bugs.freedesktop.org/show_bug.cgi?id=110741
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6587 -> Patchwork_13818
CI-20190529: 20190529
CI_DRM_6587: 236e2e302b28be808e52adc861c5394633d4384e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5116: d2e6dd2f789596da5bd06efc2e9448e3160583b6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13818: e72a3a66eb09d984491bd63562b5988c1955f4a4 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13818/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2019-08-01 19:00 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-30 15:48 [PATCH] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
2019-07-30 16:24 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-07-30 16:45 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-31 4:23 ` ✓ Fi.CI.IGT: " Patchwork
2019-07-31 5:55 ` [PATCH] " Tvrtko Ursulin
2019-07-31 6:56 ` Chris Wilson
2019-07-31 7:00 ` [PATCH v2] " Chris Wilson
2019-07-31 7:37 ` Tvrtko Ursulin
2019-07-31 8:08 ` Chris Wilson
2019-07-31 7:42 ` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Pass intel_context to igt_spinner (rev2) Patchwork
2019-07-31 8:11 ` [PATCH v3] drm/i915/selftests: Pass intel_context to igt_spinner Chris Wilson
2019-07-31 8:25 ` Tvrtko Ursulin
2019-07-31 9:04 ` ✓ Fi.CI.BAT: success for drm/i915/selftests: Pass intel_context to igt_spinner (rev3) Patchwork
2019-08-01 19:00 ` ✓ Fi.CI.IGT: " Patchwork
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