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From: Jesse Zhang <zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Jesse Zhang <zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH v4] drm/amd/amdgpu:Fix compute ring unable to detect hang.
Date: Thu, 19 Sep 2019 16:00:41 +0800	[thread overview]
Message-ID: <1568880041-19830-1-git-send-email-zhexi.zhang@amd.com> (raw)
In-Reply-To: <1568876935-18731-2-git-send-email-zhexi.zhang-5C7GfCeVMHo@public.gmane.org>

When compute fence did not signal, compute ring cannot detect hardware
hang because its timeout value is set to be infinite by default.

In SR-IOV and passthrough mode, if user does not declare custome timeout
value for compute ring, then use gfx ring timeout value as default. So
that when there is a ture hardware hang, compute ring can detect it.

Change-Id: I794ec0868c6c0aad407749457260ecfee0617c10
Signed-off-by: Jesse Zhang <zhexi.zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c |  5 +----
 drivers/gpu/drm/amd/amdgpu/soc15.c        | 10 ++++++++++
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index cbcaa7c..963b6d1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -468,10 +468,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 			 * For sriov case, always use the timeout
 			 * as gfx ring
 			 */
-			if (!amdgpu_sriov_vf(ring->adev))
-				timeout = adev->compute_timeout;
-			else
-				timeout = adev->gfx_timeout;
+			timeout = adev->compute_timeout;
 			break;
 		case AMDGPU_RING_TYPE_SDMA:
 			timeout = adev->sdma_timeout;
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 7c7e9f5..6cd5548 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -687,6 +687,16 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
 	adev->rev_id = soc15_get_rev_id(adev);
 	adev->nbio.funcs->detect_hw_virt(adev);
 
+	/*
+	 * If running under SR-IOV or passthrough mode and user did not set
+	 * custom value for compute ring timeout, set timeout to be the same
+	 * as gfx ring timeout to avoid compute ring cannot detect an true
+	 * hang.
+	 */
+	if ((amdgpu_sriov_vf(adev) || amdgpu_passthrough(adev)) &&
+		(adev->compute_timeout == MAX_SCHEDULE_TIMEOUT))
+		adev->compute_timeout = adev->gfx_timeout;
+
 	if (amdgpu_sriov_vf(adev))
 		adev->virt.ops = &xgpu_ai_virt_ops;
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2019-09-19  8:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-19  7:08 [PATCH v2] drm/amd/amdgpu:Fix compute ring unable to detect hang Jesse Zhang
     [not found] ` <1568876935-18731-2-git-send-email-zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
2019-09-19  7:58   ` [PATCH v3] " Jesse Zhang
2019-09-19  8:00   ` Jesse Zhang [this message]
     [not found]     ` <1568880041-19830-1-git-send-email-zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
2019-09-19  8:14       ` [PATCH v4] " Christian König
2019-09-19 10:09       ` [PATCH v5] " Jesse Zhang
     [not found]         ` <1568887741-1029-1-git-send-email-zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
2019-09-19 12:12           ` Christian König
2019-09-20  2:36       ` [PATCH v6] " Jesse Zhang
2019-09-20  2:38       ` [PATCH v7] " Jesse Zhang
     [not found]         ` <1568947109-5924-1-git-send-email-zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
2019-09-20  6:57           ` [PATCH v8] " Jesse Zhang
     [not found]             ` <1568962637-26150-1-git-send-email-zhexi.zhang-5C7GfCeVMHo@public.gmane.org>
2019-09-20 14:29               ` Christian König

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