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* [dpdk-dev] [PATCH 1/2] crypto/aesni_mb: allow device init if no AES-NI is present
@ 2019-10-17 16:20 Pablo de Lara
  2019-10-17 16:20 ` [dpdk-dev] [PATCH 2/2] crypto/aesni_gcm: " Pablo de Lara
  2019-10-17 16:30 ` [dpdk-dev] [PATCH v2 1/2] crypto/aesni_mb: " Pablo de Lara
  0 siblings, 2 replies; 5+ messages in thread
From: Pablo de Lara @ 2019-10-17 16:20 UTC (permalink / raw)
  To: dev; +Cc: Pablo de Lara

The IPSec Multi buffer library does not require AES-NI
instructions to be supported by the CPU, as it can emulate these
instructions in software (adding a big performance penalty when
using AES algorithms).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index ce1144b..7875d6d 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -1251,12 +1251,6 @@ cryptodev_aesni_mb_create(const char *name,
 	enum aesni_mb_vector_mode vector_mode;
 	MB_MGR *mb_mgr;
 
-	/* Check CPU for support for AES instruction set */
-	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
-		AESNI_MB_LOG(ERR, "AES instructions not supported by CPU");
-		return -EFAULT;
-	}
-
 	dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
 	if (dev == NULL) {
 		AESNI_MB_LOG(ERR, "failed to create cryptodev vdev");
@@ -1282,9 +1276,14 @@ cryptodev_aesni_mb_create(const char *name,
 
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-			RTE_CRYPTODEV_FF_CPU_AESNI |
 			RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
 
+	/* Check CPU for support for AES instruction set */
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES))
+		dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AESNI;
+        else
+		AESNI_MB_LOG(WARNING, "AES instructions not supported by CPU");
+
 
 	mb_mgr = alloc_mb_mgr(0);
 	if (mb_mgr == NULL)
-- 
2.7.5


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [dpdk-dev] [PATCH 2/2] crypto/aesni_gcm: allow device init if no AES-NI is present
  2019-10-17 16:20 [dpdk-dev] [PATCH 1/2] crypto/aesni_mb: allow device init if no AES-NI is present Pablo de Lara
@ 2019-10-17 16:20 ` Pablo de Lara
  2019-10-17 16:30 ` [dpdk-dev] [PATCH v2 1/2] crypto/aesni_mb: " Pablo de Lara
  1 sibling, 0 replies; 5+ messages in thread
From: Pablo de Lara @ 2019-10-17 16:20 UTC (permalink / raw)
  To: dev; +Cc: Pablo de Lara

The IPSec Multi buffer library does not require AES-NI
instructions to be supported by the CPU, as it can emulate these
instructions in software (adding a big performance penalty when
using AES algorithms).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
 drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index 1006a5c..0c4efa6 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -491,11 +491,6 @@ aesni_gcm_create(const char *name,
 	enum aesni_gcm_vector_mode vector_mode;
 	MB_MGR *mb_mgr;
 
-	/* Check CPU for support for AES instruction set */
-	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
-		AESNI_GCM_LOG(ERR, "AES instructions not supported by CPU");
-		return -EFAULT;
-	}
 	dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
 	if (dev == NULL) {
 		AESNI_GCM_LOG(ERR, "driver %s: create failed",
@@ -522,10 +517,15 @@ aesni_gcm_create(const char *name,
 
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-			RTE_CRYPTODEV_FF_CPU_AESNI |
 			RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
 			RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
 
+	/* Check CPU for support for AES instruction set */
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES))
+		dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AESNI;
+        else
+		AESNI_GCM_LOG(WARNING, "AES instructions not supported by CPU");
+
 	mb_mgr = alloc_mb_mgr(0);
 	if (mb_mgr == NULL)
 		return -ENOMEM;
-- 
2.7.5


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [dpdk-dev] [PATCH v2 1/2] crypto/aesni_mb: allow device init if no AES-NI is present
  2019-10-17 16:20 [dpdk-dev] [PATCH 1/2] crypto/aesni_mb: allow device init if no AES-NI is present Pablo de Lara
  2019-10-17 16:20 ` [dpdk-dev] [PATCH 2/2] crypto/aesni_gcm: " Pablo de Lara
@ 2019-10-17 16:30 ` Pablo de Lara
  2019-10-17 16:30   ` [dpdk-dev] [PATCH v2 2/2] crypto/aesni_gcm: " Pablo de Lara
  1 sibling, 1 reply; 5+ messages in thread
From: Pablo de Lara @ 2019-10-17 16:30 UTC (permalink / raw)
  To: dev; +Cc: Pablo de Lara

The IPSec Multi buffer library does not require AES-NI
instructions to be supported by the CPU, as it can emulate these
instructions in software (adding a big performance penalty when
using AES algorithms).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
v2:
- Fixed leading whitespaces

 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index ce1144b..c3001cb 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -1251,12 +1251,6 @@ cryptodev_aesni_mb_create(const char *name,
 	enum aesni_mb_vector_mode vector_mode;
 	MB_MGR *mb_mgr;
 
-	/* Check CPU for support for AES instruction set */
-	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
-		AESNI_MB_LOG(ERR, "AES instructions not supported by CPU");
-		return -EFAULT;
-	}
-
 	dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
 	if (dev == NULL) {
 		AESNI_MB_LOG(ERR, "failed to create cryptodev vdev");
@@ -1282,9 +1276,13 @@ cryptodev_aesni_mb_create(const char *name,
 
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-			RTE_CRYPTODEV_FF_CPU_AESNI |
 			RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
 
+	/* Check CPU for support for AES instruction set */
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES))
+		dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AESNI;
+	else
+		AESNI_MB_LOG(WARNING, "AES instructions not supported by CPU");
 
 	mb_mgr = alloc_mb_mgr(0);
 	if (mb_mgr == NULL)
-- 
2.7.5


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [dpdk-dev] [PATCH v2 2/2] crypto/aesni_gcm: allow device init if no AES-NI is present
  2019-10-17 16:30 ` [dpdk-dev] [PATCH v2 1/2] crypto/aesni_mb: " Pablo de Lara
@ 2019-10-17 16:30   ` Pablo de Lara
  2019-10-21  8:51     ` Akhil Goyal
  0 siblings, 1 reply; 5+ messages in thread
From: Pablo de Lara @ 2019-10-17 16:30 UTC (permalink / raw)
  To: dev; +Cc: Pablo de Lara

The IPSec Multi buffer library does not require AES-NI
instructions to be supported by the CPU, as it can emulate these
instructions in software (adding a big performance penalty when
using AES algorithms).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
v2:
- Fixed leading whitespaces

 drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
index 1006a5c..f029362 100644
--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c
@@ -491,11 +491,6 @@ aesni_gcm_create(const char *name,
 	enum aesni_gcm_vector_mode vector_mode;
 	MB_MGR *mb_mgr;
 
-	/* Check CPU for support for AES instruction set */
-	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
-		AESNI_GCM_LOG(ERR, "AES instructions not supported by CPU");
-		return -EFAULT;
-	}
 	dev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);
 	if (dev == NULL) {
 		AESNI_GCM_LOG(ERR, "driver %s: create failed",
@@ -522,10 +517,15 @@ aesni_gcm_create(const char *name,
 
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
 			RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-			RTE_CRYPTODEV_FF_CPU_AESNI |
 			RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
 			RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
 
+	/* Check CPU for support for AES instruction set */
+	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES))
+		dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AESNI;
+	else
+		AESNI_GCM_LOG(WARNING, "AES instructions not supported by CPU");
+
 	mb_mgr = alloc_mb_mgr(0);
 	if (mb_mgr == NULL)
 		return -ENOMEM;
-- 
2.7.5


^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [dpdk-dev] [PATCH v2 2/2] crypto/aesni_gcm: allow device init if no AES-NI is present
  2019-10-17 16:30   ` [dpdk-dev] [PATCH v2 2/2] crypto/aesni_gcm: " Pablo de Lara
@ 2019-10-21  8:51     ` Akhil Goyal
  0 siblings, 0 replies; 5+ messages in thread
From: Akhil Goyal @ 2019-10-21  8:51 UTC (permalink / raw)
  To: Pablo de Lara, dev



> 
> The IPSec Multi buffer library does not require AES-NI
> instructions to be supported by the CPU, as it can emulate these
> instructions in software (adding a big performance penalty when
> using AES algorithms).
> 
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
> ---
> v2:
> - Fixed leading whitespaces
> 
Series applied to dpdk-next-crypto

Thanks.



^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-10-21  8:51 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-17 16:20 [dpdk-dev] [PATCH 1/2] crypto/aesni_mb: allow device init if no AES-NI is present Pablo de Lara
2019-10-17 16:20 ` [dpdk-dev] [PATCH 2/2] crypto/aesni_gcm: " Pablo de Lara
2019-10-17 16:30 ` [dpdk-dev] [PATCH v2 1/2] crypto/aesni_mb: " Pablo de Lara
2019-10-17 16:30   ` [dpdk-dev] [PATCH v2 2/2] crypto/aesni_gcm: " Pablo de Lara
2019-10-21  8:51     ` Akhil Goyal

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