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From: Martin Fuzzey <martin.fuzzey@flowbird.group>
To: Andrew Lunn <andrew@lunn.ch>
Cc: netdev@vger.kernel.org
Subject: [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag
Date: Wed, 23 Oct 2019 11:44:24 +0200	[thread overview]
Message-ID: <1571823889-16834-1-git-send-email-martin.fuzzey@flowbird.group> (raw)

The LAN8740, like the 8720, also requires a reset after enabling clock.
The datasheet [1] 3.8.5.1 says:
	"During a Hardware reset, an external clock must be supplied
	to the XTAL1/CLKIN signal."

I have observed this issue on a custom i.MX6 based board with
the LAN8740A.

[1] http://ww1.microchip.com/downloads/en/DeviceDoc/8740a.pdf

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
---
 drivers/net/phy/smsc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c
index dc3d92d..b732982 100644
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
@@ -327,6 +327,7 @@ static int smsc_phy_probe(struct phy_device *phydev)
 	.name		= "SMSC LAN8740",
 
 	/* PHY_BASIC_FEATURES */
+	.flags		= PHY_RST_AFTER_CLK_EN,
 
 	.probe		= smsc_phy_probe,
 
-- 
1.9.1


             reply	other threads:[~2019-10-23  9:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-23  9:44 Martin Fuzzey [this message]
2019-10-23 15:40 ` [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag Andrew Lunn
2019-10-24  4:45 ` David Miller

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