From: Greg Kurz <groug@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: "Laurent Vivier" <lvivier@redhat.com>,
qemu-ppc@nongnu.org,
"Satheesh Rajendran" <sathnaga@linux.vnet.ibm.com>,
"Cédric Le Goater" <clg@kaod.org>,
qemu-devel@nongnu.org
Subject: [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation
Date: Wed, 04 Dec 2019 20:43:31 +0100 [thread overview]
Message-ID: <157548861171.3650476.14824062174573272058.stgit@bahia.lan> (raw)
Guest hangs have been observed recently on POWER9 hosts, specifically LC92x
"Boston" systems, when the guests are being rebooted multiple times. The
issue isn't POWER9 specific though. It is caused by a very long standing bug
when using the uncommon accel=kvm,kernel-irqchip=off machine configuration
which happens to be enforced on LC92x because of a host FW limitation. This
affects both the XICS and XIVE emulated interrupt controllers.
The actual fix is in patch 1. Patch 2 is a followup cleanup. The other
patches are unrelated cleanups I came up with while investigating.
Since this bug always existed and we're already in rc4, I think it is better
to fix it in 5.0 and possibly backport it to stable and downstream if needed.
--
Greg
---
Greg Kurz (4):
ppc: Deassert the external interrupt pin in KVM on reset
xics: Don't deassert outputs
ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models
ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM
hw/intc/xics.c | 3 ---
hw/ppc/ppc.c | 24 ++++++++++--------------
include/hw/ppc/ppc.h | 2 ++
target/ppc/cpu.h | 4 +++-
target/ppc/helper_regs.h | 5 +++++
target/ppc/translate_init.inc.c | 1 +
6 files changed, 21 insertions(+), 18 deletions(-)
next reply other threads:[~2019-12-04 19:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-04 19:43 Greg Kurz [this message]
2019-12-04 19:43 ` [for-5.0 PATCH 1/4] ppc: Deassert the external interrupt pin in KVM on reset Greg Kurz
2019-12-04 19:43 ` [for-5.0 PATCH 2/4] xics: Don't deassert outputs Greg Kurz
2019-12-04 19:43 ` [for-5.0 PATCH 3/4] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models Greg Kurz
2019-12-04 19:43 ` [for-5.0 PATCH 4/4] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM Greg Kurz
2019-12-09 1:14 ` [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation David Gibson
2019-12-09 10:59 ` Greg Kurz
2019-12-09 11:07 ` Cornelia Huck
2019-12-09 11:14 ` Greg Kurz
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=157548861171.3650476.14824062174573272058.stgit@bahia.lan \
--to=groug@kaod.org \
--cc=clg@kaod.org \
--cc=david@gibson.dropbear.id.au \
--cc=lvivier@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=sathnaga@linux.vnet.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.