From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2C8FC2D0DA for ; Fri, 27 Dec 2019 07:15:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A867F21775 for ; Fri, 27 Dec 2019 07:15:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="BTOmL+W8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726720AbfL0HO7 (ORCPT ); Fri, 27 Dec 2019 02:14:59 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:6960 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726165AbfL0HO7 (ORCPT ); Fri, 27 Dec 2019 02:14:59 -0500 X-UUID: fcb369da0dd54ee093dc364bdd449f37-20191227 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=z5QPChCFCnrwSBOU/2Lo2wcqlt1P6qSqzfoKolmXANM=; b=BTOmL+W8x4KhFog+p2r01j1bgELKUhOeLE+SeBigI6R1tHqVPCWYEok/5huXHsrIUPLwQ3bJzzk4wSHeXck66U7yGYMbYJhhfLvbejxD8rbWCzfh8KIU8Z+8Vr6F56hyyHzx0heswpHCjlxbO/VC26trGWJ5rxk2oOU4A3QSVMQ=; X-UUID: fcb369da0dd54ee093dc364bdd449f37-20191227 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1572644019; Fri, 27 Dec 2019 15:14:51 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 27 Dec 2019 15:14:21 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 27 Dec 2019 15:14:38 +0800 Message-ID: <1577430889.10290.49.camel@mtksdaap41> Subject: Re: [PATCH v5 3/3] PM / AVS: SVS: Introduce SVS engine From: Roger Lu To: Pi-Hsun Shih CC: Mark Rutland , Nicolas Boichat , Angus Lin , Kevin Hilman , Stephen Boyd , "open list:THERMAL" , open list , HenryC Chen , , Fan Chen , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Nishanth Menon , "moderated list:ARM/Mediatek SoC support" Date: Fri, 27 Dec 2019 15:14:49 +0800 In-Reply-To: References: <20190906100514.30803-1-roger.lu@mediatek.com> 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<1577430889.10290.49.camel@mtksdaap41> Subject: Re: [PATCH v5 3/3] PM / AVS: SVS: Introduce SVS engine From: Roger Lu To: Pi-Hsun Shih Date: Fri, 27 Dec 2019 15:14:49 +0800 In-Reply-To: References: <20190906100514.30803-1-roger.lu@mediatek.com> <20190906100514.30803-4-roger.lu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191226_232055_982753_778D3C29 X-CRM114-Status: GOOD ( 24.31 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nicolas Boichat , Angus Lin , "open list:THERMAL" , Stephen Boyd , Kevin Hilman , open list , HenryC Chen , yt.lee@mediatek.com, Fan Chen , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Nishanth Menon , "moderated list:ARM/Mediatek SoC support" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Dear Pi-Hsun, Sorry for the late reply. On Thu, 2019-11-14 at 15:41 +0800, Pi-Hsun Shih wrote: > Hi Roger, > > On Fri, Sep 6, 2019 at 6:06 PM Roger Lu wrote: > > > > The SVS (Smart Voltage Scaling) engine is a piece of hardware which is > > used to calculate optimized voltage values of several power domains, e.g. > > CPU/GPU/CCI, according to chip process corner, temperatures, and other > > factors. Then DVFS driver could apply those optimized voltage values to > > reduce power consumption. > > > > Signed-off-by: Roger Lu > > --- > > drivers/power/avs/Kconfig | 10 + > > drivers/power/avs/Makefile | 1 + > > drivers/power/avs/mtk_svs.c | 2075 +++++++++++++++++++++++++++++++++ > > include/linux/power/mtk_svs.h | 23 + > > 4 files changed, 2109 insertions(+) > > create mode 100644 drivers/power/avs/mtk_svs.c > > create mode 100644 include/linux/power/mtk_svs.h > > > > [...] > > diff --git a/drivers/power/avs/mtk_svs.c b/drivers/power/avs/mtk_svs.c > > new file mode 100644 > > index 000000000000..78ec93c3a4a5 > > --- /dev/null > > +++ b/drivers/power/avs/mtk_svs.c > > [...] > > +static int svs_set_volts(struct svs_bank *svsb, bool force_update) > > +{ > > + u32 i, svsb_volt, opp_volt, low_temp_offset = 0; > > + int zone_temp, ret; > > + > > + mutex_lock(&svsb->lock); > > + > > + /* If bank is suspended, it means init02 voltage is applied. > > + * Don't need to update opp voltage anymore. > > + */ > > + if (svsb->suspended && !force_update) { > > + pr_notice("%s: bank is suspended\n", svsb->name); > > + mutex_unlock(&svsb->lock); > > + return -EPERM; > > + } > > + > > + /* get thermal effect */ > > + if (svsb->phase == SVS_PHASE_MON) { > > + if (svsb->svs_temp > svsb->upper_temp_bound && > > + svsb->svs_temp < svsb->lower_temp_bound) { > > + pr_err("%s: svs_temp is abnormal (0x%x)?\n", > > + svsb->name, svsb->svs_temp); > > + mutex_unlock(&svsb->lock); > > + return -EINVAL; > > + } > > + > > + ret = svs_get_zone_temperature(svsb, &zone_temp); > > + if (ret) { > > + pr_err("%s: cannot get zone \"%s\" temperature\n", > > + svsb->name, svsb->zone_name); > > + pr_err("%s: add low_temp_offset = %u\n", > > + svsb->name, svsb->low_temp_offset); > > + zone_temp = svsb->low_temp_threashold; > > + } > > + > > + if (zone_temp <= svsb->low_temp_threashold) > > + low_temp_offset = svsb->low_temp_offset; > > + } > > + > > + /* vmin <= svsb_volt (opp_volt) <= signed-off voltage */ > > + for (i = 0; i < svsb->opp_count; i++) { > > + if (svsb->phase == SVS_PHASE_MON) { > > + svsb_volt = max((svsb->volts[i] + svsb->volt_offset + > > + low_temp_offset), svsb->vmin); > > + opp_volt = svs_volt_to_opp_volt(svsb_volt, > > + svsb->volt_step, > > + svsb->volt_base); > > + } else if (svsb->phase == SVS_PHASE_INIT02) { > > + svsb_volt = max((svsb->init02_volts[i] + > > + svsb->volt_offset), svsb->vmin); > > + opp_volt = svs_volt_to_opp_volt(svsb_volt, > > + svsb->volt_step, > > + svsb->volt_base); > > + } else if (svsb->phase == SVS_PHASE_ERROR) { > > + opp_volt = svsb->opp_volts[i]; > > + } else { > > + pr_err("%s: unknown phase: %u?\n", > > + svsb->name, svsb->phase); > > + mutex_unlock(&svsb->lock); > > + return -EINVAL; > > + } > > + > > + opp_volt = min(opp_volt, svsb->opp_volts[i]); > > + ret = dev_pm_opp_adjust_voltage(svsb->dev, svsb->opp_freqs[i], > > + opp_volt); > > The version of this function in opp tree > (https://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git/commit/?h=opp/linux-next&id=25cb20a212a1f989385dfe23230817e69c62bee5) > has a different function signature, so this should be changed too. Sure. I'll update it in the next patch. > > > + if (ret) { > > + pr_err("%s: set voltage failed: %d\n", svsb->name, ret); > > + mutex_unlock(&svsb->lock); > > + return ret; > > + } > > + } > > + > > + mutex_unlock(&svsb->lock); > > + > > + return 0; > > +} > > + > > [...] > > +static int svs_init01(struct mtk_svs *svs) > > +{ > > + const struct svs_platform *svsp = svs->platform; > > + struct svs_bank *svsb; > > + struct pm_qos_request qos_request = { {0} }; > > + unsigned long flags, time_left; > > + bool search_done; > > + int ret = -EINVAL; > > + u32 opp_freqs, opp_vboot, buck_volt, idx, i; > > + > > + /* Let CPUs leave idle-off state for initializing svs_init01. */ > > + pm_qos_add_request(&qos_request, PM_QOS_CPU_DMA_LATENCY, 0); > > + > > + /* Sometimes two svs_bank use the same buck. > > + * Therefore, we set each svs_bank to vboot voltage first. > > + */ > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > + svsb = &svsp->banks[idx]; > > + search_done = false; > > + > > + if (!svsb->init01_support) > > + continue; > > + > > + ret = regulator_set_mode(svsb->buck, REGULATOR_MODE_FAST); > > + if (ret) > > + pr_notice("%s: fail to set fast mode: %d\n", > > + svsb->name, ret); > > + > > + if (svsb->mtcmos_request) { > > + ret = regulator_enable(svsb->buck); > > + if (ret) { > > + pr_err("%s: fail to enable %s power: %d\n", > > + svsb->name, svsb->buck_name, ret); > > + goto init01_finish; > > + } > > + > > + ret = dev_pm_domain_attach(svsb->dev, false); > > + if (ret) { > > + pr_err("%s: attach pm domain fail: %d\n", > > + svsb->name, ret); > > + goto init01_finish; > > + } > > + > > + pm_runtime_enable(svsb->dev); > > + ret = pm_runtime_get_sync(svsb->dev); > > + if (ret < 0) { > > + pr_err("%s: turn mtcmos on fail: %d\n", > > + svsb->name, ret); > > + goto init01_finish; > > + } > > + } > > + > > + /* Find the fastest freq that can be run at vboot and > > + * fix to that freq until svs_init01 is done. > > + */ > > + opp_vboot = svs_volt_to_opp_volt(svsb->vboot, > > + svsb->volt_step, > > + svsb->volt_base); > > + > > + for (i = 0; i < svsb->opp_count; i++) { > > + opp_freqs = svsb->opp_freqs[i]; > > + if (!search_done && svsb->opp_volts[i] <= opp_vboot) { > > + ret = dev_pm_opp_adjust_voltage(svsb->dev, > > + opp_freqs, > > + opp_vboot); > > Same here. Sure. I'll update it in the next patch. > > > + if (ret) { > > + pr_err("%s: set voltage failed: %d\n", > > + svsb->name, ret); > > + goto init01_finish; > > + } > > + > > + search_done = true; > > + } else { > > + dev_pm_opp_disable(svsb->dev, > > + svsb->opp_freqs[i]); > > + } > > + } > > + } > > + > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > + svsb = &svsp->banks[idx]; > > + svs->bank = svsb; > > + > > + if (!svsb->init01_support) > > + continue; > > + > > + opp_vboot = svs_volt_to_opp_volt(svsb->vboot, > > + svsb->volt_step, > > + svsb->volt_base); > > + > > + buck_volt = regulator_get_voltage(svsb->buck); > > + if (buck_volt != opp_vboot) { > > + pr_err("%s: buck voltage: %u, expected vboot: %u\n", > > + svsb->name, buck_volt, opp_vboot); > > + ret = -EPERM; > > + goto init01_finish; > > + } > > + > > + init_completion(&svsb->init_completion); > > + flags = claim_mtk_svs_lock(); > > + svs_set_phase(svs, SVS_PHASE_INIT01); > > + release_mtk_svs_lock(flags); > > + time_left = > > + wait_for_completion_timeout(&svsb->init_completion, > > + msecs_to_jiffies(2000)); > > + if (time_left == 0) { > > + pr_err("%s: init01 completion timeout\n", svsb->name); > > + ret = -EBUSY; > > + goto init01_finish; > > + } > > + } > > + > > +init01_finish: > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > + svsb = &svsp->banks[idx]; > > + > > + if (!svsb->init01_support) > > + continue; > > + > > + for (i = 0; i < svsb->opp_count; i++) > > + dev_pm_opp_enable(svsb->dev, svsb->opp_freqs[i]); > > + > > + if (regulator_set_mode(svsb->buck, REGULATOR_MODE_NORMAL)) > > + pr_notice("%s: fail to set normal mode: %d\n", > > + svsb->name, ret); > > + > > + if (svsb->mtcmos_request) { > > + if (pm_runtime_put_sync(svsb->dev)) > > + pr_err("%s: turn mtcmos off fail: %d\n", > > + svsb->name, ret); > > + pm_runtime_disable(svsb->dev); > > + dev_pm_domain_detach(svsb->dev, 0); > > + if (regulator_disable(svsb->buck)) > > + pr_err("%s: fail to disable %s power: %d\n", > > + svsb->name, svsb->buck_name, ret); > > + } > > + } > > + > > + pm_qos_remove_request(&qos_request); > > + > > + return ret; > > +} > > + > > [...] > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4DEBC2D0CE for ; Fri, 27 Dec 2019 07:21:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 86DF8206F4 for ; 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bh=z5QPChCFCnrwSBOU/2Lo2wcqlt1P6qSqzfoKolmXANM=; b=M2ZRvpQWAPfJAHNjxGR5tS6vD5ofpC8/xmSze+LQ3UwW0DWHpOh0lXfGBczA/sd2DkLbyIiHmgamJSx02CC0EwcYK3GLy2XhXP00AqrIvfgI1EJOUPQcM1FrLYGXb5tRnwuQrwMbzwuKJABLhPGMXXFpZI2+4R0CX3tHor6Q86I=; X-UUID: 3f355523aef84840b7600bee9f9f8183-20191226 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1337187444; Thu, 26 Dec 2019 23:20:54 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 26 Dec 2019 23:15:07 -0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 27 Dec 2019 15:14:21 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 27 Dec 2019 15:14:38 +0800 Message-ID: <1577430889.10290.49.camel@mtksdaap41> Subject: Re: [PATCH v5 3/3] PM / AVS: SVS: Introduce SVS engine From: Roger Lu To: Pi-Hsun Shih Date: Fri, 27 Dec 2019 15:14:49 +0800 In-Reply-To: References: <20190906100514.30803-1-roger.lu@mediatek.com> <20190906100514.30803-4-roger.lu@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191226_232055_982753_778D3C29 X-CRM114-Status: GOOD ( 24.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nicolas Boichat , Angus Lin , "open list:THERMAL" , Stephen Boyd , Kevin Hilman , open list , HenryC Chen , yt.lee@mediatek.com, Fan Chen , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rob Herring , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Nishanth Menon , "moderated list:ARM/Mediatek SoC support" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Dear Pi-Hsun, Sorry for the late reply. On Thu, 2019-11-14 at 15:41 +0800, Pi-Hsun Shih wrote: > Hi Roger, > > On Fri, Sep 6, 2019 at 6:06 PM Roger Lu wrote: > > > > The SVS (Smart Voltage Scaling) engine is a piece of hardware which is > > used to calculate optimized voltage values of several power domains, e.g. > > CPU/GPU/CCI, according to chip process corner, temperatures, and other > > factors. Then DVFS driver could apply those optimized voltage values to > > reduce power consumption. > > > > Signed-off-by: Roger Lu > > --- > > drivers/power/avs/Kconfig | 10 + > > drivers/power/avs/Makefile | 1 + > > drivers/power/avs/mtk_svs.c | 2075 +++++++++++++++++++++++++++++++++ > > include/linux/power/mtk_svs.h | 23 + > > 4 files changed, 2109 insertions(+) > > create mode 100644 drivers/power/avs/mtk_svs.c > > create mode 100644 include/linux/power/mtk_svs.h > > > > [...] > > diff --git a/drivers/power/avs/mtk_svs.c b/drivers/power/avs/mtk_svs.c > > new file mode 100644 > > index 000000000000..78ec93c3a4a5 > > --- /dev/null > > +++ b/drivers/power/avs/mtk_svs.c > > [...] > > +static int svs_set_volts(struct svs_bank *svsb, bool force_update) > > +{ > > + u32 i, svsb_volt, opp_volt, low_temp_offset = 0; > > + int zone_temp, ret; > > + > > + mutex_lock(&svsb->lock); > > + > > + /* If bank is suspended, it means init02 voltage is applied. > > + * Don't need to update opp voltage anymore. > > + */ > > + if (svsb->suspended && !force_update) { > > + pr_notice("%s: bank is suspended\n", svsb->name); > > + mutex_unlock(&svsb->lock); > > + return -EPERM; > > + } > > + > > + /* get thermal effect */ > > + if (svsb->phase == SVS_PHASE_MON) { > > + if (svsb->svs_temp > svsb->upper_temp_bound && > > + svsb->svs_temp < svsb->lower_temp_bound) { > > + pr_err("%s: svs_temp is abnormal (0x%x)?\n", > > + svsb->name, svsb->svs_temp); > > + mutex_unlock(&svsb->lock); > > + return -EINVAL; > > + } > > + > > + ret = svs_get_zone_temperature(svsb, &zone_temp); > > + if (ret) { > > + pr_err("%s: cannot get zone \"%s\" temperature\n", > > + svsb->name, svsb->zone_name); > > + pr_err("%s: add low_temp_offset = %u\n", > > + svsb->name, svsb->low_temp_offset); > > + zone_temp = svsb->low_temp_threashold; > > + } > > + > > + if (zone_temp <= svsb->low_temp_threashold) > > + low_temp_offset = svsb->low_temp_offset; > > + } > > + > > + /* vmin <= svsb_volt (opp_volt) <= signed-off voltage */ > > + for (i = 0; i < svsb->opp_count; i++) { > > + if (svsb->phase == SVS_PHASE_MON) { > > + svsb_volt = max((svsb->volts[i] + svsb->volt_offset + > > + low_temp_offset), svsb->vmin); > > + opp_volt = svs_volt_to_opp_volt(svsb_volt, > > + svsb->volt_step, > > + svsb->volt_base); > > + } else if (svsb->phase == SVS_PHASE_INIT02) { > > + svsb_volt = max((svsb->init02_volts[i] + > > + svsb->volt_offset), svsb->vmin); > > + opp_volt = svs_volt_to_opp_volt(svsb_volt, > > + svsb->volt_step, > > + svsb->volt_base); > > + } else if (svsb->phase == SVS_PHASE_ERROR) { > > + opp_volt = svsb->opp_volts[i]; > > + } else { > > + pr_err("%s: unknown phase: %u?\n", > > + svsb->name, svsb->phase); > > + mutex_unlock(&svsb->lock); > > + return -EINVAL; > > + } > > + > > + opp_volt = min(opp_volt, svsb->opp_volts[i]); > > + ret = dev_pm_opp_adjust_voltage(svsb->dev, svsb->opp_freqs[i], > > + opp_volt); > > The version of this function in opp tree > (https://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git/commit/?h=opp/linux-next&id=25cb20a212a1f989385dfe23230817e69c62bee5) > has a different function signature, so this should be changed too. Sure. I'll update it in the next patch. > > > + if (ret) { > > + pr_err("%s: set voltage failed: %d\n", svsb->name, ret); > > + mutex_unlock(&svsb->lock); > > + return ret; > > + } > > + } > > + > > + mutex_unlock(&svsb->lock); > > + > > + return 0; > > +} > > + > > [...] > > +static int svs_init01(struct mtk_svs *svs) > > +{ > > + const struct svs_platform *svsp = svs->platform; > > + struct svs_bank *svsb; > > + struct pm_qos_request qos_request = { {0} }; > > + unsigned long flags, time_left; > > + bool search_done; > > + int ret = -EINVAL; > > + u32 opp_freqs, opp_vboot, buck_volt, idx, i; > > + > > + /* Let CPUs leave idle-off state for initializing svs_init01. */ > > + pm_qos_add_request(&qos_request, PM_QOS_CPU_DMA_LATENCY, 0); > > + > > + /* Sometimes two svs_bank use the same buck. > > + * Therefore, we set each svs_bank to vboot voltage first. > > + */ > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > + svsb = &svsp->banks[idx]; > > + search_done = false; > > + > > + if (!svsb->init01_support) > > + continue; > > + > > + ret = regulator_set_mode(svsb->buck, REGULATOR_MODE_FAST); > > + if (ret) > > + pr_notice("%s: fail to set fast mode: %d\n", > > + svsb->name, ret); > > + > > + if (svsb->mtcmos_request) { > > + ret = regulator_enable(svsb->buck); > > + if (ret) { > > + pr_err("%s: fail to enable %s power: %d\n", > > + svsb->name, svsb->buck_name, ret); > > + goto init01_finish; > > + } > > + > > + ret = dev_pm_domain_attach(svsb->dev, false); > > + if (ret) { > > + pr_err("%s: attach pm domain fail: %d\n", > > + svsb->name, ret); > > + goto init01_finish; > > + } > > + > > + pm_runtime_enable(svsb->dev); > > + ret = pm_runtime_get_sync(svsb->dev); > > + if (ret < 0) { > > + pr_err("%s: turn mtcmos on fail: %d\n", > > + svsb->name, ret); > > + goto init01_finish; > > + } > > + } > > + > > + /* Find the fastest freq that can be run at vboot and > > + * fix to that freq until svs_init01 is done. > > + */ > > + opp_vboot = svs_volt_to_opp_volt(svsb->vboot, > > + svsb->volt_step, > > + svsb->volt_base); > > + > > + for (i = 0; i < svsb->opp_count; i++) { > > + opp_freqs = svsb->opp_freqs[i]; > > + if (!search_done && svsb->opp_volts[i] <= opp_vboot) { > > + ret = dev_pm_opp_adjust_voltage(svsb->dev, > > + opp_freqs, > > + opp_vboot); > > Same here. Sure. I'll update it in the next patch. > > > + if (ret) { > > + pr_err("%s: set voltage failed: %d\n", > > + svsb->name, ret); > > + goto init01_finish; > > + } > > + > > + search_done = true; > > + } else { > > + dev_pm_opp_disable(svsb->dev, > > + svsb->opp_freqs[i]); > > + } > > + } > > + } > > + > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > + svsb = &svsp->banks[idx]; > > + svs->bank = svsb; > > + > > + if (!svsb->init01_support) > > + continue; > > + > > + opp_vboot = svs_volt_to_opp_volt(svsb->vboot, > > + svsb->volt_step, > > + svsb->volt_base); > > + > > + buck_volt = regulator_get_voltage(svsb->buck); > > + if (buck_volt != opp_vboot) { > > + pr_err("%s: buck voltage: %u, expected vboot: %u\n", > > + svsb->name, buck_volt, opp_vboot); > > + ret = -EPERM; > > + goto init01_finish; > > + } > > + > > + init_completion(&svsb->init_completion); > > + flags = claim_mtk_svs_lock(); > > + svs_set_phase(svs, SVS_PHASE_INIT01); > > + release_mtk_svs_lock(flags); > > + time_left = > > + wait_for_completion_timeout(&svsb->init_completion, > > + msecs_to_jiffies(2000)); > > + if (time_left == 0) { > > + pr_err("%s: init01 completion timeout\n", svsb->name); > > + ret = -EBUSY; > > + goto init01_finish; > > + } > > + } > > + > > +init01_finish: > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > + svsb = &svsp->banks[idx]; > > + > > + if (!svsb->init01_support) > > + continue; > > + > > + for (i = 0; i < svsb->opp_count; i++) > > + dev_pm_opp_enable(svsb->dev, svsb->opp_freqs[i]); > > + > > + if (regulator_set_mode(svsb->buck, REGULATOR_MODE_NORMAL)) > > + pr_notice("%s: fail to set normal mode: %d\n", > > + svsb->name, ret); > > + > > + if (svsb->mtcmos_request) { > > + if (pm_runtime_put_sync(svsb->dev)) > > + pr_err("%s: turn mtcmos off fail: %d\n", > > + svsb->name, ret); > > + pm_runtime_disable(svsb->dev); > > + dev_pm_domain_detach(svsb->dev, 0); > > + if (regulator_disable(svsb->buck)) > > + pr_err("%s: fail to disable %s power: %d\n", > > + svsb->name, svsb->buck_name, ret); > > + } > > + } > > + > > + pm_qos_remove_request(&qos_request); > > + > > + return ret; > > +} > > + > > [...] > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel